## Top method improvements
-116 (-20.00 % of base) - System.String:MakeSeparatorListVectorized(System.ReadOnlySpan`1[char],byref,char,char,char)
```diff
; Assembly listing for method System.String:MakeSeparatorListVectorized(System.ReadOnlySpan`1[char],byref,char,char,char) (FullOpts)
; Emitting BLENDED_CODE for arm64 + SVE on Unix
; FullOpts code
; optimized code
; fp based frame
; fully interruptible
; No PGO data
-; 0 inlinees with PGO data; 8 single block inlinees; 7 inlinees without PGO data
+; 0 inlinees with PGO data; 5 single block inlinees; 5 inlinees without PGO data
; Final local variable assignments
;
;* V00 arg0 [V00 ] ( 0, 0 ) struct (16) zero-ref multireg-arg single-def
-; V01 arg1 [V01,T00] ( 12, 82 ) byref -> x19 single-def
-; V02 arg2 [V02,T16] ( 3, 3 ) ushort -> x3 single-def
-; V03 arg3 [V03,T17] ( 3, 3 ) ushort -> x4 single-def
-; V04 arg4 [V04,T18] ( 3, 3 ) ushort -> x5 single-def
-; V05 loc0 [V05,T04] ( 4, 33 ) int -> x20
-;* V06 loc1 [V06 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op
+; V01 arg1 [V01,T01] ( 12, 75.90) byref -> x19 single-def
+; V02 arg2 [V02,T15] ( 4, 4.48) ushort -> x20 single-def
+; V03 arg3 [V03,T16] ( 4, 4.48) ushort -> x21 single-def
+; V04 arg4 [V04,T17] ( 4, 4.48) ushort -> x22 single-def
+; V05 loc0 [V05,T05] ( 5, 26.98) int -> x23
+;* V06 loc1 [V06 ] ( 0, 0 ) struct (16) zero-ref
;* V07 loc2 [V07 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op
;* V08 loc3 [V08 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V09 loc4 [V09 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V10 loc5 [V10 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V11 loc6 [V11 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V12 loc7 [V12 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V13 loc8 [V13 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V14 loc9 [V14 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V15 loc10 [V15 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V16 loc11 [V16 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V17 loc12 [V17 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V18 loc13 [V18 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V19 loc14 [V19 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V20 loc15 [V20 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V21 loc16 [V21 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V22 loc17 [V22 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V23 loc18 [V23 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V24 loc19 [V24 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V25 loc20 [V25 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V26 loc21 [V26 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V27 loc22 [V27 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V28 loc23 [V28 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V29 loc24 [V29 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V30 loc25 [V30 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V31 loc26 [V31 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V32 loc27 [V32 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V33 loc28 [V33 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V34 loc29 [V34 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V35 loc30 [V35 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V36 loc31 [V36 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V37 loc32 [V37 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V38 loc33 [V38 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V39 loc34 [V39 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V40 loc35 [V40 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V41 loc36 [V41 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V42 loc37 [V42 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V43 loc38 [V43 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V44 loc39 [V44 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V45 loc40 [V45 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V46 loc41 [V46 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V47 loc42 [V47 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V48 loc43 [V48 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V49 loc44 [V49 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V50 loc45 [V50 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V51 loc46 [V51 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V52 loc47 [V52 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V53 loc48 [V53 ] ( 0, 0 ) ref -> zero-ref class-hnd
-; V54 loc49 [V54,T31] ( 3, 5.50) simd16 -> d8
-; V55 loc50 [V55,T32] ( 3, 5.50) simd16 -> d9
-; V56 loc51 [V56,T33] ( 3, 5.50) simd16 -> d10
-;* V57 loc52 [V57 ] ( 0, 0 ) ref -> zero-ref class-hnd
-;* V58 loc53 [V58 ] ( 0, 0 ) ref -> zero-ref class-hnd
+;* V54 loc49 [V54 ] ( 0, 0 ) ref -> zero-ref class-hnd
+;* V55 loc50 [V55 ] ( 0, 0 ) ref -> zero-ref class-hnd
+; V56 loc51 [V56,T25] ( 2, 4.50) simd16 -> d8
+; V57 loc52 [V57,T26] ( 2, 4.50) simd16 -> d9
+; V58 loc53 [V58,T27] ( 2, 4.50) simd16 -> d10
;* V59 loc54 [V59 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V60 loc55 [V60 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V61 loc56 [V61 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V62 loc57 [V62 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V63 loc58 [V63 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V64 loc59 [V64 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V65 loc60 [V65 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V66 loc61 [V66 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V67 loc62 [V67 ] ( 0, 0 ) ref -> zero-ref class-hnd
;* V68 loc63 [V68 ] ( 0, 0 ) ref -> zero-ref class-hnd
-; V69 loc64 [V69,T28] ( 4, 16 ) simd16 -> d16
-; V70 loc65 [V70,T29] ( 4, 14 ) simd16 -> d16
-; V71 loc66 [V71,T01] ( 6, 82 ) int -> x25
-;* V72 loc67 [V72 ] ( 0, 0 ) int -> zero-ref
-; V73 loc68 [V73,T35] ( 4, 2 ) simd16 -> d16
-; V74 loc69 [V74,T19] ( 2, 4.50) int -> x20
-; V75 loc70 [V75,T10] ( 7, 21 ) int -> x21
-;* V76 loc71 [V76 ] ( 0, 0 ) int -> zero-ref
-;# V77 OutArgs [V77 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-;* V78 tmp1 [V78 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
-;* V79 tmp2 [V79 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
-;* V80 tmp3 [V80 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
-;* V81 tmp4 [V81 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
-;* V82 tmp5 [V82 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
-;* V83 tmp6 [V83 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
-;* V84 tmp7 [V84 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
-;* V85 tmp8 [V85 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
-;* V86 tmp9 [V86 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
-;* V87 tmp10 [V87 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
-;* V88 tmp11 [V88 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
-; V89 tmp12 [V89,T03] ( 4, 48 ) int -> x26 "Inline stloc first use temp"
-;* V90 tmp13 [V90 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inline stloc first use temp"
-; V91 tmp14 [V91,T02] ( 3, 64 ) int -> x1 "Inlining Arg"
-;* V92 tmp15 [V92 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
-; V93 tmp16 [V93,T05] ( 2, 32 ) byref -> x23 "Inlining Arg"
-; V94 tmp17 [V94,T06] ( 2, 32 ) int -> x24 "Inlining Arg"
-; V95 tmp18 [V95,T23] ( 3, 3 ) int -> x0 "Inlining Arg"
-;* V96 tmp19 [V96 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
-; V97 tmp20 [V97,T25] ( 2, 2 ) byref -> x0 single-def "Inlining Arg"
-;* V98 tmp21 [V98,T27] ( 0, 0 ) int -> zero-ref "Inlining Arg"
-;* V99 tmp22 [V99 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
-;* V100 tmp23 [V100 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
-; V101 tmp24 [V101,T13] ( 4, 12 ) int -> x22 "Inline stloc first use temp"
-;* V102 tmp25 [V102 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inline stloc first use temp"
-; V103 tmp26 [V103,T12] ( 3, 16 ) int -> x1 "Inlining Arg"
-; V104 tmp27 [V104,T20] ( 2, 2 ) byref -> x0 single-def "field V00._reference (fldOffset=0x0)" P-INDEP
-; V105 tmp28 [V105,T21] ( 2, 2 ) int -> x1 single-def "field V00._length (fldOffset=0x8)" P-INDEP
-; V106 tmp29 [V106,T24] ( 3, 2.50) byref -> x21 single-def "field V06._reference (fldOffset=0x0)" P-INDEP
-; V107 tmp30 [V107,T22] ( 4, 3 ) int -> x22 "field V06._length (fldOffset=0x8)" P-INDEP
-; V108 tmp31 [V108,T11] ( 4, 21 ) byref -> x23 "field V07._reference (fldOffset=0x0)" P-INDEP
-; V109 tmp32 [V109,T08] ( 7, 27.50) int -> x24 "field V07._length (fldOffset=0x8)" P-INDEP
-;* V110 tmp33 [V110 ] ( 0, 0 ) byref -> zero-ref "field V78._reference (fldOffset=0x0)" P-INDEP
-;* V111 tmp34 [V111 ] ( 0, 0 ) int -> zero-ref "field V78._length (fldOffset=0x8)" P-INDEP
-;* V112 tmp35 [V112 ] ( 0, 0 ) byref -> zero-ref single-def "field V81._reference (fldOffset=0x0)" P-INDEP
-;* V113 tmp36 [V113 ] ( 0, 0 ) int -> zero-ref "field V81._length (fldOffset=0x8)" P-INDEP
-;* V114 tmp37 [V114 ] ( 0, 0 ) byref -> zero-ref single-def "field V84._reference (fldOffset=0x0)" P-INDEP
-;* V115 tmp38 [V115 ] ( 0, 0 ) int -> zero-ref "field V84._length (fldOffset=0x8)" P-INDEP
-;* V116 tmp39 [V116 ] ( 0, 0 ) byref -> zero-ref single-def "field V85._reference (fldOffset=0x0)" P-INDEP
-;* V117 tmp40 [V117 ] ( 0, 0 ) int -> zero-ref "field V85._length (fldOffset=0x8)" P-INDEP
-;* V118 tmp41 [V118 ] ( 0, 0 ) byref -> zero-ref "field V87._reference (fldOffset=0x0)" P-INDEP
-;* V119 tmp42 [V119 ] ( 0, 0 ) int -> zero-ref "field V87._length (fldOffset=0x8)" P-INDEP
-;* V120 tmp43 [V120 ] ( 0, 0 ) byref -> zero-ref "field V88._reference (fldOffset=0x0)" P-INDEP
-;* V121 tmp44 [V121 ] ( 0, 0 ) int -> zero-ref "field V88._length (fldOffset=0x8)" P-INDEP
-; V122 tmp45 [V122,T09] ( 2, 24 ) byref -> x27 "field V90._reference (fldOffset=0x0)" P-INDEP
-; V123 tmp46 [V123,T07] ( 2, 32 ) int -> x0 "field V90._length (fldOffset=0x8)" P-INDEP
-;* V124 tmp47 [V124 ] ( 0, 0 ) byref -> zero-ref "field V92._reference (fldOffset=0x0)" P-INDEP
-;* V125 tmp48 [V125 ] ( 0, 0 ) int -> zero-ref "field V92._length (fldOffset=0x8)" P-INDEP
-;* V126 tmp49 [V126 ] ( 0, 0 ) byref -> zero-ref single-def "field V96._reference (fldOffset=0x0)" P-INDEP
-;* V127 tmp50 [V127 ] ( 0, 0 ) int -> zero-ref "field V96._length (fldOffset=0x8)" P-INDEP
-;* V128 tmp51 [V128 ] ( 0, 0 ) byref -> zero-ref single-def "field V99._reference (fldOffset=0x0)" P-INDEP
-;* V129 tmp52 [V129 ] ( 0, 0 ) int -> zero-ref "field V99._length (fldOffset=0x8)" P-INDEP
-;* V130 tmp53 [V130 ] ( 0, 0 ) byref -> zero-ref single-def "field V100._reference (fldOffset=0x0)" P-INDEP
-;* V131 tmp54 [V131 ] ( 0, 0 ) int -> zero-ref "field V100._length (fldOffset=0x8)" P-INDEP
-; V132 tmp55 [V132,T15] ( 2, 6 ) byref -> x23 "field V102._reference (fldOffset=0x0)" P-INDEP
-; V133 tmp56 [V133,T14] ( 2, 8 ) int -> x0 "field V102._length (fldOffset=0x8)" P-INDEP
-; V134 cse0 [V134,T26] ( 3, 1.50) int -> x20 "CSE #01: moderate"
-; V135 rat0 [V135,T30] ( 3, 12 ) simd16 -> d16 "ReplaceWithLclVar is creating a new local variable"
-; V136 rat1 [V136,T34] ( 3, 3 ) simd16 -> d16 "ReplaceWithLclVar is creating a new local variable"
+;* V69 loc64 [V69 ] ( 0, 0 ) ref -> zero-ref class-hnd
+;* V70 loc65 [V70 ] ( 0, 0 ) ref -> zero-ref class-hnd
+; V71 loc66 [V71,T22] ( 4, 16 ) simd16 -> d16
+; V72 loc67 [V72,T23] ( 4, 14 ) simd16 -> d16
+; V73 loc68 [V73,T00] ( 6, 82 ) int -> x26
+;* V74 loc69 [V74 ] ( 0, 0 ) int -> zero-ref
+;* V75 loc70 [V75 ] ( 0, 0 ) ref -> zero-ref class-hnd
+;* V76 loc71 [V76 ] ( 0, 0 ) ref -> zero-ref class-hnd
+;* V77 loc72 [V77 ] ( 0, 0 ) ref -> zero-ref class-hnd
+;* V78 loc73 [V78 ] ( 0, 0 ) ref -> zero-ref class-hnd
+;* V79 loc74 [V79 ] ( 0, 0 ) ref -> zero-ref class-hnd
+; V80 loc75 [V80,T08] ( 6, 16.84) int -> x26
+; V81 loc76 [V81,T13] ( 4, 7.92) ushort -> x0
+;# V82 OutArgs [V82 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
+;* V83 tmp1 [V83 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
+;* V84 tmp2 [V84 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
+;* V85 tmp3 [V85 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
+;* V86 tmp4 [V86 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
+;* V87 tmp5 [V87 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
+;* V88 tmp6 [V88 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
+;* V89 tmp7 [V89 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
+;* V90 tmp8 [V90 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
+;* V91 tmp9 [V91 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
+;* V92 tmp10 [V92 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
+; V93 tmp11 [V93,T03] ( 4, 48 ) int -> x27 "Inline stloc first use temp"
+;* V94 tmp12 [V94 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inline stloc first use temp"
+; V95 tmp13 [V95,T02] ( 3, 64 ) int -> x1 "Inlining Arg"
+;* V96 tmp14 [V96 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
+; V97 tmp15 [V97,T09] ( 2, 16 ) byref -> x24 "Inlining Arg"
+; V98 tmp16 [V98,T10] ( 2, 16 ) int -> x25 "Inlining Arg"
+; V99 tmp17 [V99,T14] ( 4, 7.92) int -> x27 "Inline stloc first use temp"
+;* V100 tmp18 [V100 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inline stloc first use temp"
+; V101 tmp19 [V101,T12] ( 3, 11.88) int -> x1 "Inlining Arg"
+; V102 tmp20 [V102,T18] ( 2, 2 ) byref -> x0 single-def "field V00._reference (fldOffset=0x0)" P-INDEP
+; V103 tmp21 [V103,T19] ( 2, 2 ) int -> x1 single-def "field V00._length (fldOffset=0x8)" P-INDEP
+;* V104 tmp22 [V104 ] ( 0, 0 ) byref -> zero-ref "field V06._reference (fldOffset=0x0)" P-INDEP
+;* V105 tmp23 [V105 ] ( 0, 0 ) int -> zero-ref "field V06._length (fldOffset=0x8)" P-INDEP
+; V106 tmp24 [V106,T11] ( 5, 14.98) byref -> x24 "field V07._reference (fldOffset=0x0)" P-INDEP
+; V107 tmp25 [V107,T07] ( 7, 18.96) int -> x25 "field V07._length (fldOffset=0x8)" P-INDEP
+;* V108 tmp26 [V108 ] ( 0, 0 ) byref -> zero-ref single-def "field V85._reference (fldOffset=0x0)" P-INDEP
+;* V109 tmp27 [V109 ] ( 0, 0 ) int -> zero-ref "field V85._length (fldOffset=0x8)" P-INDEP
+;* V110 tmp28 [V110 ] ( 0, 0 ) byref -> zero-ref single-def "field V88._reference (fldOffset=0x0)" P-INDEP
+;* V111 tmp29 [V111 ] ( 0, 0 ) int -> zero-ref "field V88._length (fldOffset=0x8)" P-INDEP
+;* V112 tmp30 [V112 ] ( 0, 0 ) byref -> zero-ref single-def "field V89._reference (fldOffset=0x0)" P-INDEP
+;* V113 tmp31 [V113 ] ( 0, 0 ) int -> zero-ref "field V89._length (fldOffset=0x8)" P-INDEP
+;* V114 tmp32 [V114 ] ( 0, 0 ) byref -> zero-ref "field V91._reference (fldOffset=0x0)" P-INDEP
+;* V115 tmp33 [V115 ] ( 0, 0 ) int -> zero-ref "field V91._length (fldOffset=0x8)" P-INDEP
+;* V116 tmp34 [V116 ] ( 0, 0 ) byref -> zero-ref "field V92._reference (fldOffset=0x0)" P-INDEP
+;* V117 tmp35 [V117 ] ( 0, 0 ) int -> zero-ref "field V92._length (fldOffset=0x8)" P-INDEP
+; V118 tmp36 [V118,T06] ( 2, 24 ) byref -> x28 "field V94._reference (fldOffset=0x0)" P-INDEP
+; V119 tmp37 [V119,T04] ( 2, 32 ) int -> x0 "field V94._length (fldOffset=0x8)" P-INDEP
+;* V120 tmp38 [V120 ] ( 0, 0 ) byref -> zero-ref "field V96._reference (fldOffset=0x0)" P-INDEP
+;* V121 tmp39 [V121 ] ( 0, 0 ) int -> zero-ref "field V96._length (fldOffset=0x8)" P-INDEP
+; V122 tmp40 [V122,T20] ( 2, 3.96) byref -> x28 "field V100._reference (fldOffset=0x0)" P-INDEP
+; V123 tmp41 [V123,T21] ( 2, 3.96) int -> x0 "field V100._length (fldOffset=0x8)" P-INDEP
+; V124 rat0 [V124,T24] ( 3, 12 ) simd16 -> d16 "ReplaceWithLclVar is creating a new local variable"
;
-; Lcl frame size = 8
+; Lcl frame size = 0
G_M38805_IG01:
stp fp, lr, [sp, #-0x90]!
- stp d8, d9, [sp, #0x18]
- stp d10, d11, [sp, #0x28]
- stp d12, d13, [sp, #0x38]
- stp x19, x20, [sp, #0x48]
- stp x21, x22, [sp, #0x58]
- stp x23, x24, [sp, #0x68]
- stp x25, x26, [sp, #0x78]
- str x27, [sp, #0x88]
+ stp d8, d9, [sp, #0x10]
+ stp d10, d11, [sp, #0x20]
+ stp d12, d13, [sp, #0x30]
+ stp x19, x20, [sp, #0x40]
+ stp x21, x22, [sp, #0x50]
+ stp x23, x24, [sp, #0x60]
+ stp x25, x26, [sp, #0x70]
+ stp x27, x28, [sp, #0x80]
mov fp, sp
mov x19, x2
- ;; size=44 bbWeight=1 PerfScore 10.00
+ mov w20, w3
+ mov w21, w4
+ mov w22, w5
+ ;; size=56 bbWeight=1 PerfScore 11.50
G_M38805_IG02:
- mov w20, wzr
- mov x21, x0
- mov w22, w1
- mov x23, x21
- mov w24, w22
- uxth w0, w3
- dup v8.8h, w0
- uxth w0, w4
- dup v9.8h, w0
- uxth w0, w5
- dup v10.8h, w0
- cmp w24, #8
- blt G_M38805_IG10
- ;; size=52 bbWeight=1 PerfScore 11.50
+ mov w23, wzr
+ mov x24, x0
+ mov w25, w1
+ cmp w25, #16
+ blt G_M38805_IG11
+ ;; size=20 bbWeight=1 PerfScore 3.00
G_M38805_IG03:
- ldr q16, [x23]
+ uxth w0, w20
+ dup v8.8h, w0
+ uxth w0, w21
+ dup v9.8h, w0
+ uxth w0, w22
+ dup v10.8h, w0
+ ;; size=24 bbWeight=0.50 PerfScore 3.75
+G_M38805_IG04:
+ ldr q16, [x24]
cmeq v17.8h, v16.8h, v8.8h
cmeq v18.8h, v16.8h, v9.8h
orr v17.16b, v17.16b, v18.16b
cmeq v16.8h, v16.8h, v10.8h
orr v16.16b, v17.16b, v16.16b
umaxp v17.4s, v16.4s, v16.4s
umov x0, v17.d[0]
cmp x0, #0
- beq G_M38805_IG09
+ beq G_M38805_IG10
;; size=40 bbWeight=4 PerfScore 42.00
-G_M38805_IG04:
+G_M38805_IG05:
movi v17.16b, #0x80
and v16.16b, v16.16b, v17.16b
ldr q17, [@RWD00]
ushl v16.16b, v16.16b, v17.16b
uxtl2 v17.8h, v16.16b
shl v17.8h, v17.8h, #8
uaddw v16.8h, v17.8h, v16.8b
addv h16, v16.8h
umov w0, v16.h[0]
mov w1, #0xD1FFAB1E
- and w25, w0, w1
+ and w26, w0, w1
;; size=44 bbWeight=2 PerfScore 24.00
-G_M38805_IG05:
- rbit w0, w25
- clz w0, w0
- add w1, w20, w0, LSR #1
- ldr w26, [x19, #0x08]
- ldr x27, [x19, #0x10]
- ldr w0, [x19, #0x18]
- cmp w26, w0
- blo G_M38805_IG07
- ;; size=32 bbWeight=16 PerfScore 208.00
G_M38805_IG06:
+ rbit w0, w26
+ clz w0, w0
+ add w1, w23, w0, LSR #1
+ ldr w27, [x19, #0x08]
+ ldr x28, [x19, #0x10]
+ ldr w0, [x19, #0x18]
+ cmp w27, w0
+ blo G_M38805_IG08
+ ;; size=32 bbWeight=16 PerfScore 208.00
+G_M38805_IG07:
mov x0, x19
movz x2, #0xD1FFAB1E // code for System.Collections.Generic.ValueListBuilder`1[int]:AddWithResize(int):this
movk x2, #0xD1FFAB1E LSL #16
movk x2, #0xD1FFAB1E LSL #32
ldr x2, [x2]
mov v11.d[0], v8.d[1]
mov v12.d[0], v9.d[1]
mov v13.d[0], v10.d[1]
blr x2 // code for System.Collections.Generic.ValueListBuilder`1[int]:AddWithResize(int):this
mov v8.d[1], v11.d[0]
mov v9.d[1], v12.d[0]
mov v10.d[1], v13.d[0]
- b G_M38805_IG08
+ b G_M38805_IG09
;; size=52 bbWeight=8 PerfScore 104.00
-G_M38805_IG07:
- str w1, [x27, w26, UXTW #2]
- add w0, w26, #1
+G_M38805_IG08:
+ str w1, [x28, w27, UXTW #2]
+ add w0, w27, #1
str w0, [x19, #0x08]
;; size=12 bbWeight=8 PerfScore 20.00
-G_M38805_IG08:
- sub w0, w25, #1
- and w25, w25, w0
- cbnz w25, G_M38805_IG05
- ;; size=12 bbWeight=16 PerfScore 32.00
G_M38805_IG09:
- add w20, w20, #8
- add x23, x23, #16
- sub w24, w24, #8
- cmp w24, #8
- bge G_M38805_IG03
- ;; size=20 bbWeight=8 PerfScore 24.00
+ sub w0, w26, #1
+ and w26, w26, w0
+ cbnz w26, G_M38805_IG06
+ ;; size=12 bbWeight=16 PerfScore 32.00
G_M38805_IG10:
- cbz w24, G_M38805_IG16
- ;; size=4 bbWeight=1 PerfScore 1.00
+ add w23, w23, #8
+ add x24, x24, #16
+ sub w25, w25, #8
+ cmp w25, #8
+ bge G_M38805_IG04
+ ;; size=20 bbWeight=4 PerfScore 12.00
G_M38805_IG11:
- sub w20, w22, #8
- mov w0, w20
- cmp w0, w22
- bhi G_M38805_IG17
- ubfiz x0, x0, #1, #32
- add x0, x21, x0
- ldr q16, [x0]
- cmeq v17.8h, v16.8h, v8.8h
- cmeq v18.8h, v16.8h, v9.8h
- orr v17.16b, v17.16b, v18.16b
- cmeq v16.8h, v16.8h, v10.8h
- orr v16.16b, v17.16b, v16.16b
- movi v17.16b, #0x80
- and v16.16b, v16.16b, v17.16b
- ldr q17, [@RWD00]
- ushl v16.16b, v16.16b, v17.16b
- uxtl2 v17.8h, v16.16b
- shl v17.8h, v17.8h, #8
- uaddw v16.8h, v17.8h, v16.8b
- addv h16, v16.8h
- umov w0, v16.h[0]
- mov w1, #0xD1FFAB1E
- and w0, w0, w1
- neg w1, w24, LSL #1
- add w1, w1, #16
- mov w2, #1
- lsl w1, w2, w1
- sub w1, w1, #1
- bic w21, w0, w1
- cbz w21, G_M38805_IG16
- ;; size=120 bbWeight=0.50 PerfScore 13.75
+ mov w26, wzr
+ cbz w25, G_M38805_IG15
+ ;; size=8 bbWeight=1 PerfScore 1.50
G_M38805_IG12:
- rbit w0, w21
- clz w0, w0
- add w1, w20, w0, LSR #1
- ldr w22, [x19, #0x08]
- ldr x23, [x19, #0x10]
+ ldrh w0, [x24, w26, UXTW #2]
+ uxth w1, w21
+ uxth w2, w22
+ cmp w0, w20, UXTH
+ ccmp w0, w1, z, ne
+ ccmp w0, w2, z, ne
+ bne G_M38805_IG14
+ add w1, w23, w26
+ ldr w27, [x19, #0x08]
+ ldr x28, [x19, #0x10]
ldr w0, [x19, #0x18]
- cmp w22, w0
- blo G_M38805_IG14
- ;; size=32 bbWeight=4 PerfScore 52.00
-G_M38805_IG13:
+ cmp w27, w0
+ blo G_M38805_IG13
mov x0, x19
movz x2, #0xD1FFAB1E // code for System.Collections.Generic.ValueListBuilder`1[int]:AddWithResize(int):this
movk x2, #0xD1FFAB1E LSL #16
movk x2, #0xD1FFAB1E LSL #32
ldr x2, [x2]
blr x2 // code for System.Collections.Generic.ValueListBuilder`1[int]:AddWithResize(int):this
- b G_M38805_IG15
- ;; size=28 bbWeight=2 PerfScore 14.00
-G_M38805_IG14:
- str w1, [x23, w22, UXTW #2]
- add w0, w22, #1
+ b G_M38805_IG14
+ ;; size=80 bbWeight=1.98 PerfScore 49.50
+G_M38805_IG13:
+ str w1, [x28, w27, UXTW #2]
+ add w0, w27, #1
str w0, [x19, #0x08]
- ;; size=12 bbWeight=2 PerfScore 5.00
+ ;; size=12 bbWeight=1.98 PerfScore 4.95
+G_M38805_IG14:
+ add w26, w26, #1
+ cmp w26, w25
+ blt G_M38805_IG12
+ ;; size=12 bbWeight=3.96 PerfScore 7.92
G_M38805_IG15:
- sub w0, w21, #1
- and w21, w21, w0
- cbnz w21, G_M38805_IG12
- ;; size=12 bbWeight=4 PerfScore 8.00
-G_M38805_IG16:
- ldr x27, [sp, #0x88]
- ldp x25, x26, [sp, #0x78]
- ldp x23, x24, [sp, #0x68]
- ldp x21, x22, [sp, #0x58]
- ldp x19, x20, [sp, #0x48]
- ldp d12, d13, [sp, #0x38]
- ldp d10, d11, [sp, #0x28]
- ldp d8, d9, [sp, #0x18]
+ ldp x27, x28, [sp, #0x80]
+ ldp x25, x26, [sp, #0x70]
+ ldp x23, x24, [sp, #0x60]
+ ldp x21, x22, [sp, #0x50]
+ ldp x19, x20, [sp, #0x40]
+ ldp d12, d13, [sp, #0x30]
+ ldp d10, d11, [sp, #0x20]
+ ldp d8, d9, [sp, #0x10]
ldp fp, lr, [sp], #0x90
ret lr
- ;; size=40 bbWeight=1 PerfScore 11.00
-G_M38805_IG17:
- movz x0, #0xD1FFAB1E // code for System.ThrowHelper:ThrowArgumentOutOfRangeException()
- movk x0, #0xD1FFAB1E LSL #16
- movk x0, #0xD1FFAB1E LSL #32
- ldr x0, [x0]
- blr x0 // code for System.ThrowHelper:ThrowArgumentOutOfRangeException()
- brk #0
- ;; size=24 bbWeight=0 PerfScore 0.00
+ ;; size=40 bbWeight=1 PerfScore 10.00
RWD00 dq 00FFFEFDFCFBFAF9h, 00FFFEFDFCFBFAF9h
-; Total bytes of code 580, prolog size 44, PerfScore 580.25, instruction count 145, allocated bytes for code 580 (MethodHash=3038686a) for method System.String:MakeSeparatorListVectorized(System.ReadOnlySpan`1[char],byref,char,char,char) (FullOpts)
+; Total bytes of code 464, prolog size 56, PerfScore 534.12, instruction count 116, allocated bytes for code 464 (MethodHash=3038686a) for method System.String:MakeSeparatorListVectorized(System.ReadOnlySpan`1[char],byref,char,char,char) (FullOpts)
; ============================================================
```
-20 (-2.84 % of base) - System.Linq.Parallel.OrderPreservingPipeliningSpoolingTask`2+<>c__DisplayClass12_0[byte,System.Nullable`1[int]]:b__0():this
```diff
; Assembly listing for method System.Linq.Parallel.OrderPreservingPipeliningSpoolingTask`2+<>c__DisplayClass12_0[byte,System.Nullable`1[int]]:b__0():this (FullOpts)
; Emitting BLENDED_CODE for arm64 + SVE on Unix
; FullOpts code
; optimized code
; fp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 15 single block inlinees; 6 inlinees without PGO data
; Final local variable assignments
;
; V00 this [V00,T01] ( 13, 43 ) ref -> x19 this class-hnd single-def c__DisplayClass12_0[byte,System.Nullable`1[int]]>
; V01 loc0 [V01,T03] ( 10, 37 ) int -> x20
;# V02 OutArgs [V02 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V03 tmp1 [V03,T00] ( 13,104 ) ref -> x25 class-hnd exact "NewObj constructor temp"
-; V04 tmp2 [V04,T11] ( 2, 16 ) ref -> x24 class-hnd "Inlining Arg"
+; V03 tmp1 [V03,T00] ( 13,104 ) ref -> x23 class-hnd exact "NewObj constructor temp"
+; V04 tmp2 [V04,T11] ( 2, 16 ) ref -> x22 class-hnd "Inlining Arg"
; V05 tmp3 [V05,T05] ( 3, 24 ) ref -> x1 class-hnd exact "Inlining Arg"
; V06 tmp4 [V06,T12] ( 2, 16 ) ref -> x0 class-hnd "Inlining Arg"
; V07 tmp5 [V07,T13] ( 2, 16 ) ref -> x4 class-hnd "Inlining Arg"
; V08 tmp6 [V08,T14] ( 2, 16 ) ref -> x2 class-hnd "Inlining Arg"
; V09 tmp7 [V09,T15] ( 2, 16 ) ref -> x3 class-hnd "Inlining Arg"
; V10 tmp8 [V10,T16] ( 2, 16 ) ref -> x5 class-hnd "Inlining Arg"
; V11 tmp9 [V11,T17] ( 2, 16 ) ref -> x6 class-hnd "Inlining Arg"
; V12 tmp10 [V12,T19] ( 2, 16 ) ubyte -> x7 "Inlining Arg"
;* V13 tmp11 [V13,T25] ( 0, 0 ) ref -> zero-ref class-hnd exact "impAppendStmt"
-; V14 tmp12 [V14,T06] ( 3, 24 ) ref -> x24 class-hnd "Inlining Arg"
+; V14 tmp12 [V14,T06] ( 3, 24 ) ref -> x22 class-hnd "Inlining Arg"
;* V15 tmp13 [V15 ] ( 0, 0 ) struct ( 8) zero-ref "spilled call-like call argument"
;* V16 tmp14 [V16 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V17 tmp15 [V17 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Inlining Arg"
-; V18 tmp16 [V18,T20] ( 3, 10 ) ref -> x26 class-hnd "Inline return value spill temp"
+; V18 tmp16 [V18,T20] ( 3, 10 ) ref -> x24 class-hnd "Inline return value spill temp"
;* V19 tmp17 [V19 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Inlining Arg"
-; V20 tmp18 [V20,T02] ( 8, 44 ) ref -> x27 class-hnd exact "NewObj constructor temp"
-; V21 tmp19 [V21,T18] ( 2, 16 ) ref -> x28 class-hnd exact "Inlining Arg"
+; V20 tmp18 [V20,T02] ( 8, 44 ) ref -> x25 class-hnd exact "NewObj constructor temp"
+; V21 tmp19 [V21,T18] ( 2, 16 ) ref -> x26 class-hnd exact "Inlining Arg"
;* V22 tmp20 [V22 ] ( 0, 0 ) ref -> zero-ref class-hnd "Inline return value spill temp"
; V23 tmp21 [V23,T23] ( 2, 8 ) ref -> x1 class-hnd exact "dup spill"
; V24 tmp22 [V24,T21] ( 4, 8 ) ref -> x1
; V25 tmp23 [V25,T09] ( 4, 16 ) ref -> x1 class-hnd exact "NewObj constructor temp"
;* V26 tmp24 [V26 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Inline stloc first use temp"
-; V27 tmp25 [V27,T04] ( 4, 24 ) ref -> x24 class-hnd exact "Inlining Arg"
+; V27 tmp25 [V27,T04] ( 4, 24 ) ref -> x22 class-hnd exact "Inlining Arg"
;* V28 tmp26 [V28 ] ( 0, 0 ) ref -> zero-ref class-hnd "Inline return value spill temp"
; V29 tmp27 [V29,T24] ( 2, 8 ) ref -> x1 class-hnd exact "dup spill"
; V30 tmp28 [V30,T22] ( 4, 8 ) ref -> x1
; V31 tmp29 [V31,T10] ( 4, 16 ) ref -> x1 class-hnd exact "NewObj constructor temp"
;* V32 tmp30 [V32 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Inline stloc first use temp"
;* V33 tmp31 [V33 ] ( 0, 0 ) ref -> zero-ref "field V15._source (fldOffset=0x0)" P-INDEP
;* V34 tmp32 [V34 ] ( 0, 0 ) ref -> zero-ref "field V16._source (fldOffset=0x0)" P-INDEP
; V35 tmp33 [V35,T07] ( 3, 24 ) ref -> x14 "arr expr"
; V36 tmp34 [V36,T08] ( 3, 24 ) ref -> x14 "arr expr"
-; V37 cse0 [V37,T27] ( 2, 4.50) byref -> x23 hoist "CSE #04: moderate"
-; V38 cse1 [V38,T28] ( 1, 0.50) ref -> x22 hoist "CSE #03: moderate"
-; V39 cse2 [V39,T30] ( 3, 3 ) long -> x21 "CSE #02: moderate"
-; V40 cse3 [V40,T26] ( 3, 6 ) byref -> x0 "CSE #05: moderate"
-; V41 rat0 [V41,T32] ( 3, 2 ) byref -> x23 "TLS field access"
-; V42 rat1 [V42,T31] ( 3, 3 ) long -> x0 "TLS access"
-; V43 rat2 [V43,T29] ( 3, 3 ) byref -> x23 "ThreadStaticBlockBase access"
+; V37 cse0 [V37,T27] ( 2, 4.50) byref -> x21 hoist "CSE #02: moderate"
+; V38 cse1 [V38,T26] ( 3, 6 ) byref -> x0 "CSE #03: moderate"
+; V39 rat0 [V39,T30] ( 3, 2 ) byref -> x21 "TLS field access"
+; V40 rat1 [V40,T29] ( 3, 3 ) long -> x0 "TLS access"
+; V41 rat2 [V41,T28] ( 3, 3 ) byref -> x21 "ThreadStaticBlockBase access"
;
; Lcl frame size = 0
G_M26296_IG01:
- stp fp, lr, [sp, #-0x60]!
+ stp fp, lr, [sp, #-0x50]!
stp x19, x20, [sp, #0x10]
stp x21, x22, [sp, #0x20]
stp x23, x24, [sp, #0x30]
stp x25, x26, [sp, #0x40]
- stp x27, x28, [sp, #0x50]
mov fp, sp
mov x19, x0
- ;; size=32 bbWeight=1 PerfScore 7.00
+ ;; size=28 bbWeight=1 PerfScore 6.00
G_M26296_IG02:
mov w20, wzr
ldr w0, [x19, #0x48]
cmp w0, #0
ble G_M26296_IG12
;; size=16 bbWeight=1 PerfScore 5.00
G_M26296_IG03:
- movz x21, #0xD1FFAB1E
- movk x21, #0xD1FFAB1E LSL #16
- movk x21, #0xD1FFAB1E LSL #32
- ldr x22, [x21, #0xD1FFAB1E]
mrs x0, tpidr_el0
ldr w1, [x0, #0xD1FFAB1E]
cmp w1, #10
ble G_M26296_IG13
ldr x0, [x0, #0xD1FFAB1E]
- ldr x23, [x0, #0x50]
- cbz x23, G_M26296_IG13
- ;; size=44 bbWeight=0.50 PerfScore 8.50
+ ldr x21, [x0, #0x50]
+ cbz x21, G_M26296_IG13
+ ;; size=28 bbWeight=0.50 PerfScore 6.25
G_M26296_IG04:
- ldr x24, [x19, #0x08]
+ ldr x22, [x19, #0x08]
movz x0, #0xD1FFAB1E
movk x0, #0xD1FFAB1E LSL #16
movk x0, #0xD1FFAB1E LSL #32
bl CORINFO_HELP_NEWSFAST
- mov x25, x0
- ldr x14, [x24, #0x08]
+ mov x23, x0
+ ldr x14, [x22, #0x08]
ldr w15, [x14, #0x08]
cmp w20, w15
bhs G_M26296_IG15
add x14, x14, #16
ldr x0, [x14, w20, UXTW #3]
ldp x1, x2, [x19, #0x10]
ldp x3, x4, [x19, #0x20]
ldp x5, x14, [x19, #0x30]
ldr w15, [x14, #0x08]
cmp w20, w15
bhs G_M26296_IG15
add x14, x14, #16
ldr x6, [x14, w20, UXTW #3]
ldrb w7, [x19, #0x4C]
- str w20, [x25, #0x10]
- add x14, x25, #8
+ str w20, [x23, #0x10]
+ add x14, x23, #8
mov x15, x1
bl CORINFO_HELP_ASSIGN_REF
- add x14, x25, #32
+ add x14, x23, #32
mov x15, x0
bl CORINFO_HELP_ASSIGN_REF
- add x14, x25, #24
+ add x14, x23, #24
mov x15, x1
bl CORINFO_HELP_ASSIGN_REF
- add x14, x25, #56
+ add x14, x23, #56
mov x15, x4
bl CORINFO_HELP_ASSIGN_REF
- add x14, x25, #40
+ add x14, x23, #40
mov x15, x2
bl CORINFO_HELP_ASSIGN_REF
- add x14, x25, #48
+ add x14, x23, #48
mov x15, x3
bl CORINFO_HELP_ASSIGN_REF
- str w20, [x25, #0x14]
- add x14, x25, #64
+ str w20, [x23, #0x14]
+ add x14, x23, #64
mov x15, x5
bl CORINFO_HELP_ASSIGN_REF
- add x14, x25, #72
+ add x14, x23, #72
mov x15, x6
bl CORINFO_HELP_ASSIGN_REF
- strb w7, [x25, #0x50]
- ldr x24, [x19, #0x40]
- ldr x26, [x23, #0x10]
- cbz x24, G_M26296_IG14
+ strb w7, [x23, #0x50]
+ ldr x22, [x19, #0x40]
+ ldr x24, [x21, #0x10]
+ cbz x22, G_M26296_IG14
movz x0, #0xD1FFAB1E
movk x0, #0xD1FFAB1E LSL #16
movk x0, #0xD1FFAB1E LSL #32
bl CORINFO_HELP_NEWSFAST
- mov x27, x0
+ mov x25, x0
movz x0, #0xD1FFAB1E
- movk x0, #0xD1FFAB1E LSL #16
movk x0, #0xD1FFAB1E LSL #32
- ldr x28, [x0]
- cbz x26, G_M26296_IG07
- ;; size=244 bbWeight=4 PerfScore 298.00
+ ldr x26, [x0]
+ cbz x24, G_M26296_IG07
+ ;; size=240 bbWeight=4 PerfScore 296.00
G_M26296_IG05:
- ldr x1, [x27, #0x28]
+ ldr x1, [x25, #0x28]
cbnz x1, G_M26296_IG06
movz x0, #0xD1FFAB1E
movk x0, #0xD1FFAB1E LSL #16
movk x0, #0xD1FFAB1E LSL #32
bl CORINFO_HELP_NEWSFAST
mov x1, x0
mov w14, #1
stlur w14, [x1, #0x3C]
- add x14, x27, #40
+ add x14, x25, #40
mov x15, x1
bl CORINFO_HELP_ASSIGN_REF
;; size=48 bbWeight=2 PerfScore 21.00
G_M26296_IG06:
add x14, x1, #48
- mov x15, x26
+ mov x15, x24
bl CORINFO_HELP_ASSIGN_REF
;; size=12 bbWeight=2 PerfScore 4.00
G_M26296_IG07:
- mov x0, x27
- mov x1, x28
- mov x2, x25
- mov x6, x24
+ mov x0, x25
+ mov x1, x26
+ mov x2, x23
+ mov x6, x22
mov x3, xzr
mov w4, #5
mov w5, #0xD1FFAB1E
movz x7, #0xD1FFAB1E // code for System.Threading.Tasks.Task:TaskConstructorCore(System.Delegate,System.Object,System.Threading.CancellationToken,int,int,System.Threading.Tasks.TaskScheduler):this
movk x7, #0xD1FFAB1E LSL #16
movk x7, #0xD1FFAB1E LSL #32
ldr x7, [x7]
blr x7 // code for System.Threading.Tasks.Task:TaskConstructorCore(System.Delegate,System.Object,System.Threading.CancellationToken,int,int,System.Threading.Tasks.TaskScheduler):this
movz x0, #0xD1FFAB1E // code for System.Threading.ExecutionContext:Capture():System.Threading.ExecutionContext
movk x0, #0xD1FFAB1E LSL #16
movk x0, #0xD1FFAB1E LSL #32
ldr x0, [x0]
blr x0 // code for System.Threading.ExecutionContext:Capture():System.Threading.ExecutionContext
- mov x24, x0
- cbz x24, G_M26296_IG10
+ mov x22, x0
+ cbz x22, G_M26296_IG10
;; size=76 bbWeight=4 PerfScore 64.00
G_M26296_IG08:
- ldr x0, [x21]
- cmp x24, x0
+ movz x0, #0xD1FFAB1E
+ movk x0, #0xD1FFAB1E LSL #32
+ ldr x0, [x0]
+ cmp x22, x0
beq G_M26296_IG11
- ldr x1, [x27, #0x28]
+ ldr x1, [x25, #0x28]
cbnz x1, G_M26296_IG09
movz x0, #0xD1FFAB1E
movk x0, #0xD1FFAB1E LSL #16
movk x0, #0xD1FFAB1E LSL #32
bl CORINFO_HELP_NEWSFAST
mov x1, x0
mov w14, #1
stlur w14, [x1, #0x3C]
- add x14, x27, #40
+ add x14, x25, #40
mov x15, x1
bl CORINFO_HELP_ASSIGN_REF
- ;; size=60 bbWeight=2 PerfScore 30.00
+ ;; size=68 bbWeight=2 PerfScore 32.00
G_M26296_IG09:
add x14, x1, #8
- mov x15, x24
+ mov x15, x22
bl CORINFO_HELP_ASSIGN_REF
b G_M26296_IG11
;; size=16 bbWeight=2 PerfScore 6.00
G_M26296_IG10:
- add x0, x27, #52
+ add x0, x25, #52
ldapr w1, [x0]
orr w1, w1, #0xD1FFAB1E
stlr w1, [x0]
;; size=16 bbWeight=2 PerfScore 10.00
G_M26296_IG11:
- mov x0, x27
+ mov x0, x25
mov w1, wzr
movz x2, #0xD1FFAB1E // code for System.Threading.Tasks.Task:ScheduleAndStart(bool):this
movk x2, #0xD1FFAB1E LSL #16
movk x2, #0xD1FFAB1E LSL #32
ldr x2, [x2]
blr x2 // code for System.Threading.Tasks.Task:ScheduleAndStart(bool):this
add w20, w20, #1
ldr w0, [x19, #0x48]
cmp w20, w0
blt G_M26296_IG04
;; size=44 bbWeight=4 PerfScore 46.00
G_M26296_IG12:
- ldp x27, x28, [sp, #0x50]
ldp x25, x26, [sp, #0x40]
ldp x23, x24, [sp, #0x30]
ldp x21, x22, [sp, #0x20]
ldp x19, x20, [sp, #0x10]
- ldp fp, lr, [sp], #0x60
+ ldp fp, lr, [sp], #0x50
ret lr
- ;; size=28 bbWeight=1 PerfScore 7.00
+ ;; size=24 bbWeight=1 PerfScore 6.00
G_M26296_IG13:
mov w0, #10
movz x1, #0xD1FFAB1E // code for CORINFO_HELP_GETDYNAMIC_GCTHREADSTATIC_BASE_NOCTOR_OPTIMIZED
movk x1, #0xD1FFAB1E LSL #16
movk x1, #0xD1FFAB1E LSL #32
ldr x1, [x1]
blr x1 // code for CORINFO_HELP_GETDYNAMIC_GCTHREADSTATIC_BASE_NOCTOR_OPTIMIZED
- mov x23, x0
+ mov x21, x0
b G_M26296_IG04
;; size=32 bbWeight=0 PerfScore 0.00
G_M26296_IG14:
mov w0, #47
movz x1, #0xD1FFAB1E // code for System.ThrowHelper:ThrowArgumentNullException(int)
movk x1, #0xD1FFAB1E LSL #16
movk x1, #0xD1FFAB1E LSL #32
ldr x1, [x1]
blr x1 // code for System.ThrowHelper:ThrowArgumentNullException(int)
brk #0
;; size=28 bbWeight=0 PerfScore 0.00
G_M26296_IG15:
bl CORINFO_HELP_RNGCHKFAIL
brk #0
;; size=8 bbWeight=0 PerfScore 0.00
-; Total bytes of code 704, prolog size 28, PerfScore 506.50, instruction count 176, allocated bytes for code 704 (MethodHash=386d9947) for method System.Linq.Parallel.OrderPreservingPipeliningSpoolingTask`2+<>c__DisplayClass12_0[byte,System.Nullable`1[int]]:b__0():this (FullOpts)
+; Total bytes of code 684, prolog size 24, PerfScore 502.25, instruction count 171, allocated bytes for code 684 (MethodHash=386d9947) for method System.Linq.Parallel.OrderPreservingPipeliningSpoolingTask`2+<>c__DisplayClass12_0[byte,System.Nullable`1[int]]:b__0():this (FullOpts)
; ============================================================
```
Note: some changes were skipped as they were too large to fit into a comment.