## Top method regressions
38 (3.07 % of base) - System.IO.Hashing.XxHash128:HashLength129To240(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128
```diff
; Assembly listing for method System.IO.Hashing.XxHash128:HashLength129To240(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
; FullOpts code
; optimized code
; rbp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 70 single block inlinees; 80 inlinees without PGO data
; Final local variable assignments
;
; V00 arg0 [V00,T01] ( 19, 16 ) long -> rdi single-def
; V01 arg1 [V01,T07] ( 6, 6 ) int -> rsi single-def
; V02 arg2 [V02,T03] ( 18, 15 ) long -> [rbp-0x20] single-def
-; V03 loc0 [V03,T00] ( 22, 19 ) long -> rcx ld-addr-op
-; V04 loc1 [V04,T02] ( 20, 17 ) long -> r8 ld-addr-op
-; V05 loc2 [V05,T48] ( 4, 3 ) int -> r9
+; V03 loc0 [V03,T00] ( 22, 19 ) long -> rax ld-addr-op
+; V04 loc1 [V04,T02] ( 20, 17 ) long -> rcx ld-addr-op
+; V05 loc2 [V05,T48] ( 4, 3 ) int -> r8
;# V06 OutArgs [V06 ] ( 1, 1 ) struct ( 0) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V07 tmp1 [V07 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V08 tmp2 [V08 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
-; V09 tmp3 [V09,T08] ( 4, 8 ) long -> r8 "Inlining Arg"
-; V10 tmp4 [V10,T27] ( 2, 4 ) long -> rcx "impAppendStmt"
-; V11 tmp5 [V11,T28] ( 2, 4 ) long -> rax "impAppendStmt"
+; V09 tmp3 [V09,T08] ( 4, 8 ) long -> rcx "Inlining Arg"
+; V10 tmp4 [V10,T27] ( 2, 4 ) long -> rax "impAppendStmt"
+; V11 tmp5 [V11,T28] ( 2, 4 ) long -> rdx "impAppendStmt"
;* V12 tmp6 [V12 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
-; V13 tmp7 [V13,T29] ( 2, 4 ) long -> rax "impAppendStmt"
+; V13 tmp7 [V13,T29] ( 2, 4 ) long -> rcx "impAppendStmt"
; V14 tmp8 [V14,T30] ( 2, 4 ) long -> r8 "impAppendStmt"
;* V15 tmp9 [V15 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V16 tmp10 [V16 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V17 tmp11 [V17 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V18 tmp12 [V18 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V19 tmp13 [V19 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V20 tmp14 [V20 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V21 tmp15 [V21 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V22 tmp16 [V22 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V23 tmp17 [V23 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V24 tmp18 [V24 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V25 tmp19 [V25 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V26 tmp20 [V26 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V27 tmp21 [V27 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V28 tmp22 [V28 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V29 tmp23 [V29 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V30 tmp24 [V30 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V31 tmp25 [V31 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V32 tmp26 [V32 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V33 tmp27 [V33 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V34 tmp28 [V34 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V35 tmp29 [V35 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V36 tmp30 [V36 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V37 tmp31 [V37 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V38 tmp32 [V38 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
-; V39 tmp33 [V39,T09] ( 4, 8 ) long -> r9 "Inlining Arg"
+; V39 tmp33 [V39,T09] ( 4, 8 ) long -> r8 "Inlining Arg"
;* V40 tmp34 [V40 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
-; V41 tmp35 [V41,T10] ( 4, 8 ) long -> rbx "Inlining Arg"
-; V42 tmp36 [V42,T31] ( 2, 4 ) long -> rax "impAppendStmt"
-; V43 tmp37 [V43,T32] ( 2, 4 ) long -> rcx "impAppendStmt"
+; V41 tmp35 [V41,T10] ( 4, 8 ) long -> r9 "Inlining Arg"
+; V42 tmp36 [V42,T31] ( 2, 4 ) long -> rdx "impAppendStmt"
+; V43 tmp37 [V43,T32] ( 2, 4 ) long -> rax "impAppendStmt"
;* V44 tmp38 [V44 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
-; V45 tmp39 [V45,T33] ( 2, 4 ) long -> r8 "impAppendStmt"
-; V46 tmp40 [V46,T34] ( 2, 4 ) long -> rax "impAppendStmt"
+; V45 tmp39 [V45,T33] ( 2, 4 ) long -> rcx "impAppendStmt"
+; V46 tmp40 [V46,T34] ( 2, 4 ) long -> rdx "impAppendStmt"
;* V47 tmp41 [V47 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V48 tmp42 [V48 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V49 tmp43 [V49 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V50 tmp44 [V50 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V51 tmp45 [V51 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V52 tmp46 [V52 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V53 tmp47 [V53 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V54 tmp48 [V54 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V55 tmp49 [V55 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V56 tmp50 [V56 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V57 tmp51 [V57 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V58 tmp52 [V58 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V59 tmp53 [V59 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V60 tmp54 [V60 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V61 tmp55 [V61 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V62 tmp56 [V62 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V63 tmp57 [V63 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V64 tmp58 [V64 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V65 tmp59 [V65 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V66 tmp60 [V66 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V67 tmp61 [V67 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V68 tmp62 [V68 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V69 tmp63 [V69 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V70 tmp64 [V70 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
-; V71 tmp65 [V71,T11] ( 4, 8 ) long -> r9 "Inlining Arg"
+; V71 tmp65 [V71,T11] ( 4, 8 ) long -> r8 "Inlining Arg"
;* V72 tmp66 [V72 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
-; V73 tmp67 [V73,T12] ( 4, 8 ) long -> rbx "Inlining Arg"
-; V74 tmp68 [V74,T35] ( 2, 4 ) long -> rax "impAppendStmt"
-; V75 tmp69 [V75,T36] ( 2, 4 ) long -> rcx "impAppendStmt"
+; V73 tmp67 [V73,T12] ( 4, 8 ) long -> r9 "Inlining Arg"
+; V74 tmp68 [V74,T35] ( 2, 4 ) long -> rdx "impAppendStmt"
+; V75 tmp69 [V75,T36] ( 2, 4 ) long -> rax "impAppendStmt"
;* V76 tmp70 [V76 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
-; V77 tmp71 [V77,T37] ( 2, 4 ) long -> rax "impAppendStmt"
-; V78 tmp72 [V78,T38] ( 2, 4 ) long -> r8 "impAppendStmt"
+; V77 tmp71 [V77,T37] ( 2, 4 ) long -> rdx "impAppendStmt"
+; V78 tmp72 [V78,T38] ( 2, 4 ) long -> rcx "impAppendStmt"
;* V79 tmp73 [V79 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V80 tmp74 [V80 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V81 tmp75 [V81 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V82 tmp76 [V82 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V83 tmp77 [V83 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V84 tmp78 [V84 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V85 tmp79 [V85 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V86 tmp80 [V86 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V87 tmp81 [V87 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V88 tmp82 [V88 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V89 tmp83 [V89 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V90 tmp84 [V90 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V91 tmp85 [V91 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V92 tmp86 [V92 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V93 tmp87 [V93 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V94 tmp88 [V94 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V95 tmp89 [V95 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V96 tmp90 [V96 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V97 tmp91 [V97 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V98 tmp92 [V98 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V99 tmp93 [V99 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V100 tmp94 [V100 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V101 tmp95 [V101 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V102 tmp96 [V102 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
-; V103 tmp97 [V103,T13] ( 4, 8 ) long -> r9 "Inlining Arg"
+; V103 tmp97 [V103,T13] ( 4, 8 ) long -> r8 "Inlining Arg"
;* V104 tmp98 [V104 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
-; V105 tmp99 [V105,T14] ( 4, 8 ) long -> rbx "Inlining Arg"
-; V106 tmp100 [V106,T39] ( 2, 4 ) long -> rax "impAppendStmt"
-; V107 tmp101 [V107,T40] ( 2, 4 ) long -> rcx "impAppendStmt"
+; V105 tmp99 [V105,T14] ( 4, 8 ) long -> r9 "Inlining Arg"
+; V106 tmp100 [V106,T39] ( 2, 4 ) long -> rdx "impAppendStmt"
+; V107 tmp101 [V107,T40] ( 2, 4 ) long -> rax "impAppendStmt"
;* V108 tmp102 [V108 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
-; V109 tmp103 [V109,T41] ( 2, 4 ) long -> rax "impAppendStmt"
-; V110 tmp104 [V110,T42] ( 2, 4 ) long -> r8 "impAppendStmt"
+; V109 tmp103 [V109,T41] ( 2, 4 ) long -> rdx "impAppendStmt"
+; V110 tmp104 [V110,T42] ( 2, 4 ) long -> rcx "impAppendStmt"
;* V111 tmp105 [V111 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V112 tmp106 [V112 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V113 tmp107 [V113 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V114 tmp108 [V114 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V115 tmp109 [V115 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V116 tmp110 [V116 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V117 tmp111 [V117 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V118 tmp112 [V118 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V119 tmp113 [V119 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V120 tmp114 [V120 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V121 tmp115 [V121 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V122 tmp116 [V122 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V123 tmp117 [V123 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V124 tmp118 [V124 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V125 tmp119 [V125 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V126 tmp120 [V126 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V127 tmp121 [V127 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V128 tmp122 [V128 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V129 tmp123 [V129 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V130 tmp124 [V130 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V131 tmp125 [V131 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V132 tmp126 [V132 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V133 tmp127 [V133 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V134 tmp128 [V134 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
-; V135 tmp129 [V135,T17] ( 3, 6 ) long -> rcx "Inlining Arg"
-; V136 tmp130 [V136,T18] ( 3, 6 ) long -> r8 "Inlining Arg"
-; V137 tmp131 [V137,T21] ( 4, 4 ) long -> rbx "Inlining Arg"
+; V135 tmp129 [V135,T17] ( 3, 6 ) long -> rax "Inlining Arg"
+; V136 tmp130 [V136,T18] ( 3, 6 ) long -> rcx "Inlining Arg"
+; V137 tmp131 [V137,T21] ( 4, 4 ) long -> r9 "Inlining Arg"
;* V138 tmp132 [V138 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
-; V139 tmp133 [V139,T22] ( 4, 4 ) long -> r15 "Inlining Arg"
-; V140 tmp134 [V140,T60] ( 2, 2 ) long -> rax "impAppendStmt"
-; V141 tmp135 [V141,T61] ( 2, 2 ) long -> rcx "impAppendStmt"
+; V139 tmp133 [V139,T22] ( 4, 4 ) long -> rbx "Inlining Arg"
+; V140 tmp134 [V140,T60] ( 2, 2 ) long -> rdx "impAppendStmt"
+; V141 tmp135 [V141,T61] ( 2, 2 ) long -> rax "impAppendStmt"
;* V142 tmp136 [V142 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
-; V143 tmp137 [V143,T62] ( 2, 2 ) long -> rax "impAppendStmt"
-; V144 tmp138 [V144,T63] ( 2, 2 ) long -> r8 "impAppendStmt"
+; V143 tmp137 [V143,T62] ( 2, 2 ) long -> rdx "impAppendStmt"
+; V144 tmp138 [V144,T63] ( 2, 2 ) long -> rcx "impAppendStmt"
;* V145 tmp139 [V145 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V146 tmp140 [V146 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V147 tmp141 [V147 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V148 tmp142 [V148 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V149 tmp143 [V149 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V150 tmp144 [V150 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V151 tmp145 [V151 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V152 tmp146 [V152 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V153 tmp147 [V153 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V154 tmp148 [V154 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V155 tmp149 [V155 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V156 tmp150 [V156 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V157 tmp151 [V157 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V158 tmp152 [V158 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V159 tmp153 [V159 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V160 tmp154 [V160 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V161 tmp155 [V161 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V162 tmp156 [V162 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V163 tmp157 [V163 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V164 tmp158 [V164 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V165 tmp159 [V165 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V166 tmp160 [V166 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V167 tmp161 [V167 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V168 tmp162 [V168 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
-; V169 tmp163 [V169,T23] ( 4, 4 ) long -> rbx "Inlining Arg"
+; V169 tmp163 [V169,T23] ( 4, 4 ) long -> r9 "Inlining Arg"
;* V170 tmp164 [V170 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
-; V171 tmp165 [V171,T24] ( 4, 4 ) long -> r15 "Inlining Arg"
-; V172 tmp166 [V172,T64] ( 2, 2 ) long -> rax "impAppendStmt"
-; V173 tmp167 [V173,T65] ( 2, 2 ) long -> rcx "impAppendStmt"
+; V171 tmp165 [V171,T24] ( 4, 4 ) long -> rbx "Inlining Arg"
+; V172 tmp166 [V172,T64] ( 2, 2 ) long -> rdx "impAppendStmt"
+; V173 tmp167 [V173,T65] ( 2, 2 ) long -> rax "impAppendStmt"
;* V174 tmp168 [V174 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
-; V175 tmp169 [V175,T66] ( 2, 2 ) long -> rax "impAppendStmt"
-; V176 tmp170 [V176,T67] ( 2, 2 ) long -> r8 "impAppendStmt"
+; V175 tmp169 [V175,T66] ( 2, 2 ) long -> rdx "impAppendStmt"
+; V176 tmp170 [V176,T67] ( 2, 2 ) long -> rcx "impAppendStmt"
;* V177 tmp171 [V177 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V178 tmp172 [V178 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V179 tmp173 [V179 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V180 tmp174 [V180 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V181 tmp175 [V181 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V182 tmp176 [V182 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V183 tmp177 [V183 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V184 tmp178 [V184 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V185 tmp179 [V185 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V186 tmp180 [V186 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V187 tmp181 [V187 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V188 tmp182 [V188 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V189 tmp183 [V189 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V190 tmp184 [V190 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V191 tmp185 [V191 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V192 tmp186 [V192 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V193 tmp187 [V193 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V194 tmp188 [V194 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V195 tmp189 [V195 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V196 tmp190 [V196 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V197 tmp191 [V197 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V198 tmp192 [V198 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V199 tmp193 [V199 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V200 tmp194 [V200 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
-; V201 tmp195 [V201,T25] ( 4, 4 ) long -> r9 "Inlining Arg"
+; V201 tmp195 [V201,T25] ( 4, 4 ) long -> r8 "Inlining Arg"
;* V202 tmp196 [V202 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
-; V203 tmp197 [V203,T26] ( 4, 4 ) long -> rbx "Inlining Arg"
-; V204 tmp198 [V204,T68] ( 2, 2 ) long -> rax "impAppendStmt"
-; V205 tmp199 [V205,T69] ( 2, 2 ) long -> rcx "impAppendStmt"
+; V203 tmp197 [V203,T26] ( 4, 4 ) long -> r9 "Inlining Arg"
+; V204 tmp198 [V204,T68] ( 2, 2 ) long -> rdx "impAppendStmt"
+; V205 tmp199 [V205,T69] ( 2, 2 ) long -> rax "impAppendStmt"
;* V206 tmp200 [V206 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
-; V207 tmp201 [V207,T70] ( 2, 2 ) long -> rax "impAppendStmt"
-; V208 tmp202 [V208,T71] ( 2, 2 ) long -> r8 "impAppendStmt"
+; V207 tmp201 [V207,T70] ( 2, 2 ) long -> rdx "impAppendStmt"
+; V208 tmp202 [V208,T71] ( 2, 2 ) long -> rcx "impAppendStmt"
;* V209 tmp203 [V209 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V210 tmp204 [V210 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V211 tmp205 [V211 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V212 tmp206 [V212 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V213 tmp207 [V213 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V214 tmp208 [V214 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V215 tmp209 [V215 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V216 tmp210 [V216 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V217 tmp211 [V217 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V218 tmp212 [V218 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V219 tmp213 [V219 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V220 tmp214 [V220 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V221 tmp215 [V221 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V222 tmp216 [V222 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V223 tmp217 [V223 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V224 tmp218 [V224 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V225 tmp219 [V225 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V226 tmp220 [V226 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V227 tmp221 [V227 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V228 tmp222 [V228 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V229 tmp223 [V229 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V230 tmp224 [V230 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V231 tmp225 [V231 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V232 tmp226 [V232 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
-; V233 tmp227 [V233,T15] ( 4, 8 ) long -> r9 "Inlining Arg"
+; V233 tmp227 [V233,T15] ( 4, 8 ) long -> r8 "Inlining Arg"
; V234 tmp228 [V234,T06] ( 5, 10 ) long -> r10 "Inlining Arg"
;* V235 tmp229 [V235 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
; V236 tmp230 [V236,T16] ( 4, 8 ) long -> rdi "Inlining Arg"
-; V237 tmp231 [V237,T43] ( 2, 4 ) long -> rax "impAppendStmt"
-; V238 tmp232 [V238,T44] ( 2, 4 ) long -> rcx "impAppendStmt"
+; V237 tmp231 [V237,T43] ( 2, 4 ) long -> rdx "impAppendStmt"
+; V238 tmp232 [V238,T44] ( 2, 4 ) long -> rax "impAppendStmt"
;* V239 tmp233 [V239 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
-; V240 tmp234 [V240,T45] ( 2, 4 ) long -> rax "impAppendStmt"
-; V241 tmp235 [V241,T46] ( 2, 4 ) long -> r8 "impAppendStmt"
+; V240 tmp234 [V240,T45] ( 2, 4 ) long -> rdx "impAppendStmt"
+; V241 tmp235 [V241,T46] ( 2, 4 ) long -> rcx "impAppendStmt"
;* V242 tmp236 [V242 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V243 tmp237 [V243 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V244 tmp238 [V244 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V245 tmp239 [V245 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V246 tmp240 [V246 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V247 tmp241 [V247 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V248 tmp242 [V248 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V249 tmp243 [V249 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V250 tmp244 [V250 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V251 tmp245 [V251 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V252 tmp246 [V252 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V253 tmp247 [V253 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V254 tmp248 [V254 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V255 tmp249 [V255 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V256 tmp250 [V256 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V257 tmp251 [V257 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V258 tmp252 [V258 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V259 tmp253 [V259 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V260 tmp254 [V260 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V261 tmp255 [V261 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V262 tmp256 [V262 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V263 tmp257 [V263 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V264 tmp258 [V264 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V265 tmp259 [V265 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V266 tmp260 [V266 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V267 tmp261 [V267 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
; V268 tmp262 [V268,T20] ( 5, 5 ) long -> rdx "Inline stloc first use temp"
; V269 tmp263 [V269,T47] ( 2, 4 ) long -> rax "impAppendStmt"
;* V270 tmp264 [V270 ] ( 0, 0 ) struct (16) zero-ref multireg-ret ld-addr-op "NewObj constructor temp"
; V271 tmp265 [V271,T05] ( 6, 12 ) long -> rax "Inlining Arg"
; V272 tmp266 [V272,T19] ( 3, 6 ) long -> rdx "Inlining Arg"
;* V273 tmp267 [V273 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V07.Low64 (fldOffset=0x0)" P-DEP
;* V274 tmp268 [V274 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V07.High64 (fldOffset=0x8)" P-DEP
;* V275 tmp269 [V275 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V23.Item1 (fldOffset=0x0)" P-DEP
;* V276 tmp270 [V276 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V23.Item2 (fldOffset=0x8)" P-DEP
-; V277 tmp271 [V277,T72] ( 2, 2 ) long -> rax "field V24.Item1 (fldOffset=0x0)" P-INDEP
-; V278 tmp272 [V278,T73] ( 2, 2 ) long -> rdx "field V24.Item2 (fldOffset=0x8)" P-INDEP
+; V277 tmp271 [V277,T72] ( 2, 2 ) long -> rdx "field V24.Item1 (fldOffset=0x0)" P-INDEP
+; V278 tmp272 [V278,T73] ( 2, 2 ) long -> r8 "field V24.Item2 (fldOffset=0x8)" P-INDEP
;* V279 tmp273 [V279 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V35.Item1 (fldOffset=0x0)" P-DEP
;* V280 tmp274 [V280 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V35.Item2 (fldOffset=0x8)" P-DEP
-; V281 tmp275 [V281,T74] ( 2, 2 ) long -> rax "field V36.Item1 (fldOffset=0x0)" P-INDEP
-; V282 tmp276 [V282,T75] ( 2, 2 ) long -> rdx "field V36.Item2 (fldOffset=0x8)" P-INDEP
+; V281 tmp275 [V281,T74] ( 2, 2 ) long -> rcx "field V36.Item1 (fldOffset=0x0)" P-INDEP
+; V282 tmp276 [V282,T75] ( 2, 2 ) long -> r8 "field V36.Item2 (fldOffset=0x8)" P-INDEP
;* V283 tmp277 [V283 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V55.Item1 (fldOffset=0x0)" P-DEP
;* V284 tmp278 [V284 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V55.Item2 (fldOffset=0x8)" P-DEP
-; V285 tmp279 [V285,T76] ( 2, 2 ) long -> rax "field V56.Item1 (fldOffset=0x0)" P-INDEP
-; V286 tmp280 [V286,T77] ( 2, 2 ) long -> rdx "field V56.Item2 (fldOffset=0x8)" P-INDEP
+; V285 tmp279 [V285,T76] ( 2, 2 ) long -> rdx "field V56.Item1 (fldOffset=0x0)" P-INDEP
+; V286 tmp280 [V286,T77] ( 2, 2 ) long -> r15 "field V56.Item2 (fldOffset=0x8)" P-INDEP
;* V287 tmp281 [V287 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V67.Item1 (fldOffset=0x0)" P-DEP
;* V288 tmp282 [V288 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V67.Item2 (fldOffset=0x8)" P-DEP
-; V289 tmp283 [V289,T78] ( 2, 2 ) long -> rax "field V68.Item1 (fldOffset=0x0)" P-INDEP
-; V290 tmp284 [V290,T79] ( 2, 2 ) long -> rdx "field V68.Item2 (fldOffset=0x8)" P-INDEP
+; V289 tmp283 [V289,T78] ( 2, 2 ) long -> rdx "field V68.Item1 (fldOffset=0x0)" P-INDEP
+; V290 tmp284 [V290,T79] ( 2, 2 ) long -> r9 "field V68.Item2 (fldOffset=0x8)" P-INDEP
;* V291 tmp285 [V291 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V87.Item1 (fldOffset=0x0)" P-DEP
;* V292 tmp286 [V292 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V87.Item2 (fldOffset=0x8)" P-DEP
-; V293 tmp287 [V293,T80] ( 2, 2 ) long -> rax "field V88.Item1 (fldOffset=0x0)" P-INDEP
-; V294 tmp288 [V294,T81] ( 2, 2 ) long -> rdx "field V88.Item2 (fldOffset=0x8)" P-INDEP
+; V293 tmp287 [V293,T80] ( 2, 2 ) long -> rdx "field V88.Item1 (fldOffset=0x0)" P-INDEP
+; V294 tmp288 [V294,T81] ( 2, 2 ) long -> r15 "field V88.Item2 (fldOffset=0x8)" P-INDEP
;* V295 tmp289 [V295 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V99.Item1 (fldOffset=0x0)" P-DEP
;* V296 tmp290 [V296 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V99.Item2 (fldOffset=0x8)" P-DEP
-; V297 tmp291 [V297,T82] ( 2, 2 ) long -> rax "field V100.Item1 (fldOffset=0x0)" P-INDEP
-; V298 tmp292 [V298,T83] ( 2, 2 ) long -> rdx "field V100.Item2 (fldOffset=0x8)" P-INDEP
+; V297 tmp291 [V297,T82] ( 2, 2 ) long -> rdx "field V100.Item1 (fldOffset=0x0)" P-INDEP
+; V298 tmp292 [V298,T83] ( 2, 2 ) long -> r9 "field V100.Item2 (fldOffset=0x8)" P-INDEP
;* V299 tmp293 [V299 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V119.Item1 (fldOffset=0x0)" P-DEP
;* V300 tmp294 [V300 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V119.Item2 (fldOffset=0x8)" P-DEP
-; V301 tmp295 [V301,T84] ( 2, 2 ) long -> rax "field V120.Item1 (fldOffset=0x0)" P-INDEP
-; V302 tmp296 [V302,T85] ( 2, 2 ) long -> rdx "field V120.Item2 (fldOffset=0x8)" P-INDEP
+; V301 tmp295 [V301,T84] ( 2, 2 ) long -> rdx "field V120.Item1 (fldOffset=0x0)" P-INDEP
+; V302 tmp296 [V302,T85] ( 2, 2 ) long -> r15 "field V120.Item2 (fldOffset=0x8)" P-INDEP
;* V303 tmp297 [V303 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V131.Item1 (fldOffset=0x0)" P-DEP
;* V304 tmp298 [V304 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V131.Item2 (fldOffset=0x8)" P-DEP
-; V305 tmp299 [V305,T86] ( 2, 2 ) long -> rax "field V132.Item1 (fldOffset=0x0)" P-INDEP
-; V306 tmp300 [V306,T87] ( 2, 2 ) long -> rdx "field V132.Item2 (fldOffset=0x8)" P-INDEP
+; V305 tmp299 [V305,T86] ( 2, 2 ) long -> rdx "field V132.Item1 (fldOffset=0x0)" P-INDEP
+; V306 tmp300 [V306,T87] ( 2, 2 ) long -> r9 "field V132.Item2 (fldOffset=0x8)" P-INDEP
;* V307 tmp301 [V307 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V153.Item1 (fldOffset=0x0)" P-DEP
;* V308 tmp302 [V308 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V153.Item2 (fldOffset=0x8)" P-DEP
-; V309 tmp303 [V309,T98] ( 2, 1 ) long -> rax "field V154.Item1 (fldOffset=0x0)" P-INDEP
-; V310 tmp304 [V310,T99] ( 2, 1 ) long -> rdx "field V154.Item2 (fldOffset=0x8)" P-INDEP
+; V309 tmp303 [V309,T98] ( 2, 1 ) long -> rdx "field V154.Item1 (fldOffset=0x0)" P-INDEP
+; V310 tmp304 [V310,T99] ( 2, 1 ) long -> r14 "field V154.Item2 (fldOffset=0x8)" P-INDEP
;* V311 tmp305 [V311 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V165.Item1 (fldOffset=0x0)" P-DEP
;* V312 tmp306 [V312 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V165.Item2 (fldOffset=0x8)" P-DEP
-; V313 tmp307 [V313,T100] ( 2, 1 ) long -> rax "field V166.Item1 (fldOffset=0x0)" P-INDEP
-; V314 tmp308 [V314,T101] ( 2, 1 ) long -> rdx "field V166.Item2 (fldOffset=0x8)" P-INDEP
+; V313 tmp307 [V313,T100] ( 2, 1 ) long -> rdx "field V166.Item1 (fldOffset=0x0)" P-INDEP
+; V314 tmp308 [V314,T101] ( 2, 1 ) long -> rbx "field V166.Item2 (fldOffset=0x8)" P-INDEP
;* V315 tmp309 [V315 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V185.Item1 (fldOffset=0x0)" P-DEP
;* V316 tmp310 [V316 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V185.Item2 (fldOffset=0x8)" P-DEP
-; V317 tmp311 [V317,T102] ( 2, 1 ) long -> rax "field V186.Item1 (fldOffset=0x0)" P-INDEP
-; V318 tmp312 [V318,T103] ( 2, 1 ) long -> rdx "field V186.Item2 (fldOffset=0x8)" P-INDEP
+; V317 tmp311 [V317,T102] ( 2, 1 ) long -> rdx "field V186.Item1 (fldOffset=0x0)" P-INDEP
+; V318 tmp312 [V318,T103] ( 2, 1 ) long -> r14 "field V186.Item2 (fldOffset=0x8)" P-INDEP
;* V319 tmp313 [V319 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V197.Item1 (fldOffset=0x0)" P-DEP
;* V320 tmp314 [V320 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V197.Item2 (fldOffset=0x8)" P-DEP
-; V321 tmp315 [V321,T104] ( 2, 1 ) long -> rax "field V198.Item1 (fldOffset=0x0)" P-INDEP
-; V322 tmp316 [V322,T105] ( 2, 1 ) long -> rdx "field V198.Item2 (fldOffset=0x8)" P-INDEP
+; V321 tmp315 [V321,T104] ( 2, 1 ) long -> rdx "field V198.Item1 (fldOffset=0x0)" P-INDEP
+; V322 tmp316 [V322,T105] ( 2, 1 ) long -> rbx "field V198.Item2 (fldOffset=0x8)" P-INDEP
;* V323 tmp317 [V323 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V217.Item1 (fldOffset=0x0)" P-DEP
;* V324 tmp318 [V324 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V217.Item2 (fldOffset=0x8)" P-DEP
-; V325 tmp319 [V325,T106] ( 2, 1 ) long -> rax "field V218.Item1 (fldOffset=0x0)" P-INDEP
-; V326 tmp320 [V326,T107] ( 2, 1 ) long -> rdx "field V218.Item2 (fldOffset=0x8)" P-INDEP
+; V325 tmp319 [V325,T106] ( 2, 1 ) long -> rdx "field V218.Item1 (fldOffset=0x0)" P-INDEP
+; V326 tmp320 [V326,T107] ( 2, 1 ) long -> r15 "field V218.Item2 (fldOffset=0x8)" P-INDEP
;* V327 tmp321 [V327 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V229.Item1 (fldOffset=0x0)" P-DEP
;* V328 tmp322 [V328 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V229.Item2 (fldOffset=0x8)" P-DEP
-; V329 tmp323 [V329,T108] ( 2, 1 ) long -> rax "field V230.Item1 (fldOffset=0x0)" P-INDEP
-; V330 tmp324 [V330,T109] ( 2, 1 ) long -> rdx "field V230.Item2 (fldOffset=0x8)" P-INDEP
+; V329 tmp323 [V329,T108] ( 2, 1 ) long -> rdx "field V230.Item1 (fldOffset=0x0)" P-INDEP
+; V330 tmp324 [V330,T109] ( 2, 1 ) long -> r9 "field V230.Item2 (fldOffset=0x8)" P-INDEP
;* V331 tmp325 [V331 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V250.Item1 (fldOffset=0x0)" P-DEP
;* V332 tmp326 [V332 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V250.Item2 (fldOffset=0x8)" P-DEP
-; V333 tmp327 [V333,T88] ( 2, 2 ) long -> rax "field V251.Item1 (fldOffset=0x0)" P-INDEP
-; V334 tmp328 [V334,T89] ( 2, 2 ) long -> rdx "field V251.Item2 (fldOffset=0x8)" P-INDEP
+; V333 tmp327 [V333,T88] ( 2, 2 ) long -> rdx "field V251.Item1 (fldOffset=0x0)" P-INDEP
+; V334 tmp328 [V334,T89] ( 2, 2 ) long -> rbx "field V251.Item2 (fldOffset=0x8)" P-INDEP
;* V335 tmp329 [V335 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V262.Item1 (fldOffset=0x0)" P-DEP
;* V336 tmp330 [V336 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V262.Item2 (fldOffset=0x8)" P-DEP
-; V337 tmp331 [V337,T90] ( 2, 2 ) long -> rax "field V263.Item1 (fldOffset=0x0)" P-INDEP
-; V338 tmp332 [V338,T91] ( 2, 2 ) long -> rdx "field V263.Item2 (fldOffset=0x8)" P-INDEP
+; V337 tmp331 [V337,T90] ( 2, 2 ) long -> rdx "field V263.Item1 (fldOffset=0x0)" P-INDEP
+; V338 tmp332 [V338,T91] ( 2, 2 ) long -> rdi "field V263.Item2 (fldOffset=0x8)" P-INDEP
;* V339 tmp333 [V339 ] ( 0, 0 ) long -> zero-ref "field V270.Low64 (fldOffset=0x0)" P-INDEP
;* V340 tmp334 [V340 ] ( 0, 0 ) long -> zero-ref "field V270.High64 (fldOffset=0x8)" P-INDEP
-; V341 cse0 [V341,T49] ( 3, 3 ) long -> rdx "CSE #02: conservative"
+; V341 cse0 [V341,T49] ( 3, 3 ) long -> r8 "CSE #02: conservative"
; V342 cse1 [V342,T50] ( 3, 3 ) long -> r9 "CSE #05: conservative"
-; V343 cse2 [V343,T51] ( 3, 3 ) long -> rdx "CSE #07: conservative"
-; V344 cse3 [V344,T52] ( 3, 3 ) long -> r15 "CSE #09: conservative"
-; V345 cse4 [V345,T53] ( 3, 3 ) long -> rdx "CSE #11: conservative"
-; V346 cse5 [V346,T54] ( 3, 3 ) long -> r15 "CSE #13: conservative"
-; V347 cse6 [V347,T55] ( 3, 3 ) long -> rdx "CSE #15: conservative"
-; V348 cse7 [V348,T56] ( 3, 3 ) long -> r15 "CSE #17: conservative"
+; V343 cse2 [V343,T51] ( 3, 3 ) long -> r15 "CSE #07: conservative"
+; V344 cse3 [V344,T52] ( 3, 3 ) long -> rbx "CSE #09: conservative"
+; V345 cse4 [V345,T53] ( 3, 3 ) long -> r15 "CSE #11: conservative"
+; V346 cse5 [V346,T54] ( 3, 3 ) long -> rbx "CSE #13: conservative"
+; V347 cse6 [V347,T55] ( 3, 3 ) long -> r15 "CSE #15: conservative"
+; V348 cse7 [V348,T56] ( 3, 3 ) long -> rbx "CSE #17: conservative"
; V349 cse8 [V349,T57] ( 3, 3 ) long -> rdi "CSE #31: conservative"
-; V350 cse9 [V350,T58] ( 3, 3 ) long -> rdx "CSE #33: conservative"
-; V351 cse10 [V351,T59] ( 3, 3 ) long -> rbx "CSE #36: conservative"
-; V352 cse11 [V352,T92] ( 3, 1.50) long -> rdx "CSE #19: conservative"
-; V353 cse12 [V353,T93] ( 3, 1.50) long -> r14 "CSE #21: conservative"
-; V354 cse13 [V354,T94] ( 3, 1.50) long -> rdx "CSE #23: conservative"
-; V355 cse14 [V355,T95] ( 3, 1.50) long -> r14 "CSE #25: conservative"
-; V356 cse15 [V356,T96] ( 3, 1.50) long -> rdx "CSE #27: conservative"
-; V357 cse16 [V357,T97] ( 3, 1.50) long -> r15 "CSE #29: conservative"
+; V350 cse9 [V350,T58] ( 3, 3 ) long -> rbx "CSE #33: conservative"
+; V351 cse10 [V351,T59] ( 3, 3 ) long -> r9 "CSE #36: conservative"
+; V352 cse11 [V352,T92] ( 3, 1.50) long -> r14 "CSE #19: conservative"
+; V353 cse12 [V353,T93] ( 3, 1.50) long -> r15 "CSE #21: conservative"
+; V354 cse13 [V354,T94] ( 3, 1.50) long -> r14 "CSE #23: conservative"
+; V355 cse14 [V355,T95] ( 3, 1.50) long -> r15 "CSE #25: conservative"
+; V356 cse15 [V356,T96] ( 3, 1.50) long -> r15 "CSE #27: conservative"
+; V357 cse16 [V357,T97] ( 3, 1.50) long -> rbx "CSE #29: conservative"
; V358 cse17 [V358,T04] ( 16, 13 ) long -> r10 "CSE #03: aggressive"
;
; Lcl frame size = 8
G_M33071_IG01:
push rbp
push r15
push r14
push rbx
push rax
lea rbp, [rsp+0x20]
;; size=12 bbWeight=1 PerfScore 5.50
G_M33071_IG02:
- mov ecx, esi
+ mov eax, esi
+ mov rcx, 0xD1FFAB1E
+ imul rax, rcx
+ lea rcx, [rdi+0x10]
mov r8, 0xD1FFAB1E
- imul rcx, r8
- lea r8, [rdi+0x10]
- mov rax, 0xD1FFAB1E
- add rax, rdx
- xor rax, qword ptr [rdi]
+ add r8, rdx
+ xor r8, qword ptr [rdi]
mov r9, qword ptr [rdi+0x08]
mov qword ptr [rbp-0x20], rdx
mov r10, rdx
neg r10
mov r11, 0xD1FFAB1E
add r11, r10
xor r11, r9
- mul rdx:rax, r11
- xor rax, rdx
- add rcx, rax
- mov rax, qword ptr [r8]
- mov rdx, qword ptr [r8+0x08]
- add rax, rdx
- xor rcx, rax
- mov rax, 0xD1FFAB1E
- mov r11, qword ptr [rbp-0x20]
- add rax, r11
- xor rax, qword ptr [r8]
- mov r8, 0xD1FFAB1E
- add r8, r10
+ mov rdx, r8
+ mulx r8, rdx, r11
xor rdx, r8
- mul rdx:rax, rdx
+ add rax, rdx
+ mov rdx, qword ptr [rcx]
+ mov r8, qword ptr [rcx+0x08]
+ add rdx, r8
xor rax, rdx
+ mov rdx, 0xD1FFAB1E
+ mov r11, qword ptr [rbp-0x20]
+ add rdx, r11
+ xor rdx, qword ptr [rcx]
+ mov rcx, 0xD1FFAB1E
+ add rcx, r10
+ xor rcx, r8
+ mulx r8, rcx, rcx
+ xor rcx, r8
mov r8, qword ptr [rdi]
add r8, r9
- xor r8, rax
- lea r9, [rdi+0x20]
- lea rbx, [rdi+0x30]
- mov rax, 0xD1FFAB1E
- add rax, r11
- xor rax, qword ptr [r9]
- mov r15, qword ptr [r9+0x08]
+ xor rcx, r8
+ lea r8, [rdi+0x20]
+ lea r9, [rdi+0x30]
mov rdx, 0xD1FFAB1E
- add rdx, r10
+ add rdx, r11
+ xor rdx, qword ptr [r8]
+ mov rbx, qword ptr [r8+0x08]
+ mov r15, 0xD1FFAB1E
+ add r15, r10
+ xor r15, rbx
+ mulx r15, rdx, r15
xor rdx, r15
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, rcx
- mov rcx, qword ptr [rbx]
- mov rdx, qword ptr [rbx+0x08]
- add rcx, rdx
- xor rcx, rax
- mov rax, 0xD1FFAB1E
- add rax, r11
- xor rax, qword ptr [rbx]
- mov rbx, 0xD1FFAB1E
- add rbx, r10
- xor rdx, rbx
- mul rdx:rax, rdx
- xor rax, rdx
- add r8, rax
+ add rdx, rax
mov rax, qword ptr [r9]
+ mov r15, qword ptr [r9+0x08]
add rax, r15
- xor r8, rax
- lea r9, [rdi+0x40]
- lea rbx, [rdi+0x50]
- mov rax, 0xD1FFAB1E
- add rax, r11
- xor rax, qword ptr [r9]
- mov r15, qword ptr [r9+0x08]
- ;; size=283 bbWeight=1 PerfScore 56.75
+ xor rax, rdx
+ mov rdx, 0xD1FFAB1E
+ add rdx, r11
+ xor rdx, qword ptr [r9]
+ mov r9, 0xD1FFAB1E
+ add r9, r10
+ xor r9, r15
+ mulx r9, rdx, r9
+ xor rdx, r9
+ add rcx, rdx
+ mov rdx, qword ptr [r8]
+ add rdx, rbx
+ xor rcx, rdx
+ lea r8, [rdi+0x40]
+ lea r9, [rdi+0x50]
+ mov rdx, 0xD1FFAB1E
+ add rdx, r11
+ ;; size=287 bbWeight=1 PerfScore 53.00
G_M33071_IG03:
- mov rdx, 0xD1FFAB1E
- add rdx, r10
+ xor rdx, qword ptr [r8]
+ mov rbx, qword ptr [r8+0x08]
+ mov r15, 0xD1FFAB1E
+ add r15, r10
+ xor r15, rbx
+ mulx r15, rdx, r15
xor rdx, r15
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, rcx
- mov rcx, qword ptr [rbx]
- mov rdx, qword ptr [rbx+0x08]
- add rcx, rdx
- xor rcx, rax
- mov rax, 0xD1FFAB1E
- add rax, r11
- xor rax, qword ptr [rbx]
- mov rbx, 0xD1FFAB1E
- add rbx, r10
- xor rdx, rbx
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, r8
- mov r8, qword ptr [r9]
- add r8, r15
- xor r8, rax
- lea r9, [rdi+0x60]
- lea rbx, [rdi+0x70]
- mov rax, 0xD1FFAB1E
- add rax, r11
- xor rax, qword ptr [r9]
+ add rdx, rax
+ mov rax, qword ptr [r9]
mov r15, qword ptr [r9+0x08]
+ add rax, r15
+ xor rax, rdx
mov rdx, 0xD1FFAB1E
- add rdx, r10
+ add rdx, r11
+ xor rdx, qword ptr [r9]
+ mov r9, 0xD1FFAB1E
+ add r9, r10
+ xor r9, r15
+ mulx r9, rdx, r9
+ xor rdx, r9
+ add rdx, rcx
+ mov rcx, qword ptr [r8]
+ add rcx, rbx
+ xor rcx, rdx
+ lea r8, [rdi+0x60]
+ lea r9, [rdi+0x70]
+ mov rdx, 0xD1FFAB1E
+ add rdx, r11
+ xor rdx, qword ptr [r8]
+ mov rbx, qword ptr [r8+0x08]
+ mov r15, 0xD1FFAB1E
+ add r15, r10
+ xor r15, rbx
+ mulx r15, rdx, r15
xor rdx, r15
- mul rdx:rax, rdx
+ add rdx, rax
+ mov rax, qword ptr [r9]
+ mov r15, qword ptr [r9+0x08]
+ add rax, r15
xor rax, rdx
- add rax, rcx
- mov rcx, qword ptr [rbx]
- mov rdx, qword ptr [rbx+0x08]
- add rcx, rdx
- xor rcx, rax
+ mov rdx, 0xD1FFAB1E
+ add rdx, r11
+ xor rdx, qword ptr [r9]
+ mov r9, 0xD1FFAB1E
+ add r9, r10
+ xor r9, r15
+ mulx r9, rdx, r9
+ xor rdx, r9
+ add rdx, rcx
+ mov rcx, qword ptr [r8]
+ add rcx, rbx
+ xor rcx, rdx
+ mov rdx, rax
+ shr rdx, 37
+ xor rdx, rax
mov rax, 0xD1FFAB1E
- add rax, r11
- xor rax, qword ptr [rbx]
- mov rbx, 0xD1FFAB1E
- add rbx, r10
- xor rdx, rbx
- mul rdx:rax, rdx
+ imul rax, rdx
+ mov rdx, rax
+ shr rdx, 32
xor rax, rdx
- add rax, r8
- mov r8, qword ptr [r9]
- add r8, r15
- xor r8, rax
- mov rax, rcx
- shr rax, 37
- xor rax, rcx
+ mov rdx, rcx
+ shr rdx, 37
+ xor rdx, rcx
mov rcx, 0xD1FFAB1E
- imul rcx, rax
- mov rax, rcx
- shr rax, 32
- xor rcx, rax
- mov rax, r8
- shr rax, 37
- xor rax, r8
- mov r8, 0xD1FFAB1E
- imul r8, rax
- mov rax, r8
- shr rax, 32
- xor r8, rax
- lea r9d, [rsi-0x80]
- shr r9d, 5
- ;; size=280 bbWeight=1 PerfScore 51.00
+ imul rcx, rdx
+ mov rdx, rcx
+ ;; size=280 bbWeight=1 PerfScore 53.25
G_M33071_IG04:
+ shr rdx, 32
+ xor rcx, rdx
+ lea r8d, [rsi-0x80]
+ shr r8d, 5
je G_M33071_IG07
- ;; size=6 bbWeight=1 PerfScore 1.00
+ ;; size=21 bbWeight=1 PerfScore 2.75
G_M33071_IG05:
- lea rbx, [rdi+0x80]
- lea r15, [rdi+0x90]
- mov rax, 0xD1FFAB1E
- add rax, r11
- xor rax, qword ptr [rbx]
- mov r14, qword ptr [rbx+0x08]
+ lea r9, [rdi+0x80]
+ lea rbx, [rdi+0x90]
mov rdx, 0xD1FFAB1E
- add rdx, r10
- xor rdx, r14
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, rcx
- mov rcx, qword ptr [r15]
- mov rdx, qword ptr [r15+0x08]
- add rcx, rdx
- xor rcx, rax
- mov rax, 0xD1FFAB1E
- add rax, r11
- xor rax, qword ptr [r15]
- mov r15, 0xD1FFAB1E
- add r15, r10
- xor rdx, r15
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, r8
- mov r8, qword ptr [rbx]
- add r8, r14
- xor r8, rax
- cmp r9d, 2
- jb G_M33071_IG07
- lea rbx, [rdi+0xA0]
- lea r15, [rdi+0xB0]
- mov rax, 0xD1FFAB1E
- add rax, r11
- xor rax, qword ptr [rbx]
- mov r14, qword ptr [rbx+0x08]
- mov rdx, 0xD1FFAB1E
- add rdx, r10
- xor rdx, r14
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, rcx
- mov rcx, qword ptr [r15]
- mov rdx, qword ptr [r15+0x08]
- add rcx, rdx
- xor rcx, rax
- mov rax, 0xD1FFAB1E
- add rax, r11
- xor rax, qword ptr [r15]
- mov r15, 0xD1FFAB1E
- add r15, r10
- xor rdx, r15
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, r8
- mov r8, qword ptr [rbx]
- add r8, r14
- xor r8, rax
- cmp r9d, 3
- jne SHORT G_M33071_IG07
- lea r9, [rdi+0xC0]
- lea rbx, [rdi+0xD0]
- mov rax, 0xD1FFAB1E
- add rax, r11
- xor rax, qword ptr [r9]
- ;; size=290 bbWeight=0.50 PerfScore 26.50
-G_M33071_IG06:
+ add rdx, r11
+ xor rdx, qword ptr [r9]
mov r15, qword ptr [r9+0x08]
- mov rdx, 0xD1FFAB1E
- add rdx, r10
- xor rdx, r15
- mul rdx:rax, rdx
+ mov r14, 0xD1FFAB1E
+ add r14, r10
+ xor r14, r15
+ mulx r14, rdx, r14
+ xor rdx, r14
+ add rdx, rax
+ mov rax, qword ptr [rbx]
+ mov r14, qword ptr [rbx+0x08]
+ add rax, r14
xor rax, rdx
- add rax, rcx
- mov rcx, qword ptr [rbx]
- mov rdx, qword ptr [rbx+0x08]
- add rcx, rdx
- xor rcx, rax
- mov rax, 0xD1FFAB1E
- add rax, r11
- xor rax, qword ptr [rbx]
+ mov rdx, 0xD1FFAB1E
+ add rdx, r11
+ xor rdx, qword ptr [rbx]
mov rbx, 0xD1FFAB1E
add rbx, r10
+ xor rbx, r14
+ mulx rbx, rdx, rbx
xor rdx, rbx
- mul rdx:rax, rdx
+ add rdx, rcx
+ mov rcx, qword ptr [r9]
+ add rcx, r15
+ xor rcx, rdx
+ cmp r8d, 2
+ jb G_M33071_IG07
+ lea r9, [rdi+0xA0]
+ lea rbx, [rdi+0xB0]
+ mov rdx, 0xD1FFAB1E
+ add rdx, r11
+ xor rdx, qword ptr [r9]
+ mov r15, qword ptr [r9+0x08]
+ mov r14, 0xD1FFAB1E
+ add r14, r10
+ xor r14, r15
+ mulx r14, rdx, r14
+ xor rdx, r14
+ add rdx, rax
+ mov rax, qword ptr [rbx]
+ mov r14, qword ptr [rbx+0x08]
+ add rax, r14
xor rax, rdx
- add rax, r8
- mov r8, qword ptr [r9]
- add r8, r15
- xor r8, rax
- ;; size=92 bbWeight=0.50 PerfScore 10.00
-G_M33071_IG07:
- mov r9d, esi
- add rdi, r9
- lea r9, [rdi-0x10]
- add rdi, -32
- mov rax, 0xD1FFAB1E
- add rax, r10
- xor rax, qword ptr [r9]
- mov rbx, qword ptr [r9+0x08]
- mov rdx, r10
- neg rdx
+ mov rdx, 0xD1FFAB1E
+ add rdx, r11
+ xor rdx, qword ptr [rbx]
+ mov rbx, 0xD1FFAB1E
+ add rbx, r10
+ xor rbx, r14
+ mulx rbx, rdx, rbx
+ xor rdx, rbx
+ add rdx, rcx
+ mov rcx, qword ptr [r9]
+ add rcx, r15
+ xor rcx, rdx
+ cmp r8d, 3
+ jne G_M33071_IG07
+ lea r8, [rdi+0xC0]
+ lea r9, [rdi+0xD0]
+ mov rdx, 0xD1FFAB1E
+ ;; size=296 bbWeight=0.50 PerfScore 25.38
+G_M33071_IG06:
+ add rdx, r11
+ xor rdx, qword ptr [r8]
+ mov rbx, qword ptr [r8+0x08]
mov r15, 0xD1FFAB1E
- add rdx, r15
- xor rdx, rbx
- mul rdx:rax, rdx
+ add r15, r10
+ xor r15, rbx
+ mulx r15, rdx, r15
+ xor rdx, r15
+ add rdx, rax
+ mov rax, qword ptr [r9]
+ mov r15, qword ptr [r9+0x08]
+ add rax, r15
xor rax, rdx
- add rax, rcx
- mov rcx, qword ptr [rdi]
- mov rdx, qword ptr [rdi+0x08]
- add rcx, rdx
- xor rcx, rax
- mov rax, 0xD1FFAB1E
- add rax, r10
- xor rax, qword ptr [rdi]
+ mov rdx, 0xD1FFAB1E
+ add rdx, r11
+ xor rdx, qword ptr [r9]
+ mov r9, 0xD1FFAB1E
+ add r9, r10
+ xor r9, r15
+ mulx r9, rdx, r9
+ xor rdx, r9
+ add rdx, rcx
+ mov rcx, qword ptr [r8]
+ add rcx, rbx
+ xor rcx, rdx
+ ;; size=102 bbWeight=0.50 PerfScore 11.12
+G_M33071_IG07:
+ mov r8d, esi
+ add rdi, r8
+ lea r8, [rdi-0x10]
+ add rdi, -32
+ mov rdx, 0xD1FFAB1E
+ add rdx, r10
+ xor rdx, qword ptr [r8]
+ mov r9, qword ptr [r8+0x08]
+ mov rbx, r10
+ neg rbx
+ mov r15, 0xD1FFAB1E
+ add rbx, r15
+ xor rbx, r9
+ mulx rbx, rdx, rbx
+ xor rdx, rbx
+ add rdx, rax
+ mov rax, qword ptr [rdi]
+ mov rbx, qword ptr [rdi+0x08]
+ add rax, rbx
+ xor rax, rdx
+ mov rdx, 0xD1FFAB1E
+ add rdx, r10
+ xor rdx, qword ptr [rdi]
mov rdi, r10
neg rdi
mov r10, 0xD1FFAB1E
add rdi, r10
+ xor rdi, rbx
+ mulx rdi, rdx, rdi
xor rdx, rdi
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, r8
- mov r8, qword ptr [r9]
- add r8, rbx
- xor r8, rax
+ add rdx, rcx
+ mov rcx, qword ptr [r8]
+ add rcx, r9
+ xor rcx, rdx
mov rdx, 0xD1FFAB1E
- imul rdx, rcx
- mov rax, 0xD1FFAB1E
- imul rax, r8
- add rdx, rax
- mov eax, esi
- sub rax, r11
+ imul rdx, rax
mov rdi, 0xD1FFAB1E
- imul rax, rdi
- add rdx, rax
- lea rax, [rcx+r8]
+ imul rdi, rcx
+ add rdx, rdi
+ mov edi, esi
+ sub rdi, r11
+ mov rsi, 0xD1FFAB1E
+ imul rdi, rsi
+ add rdx, rdi
+ add rax, rcx
mov rcx, rax
shr rcx, 37
xor rcx, rax
mov rax, 0xD1FFAB1E
imul rax, rcx
mov rcx, rax
shr rcx, 32
xor rax, rcx
mov rcx, rdx
shr rcx, 37
xor rcx, rdx
mov rdx, 0xD1FFAB1E
imul rdx, rcx
mov rcx, rdx
shr rcx, 32
xor rcx, rdx
mov rdx, rcx
neg rdx
- ;; size=265 bbWeight=1 PerfScore 42.00
+ ;; size=268 bbWeight=1 PerfScore 41.75
G_M33071_IG08:
add rsp, 8
pop rbx
pop r14
pop r15
pop rbp
ret
;; size=11 bbWeight=1 PerfScore 3.25
-; Total bytes of code 1239, prolog size 12, PerfScore 196.00, instruction count 299, allocated bytes for code 1239 (MethodHash=39dc7ed0) for method System.IO.Hashing.XxHash128:HashLength129To240(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
+; Total bytes of code 1277, prolog size 12, PerfScore 196.00, instruction count 300, allocated bytes for code 1277 (MethodHash=39dc7ed0) for method System.IO.Hashing.XxHash128:HashLength129To240(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
; ============================================================
```
35 (3.54 % of base) - System.IO.Hashing.XxHash3:HashLength129To240(ptr,uint,ulong):ulong
```diff
; Assembly listing for method System.IO.Hashing.XxHash3:HashLength129To240(ptr,uint,ulong):ulong (FullOpts)
; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
; FullOpts code
; optimized code
; rbp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 54 single block inlinees; 48 inlinees without PGO data
; Final local variable assignments
;
; V00 arg0 [V00,T01] ( 19, 15.50) long -> rdi single-def
; V01 arg1 [V01,T06] ( 5, 5 ) int -> rsi single-def
; V02 arg2 [V02,T02] ( 19, 15.50) long -> [rbp-0x08] single-def
-; V03 loc0 [V03,T00] ( 32, 25 ) long -> rcx
+; V03 loc0 [V03,T00] ( 32, 25 ) long -> rax
;* V04 loc1 [V04 ] ( 0, 0 ) int -> zero-ref
;# V05 OutArgs [V05 ] ( 1, 1 ) struct ( 0) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V06 tmp1 [V06 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V07 tmp2 [V07 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V08 tmp3 [V08 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V09 tmp4 [V09 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V10 tmp5 [V10 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V11 tmp6 [V11 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V12 tmp7 [V12 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V13 tmp8 [V13 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V14 tmp9 [V14 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V15 tmp10 [V15 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V16 tmp11 [V16,T07] ( 3, 6 ) long -> rax "Inlining Arg"
+; V16 tmp11 [V16,T07] ( 3, 6 ) long -> rdx "Inlining Arg"
;* V17 tmp12 [V17 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V18 tmp13 [V18 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V19 tmp14 [V19 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V20 tmp15 [V20 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V21 tmp16 [V21 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V22 tmp17 [V22 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V23 tmp18 [V23 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V24 tmp19 [V24 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V25 tmp20 [V25 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V26 tmp21 [V26 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V27 tmp22 [V27,T08] ( 3, 6 ) long -> rax "Inlining Arg"
+; V27 tmp22 [V27,T08] ( 3, 6 ) long -> rdx "Inlining Arg"
;* V28 tmp23 [V28 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V29 tmp24 [V29 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V30 tmp25 [V30 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V31 tmp26 [V31 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V32 tmp27 [V32 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V33 tmp28 [V33 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V34 tmp29 [V34 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V35 tmp30 [V35 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V36 tmp31 [V36 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V37 tmp32 [V37 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V38 tmp33 [V38,T09] ( 3, 6 ) long -> rax "Inlining Arg"
+; V38 tmp33 [V38,T09] ( 3, 6 ) long -> rdx "Inlining Arg"
;* V39 tmp34 [V39 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V40 tmp35 [V40 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V41 tmp36 [V41 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V42 tmp37 [V42 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V43 tmp38 [V43 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V44 tmp39 [V44 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V45 tmp40 [V45 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V46 tmp41 [V46 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V47 tmp42 [V47 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V48 tmp43 [V48 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V49 tmp44 [V49,T10] ( 3, 6 ) long -> rax "Inlining Arg"
+; V49 tmp44 [V49,T10] ( 3, 6 ) long -> rdx "Inlining Arg"
;* V50 tmp45 [V50 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V51 tmp46 [V51 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V52 tmp47 [V52 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V53 tmp48 [V53 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V54 tmp49 [V54 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V55 tmp50 [V55 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V56 tmp51 [V56 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V57 tmp52 [V57 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V58 tmp53 [V58 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V59 tmp54 [V59 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V60 tmp55 [V60,T11] ( 3, 6 ) long -> rax "Inlining Arg"
+; V60 tmp55 [V60,T11] ( 3, 6 ) long -> rdx "Inlining Arg"
;* V61 tmp56 [V61 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V62 tmp57 [V62 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V63 tmp58 [V63 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V64 tmp59 [V64 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V65 tmp60 [V65 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V66 tmp61 [V66 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V67 tmp62 [V67 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V68 tmp63 [V68 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V69 tmp64 [V69 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V70 tmp65 [V70 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V71 tmp66 [V71,T12] ( 3, 6 ) long -> rax "Inlining Arg"
+; V71 tmp66 [V71,T12] ( 3, 6 ) long -> rdx "Inlining Arg"
;* V72 tmp67 [V72 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V73 tmp68 [V73 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V74 tmp69 [V74 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V75 tmp70 [V75 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V76 tmp71 [V76 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V77 tmp72 [V77 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V78 tmp73 [V78 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V79 tmp74 [V79 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V80 tmp75 [V80 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V81 tmp76 [V81 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V82 tmp77 [V82,T13] ( 3, 6 ) long -> rax "Inlining Arg"
+; V82 tmp77 [V82,T13] ( 3, 6 ) long -> rdx "Inlining Arg"
;* V83 tmp78 [V83 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V84 tmp79 [V84 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V85 tmp80 [V85 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V86 tmp81 [V86 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V87 tmp82 [V87 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V88 tmp83 [V88 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V89 tmp84 [V89 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V90 tmp85 [V90 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V91 tmp86 [V91 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V92 tmp87 [V92 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V93 tmp88 [V93,T04] ( 6, 12 ) long -> rax "Inlining Arg"
-; V94 tmp89 [V94,T16] ( 3, 3 ) long -> rax "Inlining Arg"
+; V93 tmp88 [V93,T04] ( 6, 12 ) long -> rdx "Inlining Arg"
+; V94 tmp89 [V94,T16] ( 3, 3 ) long -> rdx "Inlining Arg"
;* V95 tmp90 [V95 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V96 tmp91 [V96 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V97 tmp92 [V97 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V98 tmp93 [V98 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V99 tmp94 [V99 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V100 tmp95 [V100 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V101 tmp96 [V101 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V102 tmp97 [V102 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V103 tmp98 [V103 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V104 tmp99 [V104 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V105 tmp100 [V105,T17] ( 3, 3 ) long -> rax "Inlining Arg"
+; V105 tmp100 [V105,T17] ( 3, 3 ) long -> rdx "Inlining Arg"
;* V106 tmp101 [V106 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V107 tmp102 [V107 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V108 tmp103 [V108 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V109 tmp104 [V109 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V110 tmp105 [V110 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V111 tmp106 [V111 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V112 tmp107 [V112 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V113 tmp108 [V113 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V114 tmp109 [V114 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V115 tmp110 [V115 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V116 tmp111 [V116,T18] ( 3, 3 ) long -> rax "Inlining Arg"
+; V116 tmp111 [V116,T18] ( 3, 3 ) long -> rdx "Inlining Arg"
;* V117 tmp112 [V117 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V118 tmp113 [V118 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V119 tmp114 [V119 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V120 tmp115 [V120 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V121 tmp116 [V121 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V122 tmp117 [V122 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V123 tmp118 [V123 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V124 tmp119 [V124 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V125 tmp120 [V125 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V126 tmp121 [V126 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V127 tmp122 [V127,T19] ( 3, 3 ) long -> rax "Inlining Arg"
+; V127 tmp122 [V127,T19] ( 3, 3 ) long -> rdx "Inlining Arg"
;* V128 tmp123 [V128 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V129 tmp124 [V129 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V130 tmp125 [V130 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V131 tmp126 [V131 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V132 tmp127 [V132 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V133 tmp128 [V133 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V134 tmp129 [V134 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V135 tmp130 [V135 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V136 tmp131 [V136 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V137 tmp132 [V137 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V138 tmp133 [V138,T20] ( 3, 3 ) long -> rax "Inlining Arg"
+; V138 tmp133 [V138,T20] ( 3, 3 ) long -> rdx "Inlining Arg"
;* V139 tmp134 [V139 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V140 tmp135 [V140 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V141 tmp136 [V141 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V142 tmp137 [V142 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V143 tmp138 [V143 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V144 tmp139 [V144 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V145 tmp140 [V145 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V146 tmp141 [V146 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V147 tmp142 [V147 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V148 tmp143 [V148 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V149 tmp144 [V149,T21] ( 3, 3 ) long -> rax "Inlining Arg"
+; V149 tmp144 [V149,T21] ( 3, 3 ) long -> rdx "Inlining Arg"
;* V150 tmp145 [V150 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V151 tmp146 [V151 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V152 tmp147 [V152 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V153 tmp148 [V153 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V154 tmp149 [V154 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V155 tmp150 [V155 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V156 tmp151 [V156 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V157 tmp152 [V157 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V158 tmp153 [V158 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V159 tmp154 [V159 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V160 tmp155 [V160,T22] ( 3, 3 ) long -> rax "Inlining Arg"
+; V160 tmp155 [V160,T22] ( 3, 3 ) long -> rdx "Inlining Arg"
;* V161 tmp156 [V161 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V162 tmp157 [V162 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V163 tmp158 [V163 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V164 tmp159 [V164 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V165 tmp160 [V165 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V166 tmp161 [V166 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V167 tmp162 [V167 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V168 tmp163 [V168 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V169 tmp164 [V169 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V170 tmp165 [V170 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V171 tmp166 [V171,T14] ( 3, 6 ) long -> rax "Inlining Arg"
+; V171 tmp166 [V171,T14] ( 3, 6 ) long -> rdx "Inlining Arg"
;* V172 tmp167 [V172 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V173 tmp168 [V173 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V174 tmp169 [V174 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V175 tmp170 [V175 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V176 tmp171 [V176 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V177 tmp172 [V177 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V178 tmp173 [V178 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V179 tmp174 [V179 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V180 tmp175 [V180 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V181 tmp176 [V181 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V182 tmp177 [V182,T05] ( 6, 12 ) long -> rax "Inlining Arg"
+; V182 tmp177 [V182,T05] ( 6, 12 ) long -> rcx "Inlining Arg"
;* V183 tmp178 [V183 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V14.Item1 (fldOffset=0x0)" P-DEP
;* V184 tmp179 [V184 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V14.Item2 (fldOffset=0x8)" P-DEP
-; V185 tmp180 [V185,T23] ( 2, 2 ) long -> rax "field V15.Item1 (fldOffset=0x0)" P-INDEP
-; V186 tmp181 [V186,T24] ( 2, 2 ) long -> rdx "field V15.Item2 (fldOffset=0x8)" P-INDEP
+; V185 tmp180 [V185,T23] ( 2, 2 ) long -> rdx "field V15.Item1 (fldOffset=0x0)" P-INDEP
+; V186 tmp181 [V186,T24] ( 2, 2 ) long -> rcx "field V15.Item2 (fldOffset=0x8)" P-INDEP
;* V187 tmp182 [V187 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V25.Item1 (fldOffset=0x0)" P-DEP
;* V188 tmp183 [V188 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V25.Item2 (fldOffset=0x8)" P-DEP
-; V189 tmp184 [V189,T25] ( 2, 2 ) long -> rax "field V26.Item1 (fldOffset=0x0)" P-INDEP
-; V190 tmp185 [V190,T26] ( 2, 2 ) long -> rdx "field V26.Item2 (fldOffset=0x8)" P-INDEP
+; V189 tmp184 [V189,T25] ( 2, 2 ) long -> rdx "field V26.Item1 (fldOffset=0x0)" P-INDEP
+; V190 tmp185 [V190,T26] ( 2, 2 ) long -> rcx "field V26.Item2 (fldOffset=0x8)" P-INDEP
;* V191 tmp186 [V191 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V36.Item1 (fldOffset=0x0)" P-DEP
;* V192 tmp187 [V192 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V36.Item2 (fldOffset=0x8)" P-DEP
-; V193 tmp188 [V193,T27] ( 2, 2 ) long -> rax "field V37.Item1 (fldOffset=0x0)" P-INDEP
-; V194 tmp189 [V194,T28] ( 2, 2 ) long -> rdx "field V37.Item2 (fldOffset=0x8)" P-INDEP
+; V193 tmp188 [V193,T27] ( 2, 2 ) long -> rdx "field V37.Item1 (fldOffset=0x0)" P-INDEP
+; V194 tmp189 [V194,T28] ( 2, 2 ) long -> rcx "field V37.Item2 (fldOffset=0x8)" P-INDEP
;* V195 tmp190 [V195 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V47.Item1 (fldOffset=0x0)" P-DEP
;* V196 tmp191 [V196 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V47.Item2 (fldOffset=0x8)" P-DEP
-; V197 tmp192 [V197,T29] ( 2, 2 ) long -> rax "field V48.Item1 (fldOffset=0x0)" P-INDEP
-; V198 tmp193 [V198,T30] ( 2, 2 ) long -> rdx "field V48.Item2 (fldOffset=0x8)" P-INDEP
+; V197 tmp192 [V197,T29] ( 2, 2 ) long -> rdx "field V48.Item1 (fldOffset=0x0)" P-INDEP
+; V198 tmp193 [V198,T30] ( 2, 2 ) long -> rcx "field V48.Item2 (fldOffset=0x8)" P-INDEP
;* V199 tmp194 [V199 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V58.Item1 (fldOffset=0x0)" P-DEP
;* V200 tmp195 [V200 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V58.Item2 (fldOffset=0x8)" P-DEP
-; V201 tmp196 [V201,T31] ( 2, 2 ) long -> rax "field V59.Item1 (fldOffset=0x0)" P-INDEP
-; V202 tmp197 [V202,T32] ( 2, 2 ) long -> rdx "field V59.Item2 (fldOffset=0x8)" P-INDEP
+; V201 tmp196 [V201,T31] ( 2, 2 ) long -> rdx "field V59.Item1 (fldOffset=0x0)" P-INDEP
+; V202 tmp197 [V202,T32] ( 2, 2 ) long -> rcx "field V59.Item2 (fldOffset=0x8)" P-INDEP
;* V203 tmp198 [V203 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V69.Item1 (fldOffset=0x0)" P-DEP
;* V204 tmp199 [V204 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V69.Item2 (fldOffset=0x8)" P-DEP
-; V205 tmp200 [V205,T33] ( 2, 2 ) long -> rax "field V70.Item1 (fldOffset=0x0)" P-INDEP
-; V206 tmp201 [V206,T34] ( 2, 2 ) long -> rdx "field V70.Item2 (fldOffset=0x8)" P-INDEP
+; V205 tmp200 [V205,T33] ( 2, 2 ) long -> rdx "field V70.Item1 (fldOffset=0x0)" P-INDEP
+; V206 tmp201 [V206,T34] ( 2, 2 ) long -> rcx "field V70.Item2 (fldOffset=0x8)" P-INDEP
;* V207 tmp202 [V207 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V80.Item1 (fldOffset=0x0)" P-DEP
;* V208 tmp203 [V208 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V80.Item2 (fldOffset=0x8)" P-DEP
-; V209 tmp204 [V209,T35] ( 2, 2 ) long -> rax "field V81.Item1 (fldOffset=0x0)" P-INDEP
-; V210 tmp205 [V210,T36] ( 2, 2 ) long -> rdx "field V81.Item2 (fldOffset=0x8)" P-INDEP
+; V209 tmp204 [V209,T35] ( 2, 2 ) long -> rdx "field V81.Item1 (fldOffset=0x0)" P-INDEP
+; V210 tmp205 [V210,T36] ( 2, 2 ) long -> rcx "field V81.Item2 (fldOffset=0x8)" P-INDEP
;* V211 tmp206 [V211 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V91.Item1 (fldOffset=0x0)" P-DEP
;* V212 tmp207 [V212 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V91.Item2 (fldOffset=0x8)" P-DEP
-; V213 tmp208 [V213,T37] ( 2, 2 ) long -> rax "field V92.Item1 (fldOffset=0x0)" P-INDEP
-; V214 tmp209 [V214,T38] ( 2, 2 ) long -> rdx "field V92.Item2 (fldOffset=0x8)" P-INDEP
+; V213 tmp208 [V213,T37] ( 2, 2 ) long -> rdx "field V92.Item1 (fldOffset=0x0)" P-INDEP
+; V214 tmp209 [V214,T38] ( 2, 2 ) long -> rcx "field V92.Item2 (fldOffset=0x8)" P-INDEP
;* V215 tmp210 [V215 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V103.Item1 (fldOffset=0x0)" P-DEP
;* V216 tmp211 [V216 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V103.Item2 (fldOffset=0x8)" P-DEP
-; V217 tmp212 [V217,T41] ( 2, 1 ) long -> rax "field V104.Item1 (fldOffset=0x0)" P-INDEP
-; V218 tmp213 [V218,T42] ( 2, 1 ) long -> rdx "field V104.Item2 (fldOffset=0x8)" P-INDEP
+; V217 tmp212 [V217,T41] ( 2, 1 ) long -> rdx "field V104.Item1 (fldOffset=0x0)" P-INDEP
+; V218 tmp213 [V218,T42] ( 2, 1 ) long -> rcx "field V104.Item2 (fldOffset=0x8)" P-INDEP
;* V219 tmp214 [V219 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V114.Item1 (fldOffset=0x0)" P-DEP
;* V220 tmp215 [V220 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V114.Item2 (fldOffset=0x8)" P-DEP
-; V221 tmp216 [V221,T43] ( 2, 1 ) long -> rax "field V115.Item1 (fldOffset=0x0)" P-INDEP
-; V222 tmp217 [V222,T44] ( 2, 1 ) long -> rdx "field V115.Item2 (fldOffset=0x8)" P-INDEP
+; V221 tmp216 [V221,T43] ( 2, 1 ) long -> rdx "field V115.Item1 (fldOffset=0x0)" P-INDEP
+; V222 tmp217 [V222,T44] ( 2, 1 ) long -> rcx "field V115.Item2 (fldOffset=0x8)" P-INDEP
;* V223 tmp218 [V223 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V125.Item1 (fldOffset=0x0)" P-DEP
;* V224 tmp219 [V224 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V125.Item2 (fldOffset=0x8)" P-DEP
-; V225 tmp220 [V225,T45] ( 2, 1 ) long -> rax "field V126.Item1 (fldOffset=0x0)" P-INDEP
-; V226 tmp221 [V226,T46] ( 2, 1 ) long -> rdx "field V126.Item2 (fldOffset=0x8)" P-INDEP
+; V225 tmp220 [V225,T45] ( 2, 1 ) long -> rdx "field V126.Item1 (fldOffset=0x0)" P-INDEP
+; V226 tmp221 [V226,T46] ( 2, 1 ) long -> rcx "field V126.Item2 (fldOffset=0x8)" P-INDEP
;* V227 tmp222 [V227 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V136.Item1 (fldOffset=0x0)" P-DEP
;* V228 tmp223 [V228 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V136.Item2 (fldOffset=0x8)" P-DEP
-; V229 tmp224 [V229,T47] ( 2, 1 ) long -> rax "field V137.Item1 (fldOffset=0x0)" P-INDEP
-; V230 tmp225 [V230,T48] ( 2, 1 ) long -> rdx "field V137.Item2 (fldOffset=0x8)" P-INDEP
+; V229 tmp224 [V229,T47] ( 2, 1 ) long -> rdx "field V137.Item1 (fldOffset=0x0)" P-INDEP
+; V230 tmp225 [V230,T48] ( 2, 1 ) long -> rcx "field V137.Item2 (fldOffset=0x8)" P-INDEP
;* V231 tmp226 [V231 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V147.Item1 (fldOffset=0x0)" P-DEP
;* V232 tmp227 [V232 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V147.Item2 (fldOffset=0x8)" P-DEP
-; V233 tmp228 [V233,T49] ( 2, 1 ) long -> rax "field V148.Item1 (fldOffset=0x0)" P-INDEP
-; V234 tmp229 [V234,T50] ( 2, 1 ) long -> rdx "field V148.Item2 (fldOffset=0x8)" P-INDEP
+; V233 tmp228 [V233,T49] ( 2, 1 ) long -> rdx "field V148.Item1 (fldOffset=0x0)" P-INDEP
+; V234 tmp229 [V234,T50] ( 2, 1 ) long -> rcx "field V148.Item2 (fldOffset=0x8)" P-INDEP
;* V235 tmp230 [V235 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V158.Item1 (fldOffset=0x0)" P-DEP
;* V236 tmp231 [V236 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V158.Item2 (fldOffset=0x8)" P-DEP
-; V237 tmp232 [V237,T51] ( 2, 1 ) long -> rax "field V159.Item1 (fldOffset=0x0)" P-INDEP
-; V238 tmp233 [V238,T52] ( 2, 1 ) long -> rdx "field V159.Item2 (fldOffset=0x8)" P-INDEP
+; V237 tmp232 [V237,T51] ( 2, 1 ) long -> rdx "field V159.Item1 (fldOffset=0x0)" P-INDEP
+; V238 tmp233 [V238,T52] ( 2, 1 ) long -> rcx "field V159.Item2 (fldOffset=0x8)" P-INDEP
;* V239 tmp234 [V239 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V169.Item1 (fldOffset=0x0)" P-DEP
;* V240 tmp235 [V240 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V169.Item2 (fldOffset=0x8)" P-DEP
-; V241 tmp236 [V241,T53] ( 2, 1 ) long -> rax "field V170.Item1 (fldOffset=0x0)" P-INDEP
-; V242 tmp237 [V242,T54] ( 2, 1 ) long -> rdx "field V170.Item2 (fldOffset=0x8)" P-INDEP
+; V241 tmp236 [V241,T53] ( 2, 1 ) long -> rdx "field V170.Item1 (fldOffset=0x0)" P-INDEP
+; V242 tmp237 [V242,T54] ( 2, 1 ) long -> rcx "field V170.Item2 (fldOffset=0x8)" P-INDEP
;* V243 tmp238 [V243 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V180.Item1 (fldOffset=0x0)" P-DEP
;* V244 tmp239 [V244 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V180.Item2 (fldOffset=0x8)" P-DEP
-; V245 tmp240 [V245,T39] ( 2, 2 ) long -> rax "field V181.Item1 (fldOffset=0x0)" P-INDEP
+; V245 tmp240 [V245,T39] ( 2, 2 ) long -> rcx "field V181.Item1 (fldOffset=0x0)" P-INDEP
; V246 tmp241 [V246,T40] ( 2, 2 ) long -> rdx "field V181.Item2 (fldOffset=0x8)" P-INDEP
; V247 cse0 [V247,T03] ( 17, 13.50) long -> r8 "CSE #01: aggressive"
-; V248 rat0 [V248,T15] ( 3, 5.75) int -> rax "ReplaceWithLclVar is creating a new local variable"
+; V248 rat0 [V248,T15] ( 3, 5.75) int -> rdx "ReplaceWithLclVar is creating a new local variable"
;
; Lcl frame size = 16
G_M37356_IG01:
push rbp
sub rsp, 16
lea rbp, [rsp+0x10]
;; size=10 bbWeight=1 PerfScore 1.75
G_M37356_IG02:
- mov ecx, esi
- mov r8, 0xD1FFAB1E
- imul rcx, r8
- mov rax, 0xD1FFAB1E
- add rax, rdx
- xor rax, qword ptr [rdi]
+ mov eax, esi
+ mov rcx, 0xD1FFAB1E
+ imul rax, rcx
+ mov rcx, 0xD1FFAB1E
+ add rcx, rdx
+ xor rcx, qword ptr [rdi]
mov qword ptr [rbp-0x08], rdx
mov r8, rdx
neg r8
mov r9, 0xD1FFAB1E
add r9, r8
xor r9, qword ptr [rdi+0x08]
- mul rdx:rax, r9
- xor rax, rdx
- add rcx, rax
- lea rax, [rdi+0x10]
- mov rdx, 0xD1FFAB1E
+ mov rdx, rcx
+ mulx rcx, rdx, r9
+ xor rdx, rcx
+ add rax, rdx
+ lea rdx, [rdi+0x10]
+ mov rcx, 0xD1FFAB1E
mov r9, qword ptr [rbp-0x08]
- add rdx, r9
- xor rdx, qword ptr [rax]
+ add rcx, r9
+ xor rcx, qword ptr [rdx]
mov r10, 0xD1FFAB1E
add r10, r8
- xor r10, qword ptr [rax+0x08]
- mov rax, r10
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, rcx
- mov rcx, rax
- lea rax, [rdi+0x20]
- mov rdx, 0xD1FFAB1E
- add rdx, r9
- xor rdx, qword ptr [rax]
+ xor r10, qword ptr [rdx+0x08]
+ mov rdx, rcx
+ mulx rcx, rdx, r10
+ xor rdx, rcx
+ add rdx, rax
+ mov rax, rdx
+ lea rdx, [rdi+0x20]
+ mov rcx, 0xD1FFAB1E
+ add rcx, r9
+ xor rcx, qword ptr [rdx]
mov r10, 0xD1FFAB1E
add r10, r8
- xor r10, qword ptr [rax+0x08]
- mov rax, r10
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, rcx
- mov rcx, rax
- lea rax, [rdi+0x30]
- mov rdx, 0xD1FFAB1E
- add rdx, r9
- xor rdx, qword ptr [rax]
+ xor r10, qword ptr [rdx+0x08]
+ mov rdx, rcx
+ mulx rcx, rdx, r10
+ xor rdx, rcx
+ add rdx, rax
+ mov rax, rdx
+ lea rdx, [rdi+0x30]
+ mov rcx, 0xD1FFAB1E
+ add rcx, r9
+ xor rcx, qword ptr [rdx]
mov r10, 0xD1FFAB1E
add r10, r8
- xor r10, qword ptr [rax+0x08]
- mov rax, r10
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, rcx
- mov rcx, rax
- lea rax, [rdi+0x40]
- mov rdx, 0xD1FFAB1E
- add rdx, r9
- xor rdx, qword ptr [rax]
+ xor r10, qword ptr [rdx+0x08]
+ mov rdx, rcx
+ mulx rcx, rdx, r10
+ xor rdx, rcx
+ add rdx, rax
+ mov rax, rdx
+ lea rdx, [rdi+0x40]
+ mov rcx, 0xD1FFAB1E
+ add rcx, r9
+ xor rcx, qword ptr [rdx]
mov r10, 0xD1FFAB1E
add r10, r8
- xor r10, qword ptr [rax+0x08]
- mov rax, r10
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, rcx
- mov rcx, rax
- lea rax, [rdi+0x50]
- mov rdx, 0xD1FFAB1E
- add rdx, r9
- ;; size=297 bbWeight=1 PerfScore 52.50
+ xor r10, qword ptr [rdx+0x08]
+ mov rdx, rcx
+ mulx rcx, rdx, r10
+ xor rdx, rcx
+ add rdx, rax
+ mov rax, rdx
+ lea rdx, [rdi+0x50]
+ ;; size=297 bbWeight=1 PerfScore 52.25
G_M37356_IG03:
- xor rdx, qword ptr [rax]
+ mov rcx, 0xD1FFAB1E
+ add rcx, r9
+ xor rcx, qword ptr [rdx]
mov r10, 0xD1FFAB1E
add r10, r8
- xor r10, qword ptr [rax+0x08]
- mov rax, r10
- mul rdx:rax, rdx
+ xor r10, qword ptr [rdx+0x08]
+ mov rdx, rcx
+ mulx rcx, rdx, r10
+ xor rdx, rcx
+ add rdx, rax
+ mov rax, rdx
+ lea rdx, [rdi+0x60]
+ mov rcx, 0xD1FFAB1E
+ add rcx, r9
+ xor rcx, qword ptr [rdx]
+ mov r10, 0xD1FFAB1E
+ add r10, r8
+ xor r10, qword ptr [rdx+0x08]
+ mov rdx, rcx
+ mulx rcx, rdx, r10
+ xor rdx, rcx
+ add rdx, rax
+ mov rax, rdx
+ lea rdx, [rdi+0x70]
+ mov rcx, 0xD1FFAB1E
+ add rcx, r9
+ xor rcx, qword ptr [rdx]
+ mov r10, 0xD1FFAB1E
+ add r10, r8
+ xor r10, qword ptr [rdx+0x08]
+ mov rdx, rcx
+ mulx rcx, rdx, r10
+ xor rdx, rcx
+ add rdx, rax
+ mov rax, rdx
+ shr rax, 37
xor rax, rdx
- add rax, rcx
- mov rcx, rax
- lea rax, [rdi+0x60]
mov rdx, 0xD1FFAB1E
- add rdx, r9
- xor rdx, qword ptr [rax]
- mov r10, 0xD1FFAB1E
- add r10, r8
- xor r10, qword ptr [rax+0x08]
- mov rax, r10
- mul rdx:rax, rdx
+ imul rdx, rax
+ mov rax, rdx
+ shr rax, 32
xor rax, rdx
- add rax, rcx
- mov rcx, rax
- lea rax, [rdi+0x70]
- mov rdx, 0xD1FFAB1E
- add rdx, r9
- xor rdx, qword ptr [rax]
- mov r10, 0xD1FFAB1E
- add r10, r8
- xor r10, qword ptr [rax+0x08]
- mov rax, r10
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, rcx
- mov rcx, rax
- shr rcx, 37
- xor rcx, rax
- mov rax, 0xD1FFAB1E
- imul rax, rcx
- mov rcx, rax
- shr rcx, 32
- xor rcx, rax
- lea eax, [rsi-0x80]
- shr eax, 4
- cmp eax, 6
+ lea edx, [rsi-0x80]
+ shr edx, 4
+ cmp edx, 6
ja SHORT G_M37356_IG05
- ;; size=181 bbWeight=1 PerfScore 33.75
+ ;; size=200 bbWeight=1 PerfScore 34.25
G_M37356_IG04:
- mov eax, eax
- lea rdx, [reloc @RWD00]
- mov edx, dword ptr [rdx+4*rax]
+ mov edx, edx
+ lea rcx, [reloc @RWD00]
+ mov ecx, dword ptr [rcx+4*rdx]
lea r10, G_M37356_IG02
- add rdx, r10
- jmp rdx
+ add rcx, r10
+ jmp rcx
;; size=24 bbWeight=0.88 PerfScore 5.25
G_M37356_IG05:
- lea rax, [rdi+0xE0]
- mov rdx, 0xD1FFAB1E
- add rdx, r9
- xor rdx, qword ptr [rax]
+ lea rdx, [rdi+0xE0]
+ mov rcx, 0xD1FFAB1E
+ add rcx, r9
+ xor rcx, qword ptr [rdx]
mov r10, 0xD1FFAB1E
add r10, r8
- xor r10, qword ptr [rax+0x08]
- mov rax, r10
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, rcx
- mov rcx, rax
- ;; size=55 bbWeight=0.50 PerfScore 4.75
+ xor r10, qword ptr [rdx+0x08]
+ mov rdx, rcx
+ mulx rcx, rdx, r10
+ xor rdx, rcx
+ add rdx, rax
+ mov rax, rdx
+ ;; size=57 bbWeight=0.50 PerfScore 4.75
G_M37356_IG06:
- lea rax, [rdi+0xD0]
- mov rdx, 0xD1FFAB1E
- add rdx, r9
- xor rdx, qword ptr [rax]
+ lea rdx, [rdi+0xD0]
+ mov rcx, 0xD1FFAB1E
+ add rcx, r9
+ xor rcx, qword ptr [rdx]
mov r10, 0xD1FFAB1E
add r10, r8
- xor r10, qword ptr [rax+0x08]
- mov rax, r10
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, rcx
- mov rcx, rax
- ;; size=55 bbWeight=0.50 PerfScore 4.75
+ xor r10, qword ptr [rdx+0x08]
+ mov rdx, rcx
+ mulx rcx, rdx, r10
+ xor rdx, rcx
+ add rdx, rax
+ mov rax, rdx
+ ;; size=57 bbWeight=0.50 PerfScore 4.75
G_M37356_IG07:
- lea rax, [rdi+0xC0]
- mov rdx, 0xD1FFAB1E
- add rdx, r9
- xor rdx, qword ptr [rax]
+ lea rdx, [rdi+0xC0]
+ mov rcx, 0xD1FFAB1E
+ add rcx, r9
+ xor rcx, qword ptr [rdx]
mov r10, 0xD1FFAB1E
add r10, r8
- xor r10, qword ptr [rax+0x08]
- mov rax, r10
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, rcx
- mov rcx, rax
- ;; size=55 bbWeight=0.50 PerfScore 4.75
+ xor r10, qword ptr [rdx+0x08]
+ mov rdx, rcx
+ mulx rcx, rdx, r10
+ xor rdx, rcx
+ add rdx, rax
+ mov rax, rdx
+ ;; size=57 bbWeight=0.50 PerfScore 4.75
G_M37356_IG08:
- lea rax, [rdi+0xB0]
- mov rdx, 0xD1FFAB1E
- add rdx, r9
- xor rdx, qword ptr [rax]
+ lea rdx, [rdi+0xB0]
+ mov rcx, 0xD1FFAB1E
+ add rcx, r9
+ xor rcx, qword ptr [rdx]
mov r10, 0xD1FFAB1E
add r10, r8
- xor r10, qword ptr [rax+0x08]
- mov rax, r10
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, rcx
- mov rcx, rax
- ;; size=55 bbWeight=0.50 PerfScore 4.75
+ xor r10, qword ptr [rdx+0x08]
+ mov rdx, rcx
+ mulx rcx, rdx, r10
+ xor rdx, rcx
+ add rdx, rax
+ mov rax, rdx
+ ;; size=57 bbWeight=0.50 PerfScore 4.75
G_M37356_IG09:
- lea rax, [rdi+0xA0]
- mov rdx, 0xD1FFAB1E
- add rdx, r9
- xor rdx, qword ptr [rax]
+ lea rdx, [rdi+0xA0]
+ mov rcx, 0xD1FFAB1E
+ add rcx, r9
+ xor rcx, qword ptr [rdx]
mov r10, 0xD1FFAB1E
add r10, r8
- xor r10, qword ptr [rax+0x08]
- mov rax, r10
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, rcx
- mov rcx, rax
- ;; size=55 bbWeight=0.50 PerfScore 4.75
+ xor r10, qword ptr [rdx+0x08]
+ mov rdx, rcx
+ mulx rcx, rdx, r10
+ xor rdx, rcx
+ add rdx, rax
+ mov rax, rdx
+ ;; size=57 bbWeight=0.50 PerfScore 4.75
G_M37356_IG10:
- lea rax, [rdi+0x90]
- mov rdx, 0xD1FFAB1E
- add rdx, r9
- xor rdx, qword ptr [rax]
+ lea rdx, [rdi+0x90]
+ mov rcx, 0xD1FFAB1E
+ add rcx, r9
+ xor rcx, qword ptr [rdx]
mov r10, 0xD1FFAB1E
add r10, r8
- xor r10, qword ptr [rax+0x08]
- mov rax, r10
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, rcx
- mov rcx, rax
- ;; size=55 bbWeight=0.50 PerfScore 4.75
+ xor r10, qword ptr [rdx+0x08]
+ mov rdx, rcx
+ mulx rcx, rdx, r10
+ xor rdx, rcx
+ add rdx, rax
+ mov rax, rdx
+ ;; size=57 bbWeight=0.50 PerfScore 4.75
G_M37356_IG11:
- lea rax, [rdi+0x80]
- mov rdx, 0xD1FFAB1E
- add rdx, r9
- xor rdx, qword ptr [rax]
+ lea rdx, [rdi+0x80]
+ mov rcx, 0xD1FFAB1E
+ add rcx, r9
+ xor rcx, qword ptr [rdx]
mov r10, 0xD1FFAB1E
add r10, r8
- xor r10, qword ptr [rax+0x08]
- mov rax, r10
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, rcx
- mov rcx, rax
- ;; size=55 bbWeight=0.50 PerfScore 4.75
+ xor r10, qword ptr [rdx+0x08]
+ mov rdx, rcx
+ mulx rcx, rdx, r10
+ xor rdx, rcx
+ add rdx, rax
+ mov rax, rdx
+ ;; size=57 bbWeight=0.50 PerfScore 4.75
G_M37356_IG12:
- mov eax, esi
- lea rax, [rdi+rax-0x10]
- mov rdx, 0xD1FFAB1E
- add rdx, r9
- xor rdx, qword ptr [rax]
+ mov edx, esi
+ lea rdx, [rdi+rdx-0x10]
+ mov rcx, 0xD1FFAB1E
+ add rcx, r9
+ xor rcx, qword ptr [rdx]
mov rdi, 0xD1FFAB1E
add rdi, r8
- xor rdi, qword ptr [rax+0x08]
- mov rax, rdi
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, rcx
- mov rcx, rax
- shr rcx, 37
- xor rcx, rax
- mov rax, 0xD1FFAB1E
- imul rax, rcx
- mov rcx, rax
- shr rcx, 32
+ xor rdi, qword ptr [rdx+0x08]
+ mov rdx, rcx
+ mulx rdx, rcx, rdi
+ xor rcx, rdx
+ add rcx, rax
+ mov rax, rcx
+ shr rax, 37
xor rax, rcx
- ;; size=86 bbWeight=1 PerfScore 14.25
+ mov rcx, 0xD1FFAB1E
+ imul rcx, rax
+ mov rax, rcx
+ shr rax, 32
+ xor rax, rcx
+ ;; size=88 bbWeight=1 PerfScore 14.25
G_M37356_IG13:
add rsp, 16
pop rbp
ret
;; size=6 bbWeight=1 PerfScore 1.75
RWD00 dd G_M37356_IG12 - G_M37356_IG02
dd G_M37356_IG11 - G_M37356_IG02
dd G_M37356_IG10 - G_M37356_IG02
dd G_M37356_IG09 - G_M37356_IG02
dd G_M37356_IG08 - G_M37356_IG02
dd G_M37356_IG07 - G_M37356_IG02
dd G_M37356_IG06 - G_M37356_IG02
-; Total bytes of code 989, prolog size 10, PerfScore 142.50, instruction count 227, allocated bytes for code 989 (MethodHash=d8616e13) for method System.IO.Hashing.XxHash3:HashLength129To240(ptr,uint,ulong):ulong (FullOpts)
+; Total bytes of code 1024, prolog size 10, PerfScore 142.75, instruction count 228, allocated bytes for code 1024 (MethodHash=d8616e13) for method System.IO.Hashing.XxHash3:HashLength129To240(ptr,uint,ulong):ulong (FullOpts)
; ============================================================
```
30 (4.08 % of base) - System.IO.Hashing.XxHash128:HashLength17To128(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128
```diff
; Assembly listing for method System.IO.Hashing.XxHash128:HashLength17To128(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
; FullOpts code
; optimized code
; rbp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 36 single block inlinees; 40 inlinees without PGO data
; Final local variable assignments
;
; V00 arg0 [V00,T02] ( 11, 8 ) long -> rdi single-def
; V01 arg1 [V01,T06] ( 4, 4 ) int -> rsi single-def
; V02 arg2 [V02,T00] ( 15, 10.50) long -> [rbp-0x18] single-def
-; V03 loc0 [V03,T03] ( 11, 8 ) long -> r8 ld-addr-op
-; V04 loc1 [V04,T05] ( 10, 7.50) long -> r9 ld-addr-op
+; V03 loc0 [V03,T03] ( 11, 8 ) long -> rcx ld-addr-op
+; V04 loc1 [V04,T05] ( 10, 7.50) long -> r8 ld-addr-op
;* V05 loc2 [V05 ] ( 0, 0 ) int -> zero-ref
;# V06 OutArgs [V06 ] ( 1, 1 ) struct ( 0) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V07 tmp1 [V07 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
-; V08 tmp2 [V08,T12] ( 4, 4 ) long -> r9 "Inlining Arg"
+; V08 tmp2 [V08,T12] ( 4, 4 ) long -> r8 "Inlining Arg"
;* V09 tmp3 [V09 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
; V10 tmp4 [V10,T13] ( 4, 4 ) long -> rsi "Inlining Arg"
-; V11 tmp5 [V11,T27] ( 2, 2 ) long -> r8 "impAppendStmt"
-; V12 tmp6 [V12,T28] ( 2, 2 ) long -> rax "impAppendStmt"
+; V11 tmp5 [V11,T27] ( 2, 2 ) long -> rcx "impAppendStmt"
+; V12 tmp6 [V12,T28] ( 2, 2 ) long -> rdx "impAppendStmt"
;* V13 tmp7 [V13 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
-; V14 tmp8 [V14,T29] ( 2, 2 ) long -> rax "impAppendStmt"
-; V15 tmp9 [V15,T30] ( 2, 2 ) long -> r9 "impAppendStmt"
+; V14 tmp8 [V14,T29] ( 2, 2 ) long -> rdx "impAppendStmt"
+; V15 tmp9 [V15,T30] ( 2, 2 ) long -> r8 "impAppendStmt"
;* V16 tmp10 [V16 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V17 tmp11 [V17 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V18 tmp12 [V18 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V19 tmp13 [V19 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V20 tmp14 [V20 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V21 tmp15 [V21 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V22 tmp16 [V22 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V23 tmp17 [V23 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V24 tmp18 [V24 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V25 tmp19 [V25 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V26 tmp20 [V26 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V27 tmp21 [V27 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V28 tmp22 [V28 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V29 tmp23 [V29 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V30 tmp24 [V30 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V31 tmp25 [V31 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V32 tmp26 [V32 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V33 tmp27 [V33 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V34 tmp28 [V34 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V35 tmp29 [V35 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V36 tmp30 [V36 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V37 tmp31 [V37 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V38 tmp32 [V38 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V39 tmp33 [V39 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
; V40 tmp34 [V40,T14] ( 4, 4 ) long -> rsi "Inlining Arg"
;* V41 tmp35 [V41 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
-; V42 tmp36 [V42,T15] ( 4, 4 ) long -> r10 "Inlining Arg"
-; V43 tmp37 [V43,T31] ( 2, 2 ) long -> rax "impAppendStmt"
-; V44 tmp38 [V44,T32] ( 2, 2 ) long -> r8 "impAppendStmt"
+; V42 tmp36 [V42,T15] ( 4, 4 ) long -> r9 "Inlining Arg"
+; V43 tmp37 [V43,T31] ( 2, 2 ) long -> rdx "impAppendStmt"
+; V44 tmp38 [V44,T32] ( 2, 2 ) long -> rcx "impAppendStmt"
;* V45 tmp39 [V45 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
-; V46 tmp40 [V46,T33] ( 2, 2 ) long -> r9 "impAppendStmt"
-; V47 tmp41 [V47,T34] ( 2, 2 ) long -> rax "impAppendStmt"
+; V46 tmp40 [V46,T33] ( 2, 2 ) long -> r8 "impAppendStmt"
+; V47 tmp41 [V47,T34] ( 2, 2 ) long -> rdx "impAppendStmt"
;* V48 tmp42 [V48 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V49 tmp43 [V49 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V50 tmp44 [V50 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V51 tmp45 [V51 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V52 tmp46 [V52 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V53 tmp47 [V53 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V54 tmp48 [V54 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V55 tmp49 [V55 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V56 tmp50 [V56 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V57 tmp51 [V57 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V58 tmp52 [V58 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V59 tmp53 [V59 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V60 tmp54 [V60 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V61 tmp55 [V61 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V62 tmp56 [V62 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V63 tmp57 [V63 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V64 tmp58 [V64 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V65 tmp59 [V65 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V66 tmp60 [V66 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V67 tmp61 [V67 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V68 tmp62 [V68 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V69 tmp63 [V69 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V70 tmp64 [V70 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V71 tmp65 [V71 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
; V72 tmp66 [V72,T16] ( 4, 4 ) long -> rsi "Inlining Arg"
;* V73 tmp67 [V73 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
-; V74 tmp68 [V74,T17] ( 4, 4 ) long -> r10 "Inlining Arg"
-; V75 tmp69 [V75,T35] ( 2, 2 ) long -> rax "impAppendStmt"
-; V76 tmp70 [V76,T36] ( 2, 2 ) long -> r8 "impAppendStmt"
+; V74 tmp68 [V74,T17] ( 4, 4 ) long -> r9 "Inlining Arg"
+; V75 tmp69 [V75,T35] ( 2, 2 ) long -> rdx "impAppendStmt"
+; V76 tmp70 [V76,T36] ( 2, 2 ) long -> rcx "impAppendStmt"
;* V77 tmp71 [V77 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
-; V78 tmp72 [V78,T37] ( 2, 2 ) long -> rax "impAppendStmt"
-; V79 tmp73 [V79,T38] ( 2, 2 ) long -> r9 "impAppendStmt"
+; V78 tmp72 [V78,T37] ( 2, 2 ) long -> rdx "impAppendStmt"
+; V79 tmp73 [V79,T38] ( 2, 2 ) long -> r8 "impAppendStmt"
;* V80 tmp74 [V80 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V81 tmp75 [V81 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V82 tmp76 [V82 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V83 tmp77 [V83 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V84 tmp78 [V84 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V85 tmp79 [V85 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V86 tmp80 [V86 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V87 tmp81 [V87 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V88 tmp82 [V88 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V89 tmp83 [V89 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V90 tmp84 [V90 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V91 tmp85 [V91 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V92 tmp86 [V92 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V93 tmp87 [V93 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V94 tmp88 [V94 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V95 tmp89 [V95 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V96 tmp90 [V96 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V97 tmp91 [V97 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V98 tmp92 [V98 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V99 tmp93 [V99 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V100 tmp94 [V100 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V101 tmp95 [V101 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V102 tmp96 [V102 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V103 tmp97 [V103 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V104 tmp98 [V104 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
; V105 tmp99 [V105,T07] ( 3, 6 ) long -> rsi "Inlining Arg"
-; V106 tmp100 [V106,T18] ( 2, 4 ) long -> rax "impAppendStmt"
-; V107 tmp101 [V107,T19] ( 2, 4 ) long -> r8 "impAppendStmt"
+; V106 tmp100 [V106,T18] ( 2, 4 ) long -> rdx "impAppendStmt"
+; V107 tmp101 [V107,T19] ( 2, 4 ) long -> rcx "impAppendStmt"
;* V108 tmp102 [V108 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
-; V109 tmp103 [V109,T20] ( 2, 4 ) long -> rax "impAppendStmt"
-; V110 tmp104 [V110,T21] ( 2, 4 ) long -> r10 "impAppendStmt"
+; V109 tmp103 [V109,T20] ( 2, 4 ) long -> rdx "impAppendStmt"
+; V110 tmp104 [V110,T21] ( 2, 4 ) long -> r9 "impAppendStmt"
;* V111 tmp105 [V111 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V112 tmp106 [V112 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V113 tmp107 [V113 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V114 tmp108 [V114 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V115 tmp109 [V115 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V116 tmp110 [V116 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V117 tmp111 [V117 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V118 tmp112 [V118 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V119 tmp113 [V119 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V120 tmp114 [V120 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V121 tmp115 [V121 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V122 tmp116 [V122 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V123 tmp117 [V123 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V124 tmp118 [V124 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V125 tmp119 [V125 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V126 tmp120 [V126 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V127 tmp121 [V127 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V128 tmp122 [V128 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V129 tmp123 [V129 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V130 tmp124 [V130 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V131 tmp125 [V131 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V132 tmp126 [V132 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V133 tmp127 [V133 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V134 tmp128 [V134 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V135 tmp129 [V135 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V136 tmp130 [V136 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
; V137 tmp131 [V137,T11] ( 5, 5 ) long -> rdx "Inline stloc first use temp"
; V138 tmp132 [V138,T22] ( 2, 4 ) long -> rax "impAppendStmt"
;* V139 tmp133 [V139 ] ( 0, 0 ) struct (16) zero-ref multireg-ret ld-addr-op "NewObj constructor temp"
; V140 tmp134 [V140,T01] ( 6, 12 ) long -> rax "Inlining Arg"
; V141 tmp135 [V141,T08] ( 3, 6 ) long -> rdx "Inlining Arg"
;* V142 tmp136 [V142 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V07.Low64 (fldOffset=0x0)" P-DEP
;* V143 tmp137 [V143 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V07.High64 (fldOffset=0x8)" P-DEP
;* V144 tmp138 [V144 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V24.Item1 (fldOffset=0x0)" P-DEP
;* V145 tmp139 [V145 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V24.Item2 (fldOffset=0x8)" P-DEP
-; V146 tmp140 [V146,T49] ( 2, 1 ) long -> rax "field V25.Item1 (fldOffset=0x0)" P-INDEP
-; V147 tmp141 [V147,T50] ( 2, 1 ) long -> rdx "field V25.Item2 (fldOffset=0x8)" P-INDEP
+; V146 tmp140 [V146,T49] ( 2, 1 ) long -> rdx "field V25.Item1 (fldOffset=0x0)" P-INDEP
+; V147 tmp141 [V147,T50] ( 2, 1 ) long -> r9 "field V25.Item2 (fldOffset=0x8)" P-INDEP
;* V148 tmp142 [V148 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V36.Item1 (fldOffset=0x0)" P-DEP
;* V149 tmp143 [V149 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V36.Item2 (fldOffset=0x8)" P-DEP
-; V150 tmp144 [V150,T51] ( 2, 1 ) long -> rax "field V37.Item1 (fldOffset=0x0)" P-INDEP
-; V151 tmp145 [V151,T52] ( 2, 1 ) long -> rdx "field V37.Item2 (fldOffset=0x8)" P-INDEP
+; V150 tmp144 [V150,T51] ( 2, 1 ) long -> rdx "field V37.Item1 (fldOffset=0x0)" P-INDEP
+; V151 tmp145 [V151,T52] ( 2, 1 ) long -> rsi "field V37.Item2 (fldOffset=0x8)" P-INDEP
;* V152 tmp146 [V152 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V56.Item1 (fldOffset=0x0)" P-DEP
;* V153 tmp147 [V153 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V56.Item2 (fldOffset=0x8)" P-DEP
-; V154 tmp148 [V154,T53] ( 2, 1 ) long -> rax "field V57.Item1 (fldOffset=0x0)" P-INDEP
-; V155 tmp149 [V155,T54] ( 2, 1 ) long -> rdx "field V57.Item2 (fldOffset=0x8)" P-INDEP
+; V154 tmp148 [V154,T53] ( 2, 1 ) long -> rdx "field V57.Item1 (fldOffset=0x0)" P-INDEP
+; V155 tmp149 [V155,T54] ( 2, 1 ) long -> r10 "field V57.Item2 (fldOffset=0x8)" P-INDEP
;* V156 tmp150 [V156 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V68.Item1 (fldOffset=0x0)" P-DEP
;* V157 tmp151 [V157 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V68.Item2 (fldOffset=0x8)" P-DEP
-; V158 tmp152 [V158,T55] ( 2, 1 ) long -> rax "field V69.Item1 (fldOffset=0x0)" P-INDEP
-; V159 tmp153 [V159,T56] ( 2, 1 ) long -> rdx "field V69.Item2 (fldOffset=0x8)" P-INDEP
+; V158 tmp152 [V158,T55] ( 2, 1 ) long -> rdx "field V69.Item1 (fldOffset=0x0)" P-INDEP
+; V159 tmp153 [V159,T56] ( 2, 1 ) long -> r9 "field V69.Item2 (fldOffset=0x8)" P-INDEP
;* V160 tmp154 [V160 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V88.Item1 (fldOffset=0x0)" P-DEP
;* V161 tmp155 [V161 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V88.Item2 (fldOffset=0x8)" P-DEP
-; V162 tmp156 [V162,T57] ( 2, 1 ) long -> rax "field V89.Item1 (fldOffset=0x0)" P-INDEP
-; V163 tmp157 [V163,T58] ( 2, 1 ) long -> rdx "field V89.Item2 (fldOffset=0x8)" P-INDEP
+; V162 tmp156 [V162,T57] ( 2, 1 ) long -> rdx "field V89.Item1 (fldOffset=0x0)" P-INDEP
+; V163 tmp157 [V163,T58] ( 2, 1 ) long -> r10 "field V89.Item2 (fldOffset=0x8)" P-INDEP
;* V164 tmp158 [V164 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V100.Item1 (fldOffset=0x0)" P-DEP
;* V165 tmp159 [V165 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V100.Item2 (fldOffset=0x8)" P-DEP
-; V166 tmp160 [V166,T59] ( 2, 1 ) long -> rax "field V101.Item1 (fldOffset=0x0)" P-INDEP
-; V167 tmp161 [V167,T60] ( 2, 1 ) long -> rdx "field V101.Item2 (fldOffset=0x8)" P-INDEP
+; V166 tmp160 [V166,T59] ( 2, 1 ) long -> rdx "field V101.Item1 (fldOffset=0x0)" P-INDEP
+; V167 tmp161 [V167,T60] ( 2, 1 ) long -> r9 "field V101.Item2 (fldOffset=0x8)" P-INDEP
;* V168 tmp162 [V168 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V119.Item1 (fldOffset=0x0)" P-DEP
;* V169 tmp163 [V169 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V119.Item2 (fldOffset=0x8)" P-DEP
-; V170 tmp164 [V170,T39] ( 2, 2 ) long -> rax "field V120.Item1 (fldOffset=0x0)" P-INDEP
-; V171 tmp165 [V171,T40] ( 2, 2 ) long -> rdx "field V120.Item2 (fldOffset=0x8)" P-INDEP
+; V170 tmp164 [V170,T39] ( 2, 2 ) long -> rdx "field V120.Item1 (fldOffset=0x0)" P-INDEP
+; V171 tmp165 [V171,T40] ( 2, 2 ) long -> r11 "field V120.Item2 (fldOffset=0x8)" P-INDEP
;* V172 tmp166 [V172 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V131.Item1 (fldOffset=0x0)" P-DEP
;* V173 tmp167 [V173 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V131.Item2 (fldOffset=0x8)" P-DEP
-; V174 tmp168 [V174,T41] ( 2, 2 ) long -> rax "field V132.Item1 (fldOffset=0x0)" P-INDEP
-; V175 tmp169 [V175,T42] ( 2, 2 ) long -> rdx "field V132.Item2 (fldOffset=0x8)" P-INDEP
+; V174 tmp168 [V174,T41] ( 2, 2 ) long -> rdx "field V132.Item1 (fldOffset=0x0)" P-INDEP
+; V175 tmp169 [V175,T42] ( 2, 2 ) long -> rsi "field V132.Item2 (fldOffset=0x8)" P-INDEP
;* V176 tmp170 [V176 ] ( 0, 0 ) long -> zero-ref "field V139.Low64 (fldOffset=0x0)" P-INDEP
;* V177 tmp171 [V177 ] ( 0, 0 ) long -> zero-ref "field V139.High64 (fldOffset=0x8)" P-INDEP
; V178 cse0 [V178,T23] ( 3, 3 ) long -> rsi "CSE #17: moderate"
; V179 cse1 [V179,T24] ( 3, 3 ) long -> rdi "CSE #19: moderate"
-; V180 cse2 [V180,T43] ( 3, 1.50) long -> rdx "CSE #03: conservative"
+; V180 cse2 [V180,T43] ( 3, 1.50) long -> r9 "CSE #03: conservative"
; V181 cse3 [V181,T44] ( 3, 1.50) long -> r10 "CSE #06: conservative"
-; V182 cse4 [V182,T45] ( 3, 1.50) long -> rdx "CSE #09: conservative"
+; V182 cse4 [V182,T45] ( 3, 1.50) long -> r10 "CSE #09: conservative"
; V183 cse5 [V183,T46] ( 3, 1.50) long -> r11 "CSE #11: conservative"
-; V184 cse6 [V184,T47] ( 3, 1.50) long -> rdx "CSE #13: conservative"
+; V184 cse6 [V184,T47] ( 3, 1.50) long -> r10 "CSE #13: conservative"
; V185 cse7 [V185,T48] ( 3, 1.50) long -> r11 "CSE #15: conservative"
-; V186 cse8 [V186,T25] ( 3, 3 ) long -> rdx "CSE #16: moderate"
-; V187 cse9 [V187,T26] ( 3, 3 ) long -> r10 "CSE #18: moderate"
-; V188 cse10 [V188,T09] ( 7, 5.50) long -> rcx "CSE #01: moderate"
+; V186 cse8 [V186,T25] ( 3, 3 ) long -> r11 "CSE #16: moderate"
+; V187 cse9 [V187,T26] ( 3, 3 ) long -> r9 "CSE #18: moderate"
+; V188 cse10 [V188,T09] ( 7, 5.50) long -> rax "CSE #01: moderate"
; V189 cse11 [V189,T04] ( 12, 7.50) long -> registers multi-def "CSE #04: aggressive"
; V190 rat0 [V190,T10] ( 3, 5.50) int -> rsi "ReplaceWithLclVar is creating a new local variable"
;
; Lcl frame size = 16
G_M27806_IG01:
push rbp
push r15
push rbx
sub rsp, 16
lea rbp, [rsp+0x20]
;; size=13 bbWeight=1 PerfScore 3.75
G_M27806_IG02:
- mov ecx, esi
- mov r8, 0xD1FFAB1E
- imul r8, rcx
- xor r9d, r9d
+ mov eax, esi
+ mov rcx, 0xD1FFAB1E
+ imul rcx, rax
+ xor r8d, r8d
dec esi
shr esi, 5
cmp esi, 2
ja SHORT G_M27806_IG04
;; size=29 bbWeight=1 PerfScore 4.75
G_M27806_IG03:
- mov eax, esi
- lea rsi, [reloc @RWD00]
- mov esi, dword ptr [rsi+4*rax]
+ mov esi, esi
+ lea r9, [reloc @RWD00]
+ mov r9d, dword ptr [r9+4*rsi]
lea r10, G_M27806_IG02
- add rsi, r10
- jmp rsi
- ;; size=24 bbWeight=0.75 PerfScore 4.50
+ add r9, r10
+ jmp r9
+ ;; size=26 bbWeight=0.75 PerfScore 4.50
G_M27806_IG04:
- lea r9, [rdi+0x30]
- lea rsi, [rdi+rcx-0x40]
- mov rax, 0xD1FFAB1E
- add rax, rdx
- xor rax, qword ptr [r9]
- mov r10, qword ptr [r9+0x08]
+ lea r8, [rdi+0x30]
+ lea rsi, [rdi+rax-0x40]
+ mov r9, 0xD1FFAB1E
+ add r9, rdx
+ xor r9, qword ptr [r8]
+ mov r10, qword ptr [r8+0x08]
mov qword ptr [rbp-0x18], rdx
mov r11, rdx
neg r11
mov rbx, 0xD1FFAB1E
add rbx, r11
xor rbx, r10
- mul rdx:rax, rbx
- xor rax, rdx
- add r8, rax
- mov rax, qword ptr [rsi]
- mov rdx, qword ptr [rsi+0x08]
- add rax, rdx
- xor r8, rax
- mov rax, 0xD1FFAB1E
+ mov rdx, r9
+ mulx r9, rdx, rbx
+ xor rdx, r9
+ add rcx, rdx
+ mov rdx, qword ptr [rsi]
+ mov r9, qword ptr [rsi+0x08]
+ add rdx, r9
+ xor rcx, rdx
+ mov rdx, 0xD1FFAB1E
mov rbx, qword ptr [rbp-0x18]
- add rax, rbx
- xor rax, qword ptr [rsi]
+ add rdx, rbx
+ xor rdx, qword ptr [rsi]
mov rsi, 0xD1FFAB1E
add r11, rsi
- xor rdx, r11
- mul rdx:rax, rdx
- xor rax, rdx
- mov r9, qword ptr [r9]
- add r9, r10
- xor r9, rax
+ xor r9, r11
+ mulx rsi, rdx, r9
+ xor rdx, rsi
+ mov r8, qword ptr [r8]
+ add r8, r10
+ xor r8, rdx
mov rdx, rbx
- ;; size=131 bbWeight=0.50 PerfScore 13.25
+ ;; size=138 bbWeight=0.50 PerfScore 13.38
G_M27806_IG05:
lea rsi, [rdi+0x20]
- lea r10, [rdi+rcx-0x30]
- mov rax, 0xD1FFAB1E
- add rax, rdx
- xor rax, qword ptr [rsi]
+ lea r9, [rdi+rax-0x30]
+ mov r10, 0xD1FFAB1E
+ add r10, rdx
+ xor r10, qword ptr [rsi]
mov r11, qword ptr [rsi+0x08]
mov qword ptr [rbp-0x18], rdx
mov rbx, rdx
neg rbx
mov r15, 0xD1FFAB1E
add r15, rbx
xor r15, r11
- mul rdx:rax, r15
- xor rax, rdx
- add rax, r8
- mov r8, qword ptr [r10]
- mov rdx, qword ptr [r10+0x08]
- add r8, rdx
- xor r8, rax
- mov rax, 0xD1FFAB1E
- mov r15, qword ptr [rbp-0x18]
- add rax, r15
- xor rax, qword ptr [r10]
- mov r10, 0xD1FFAB1E
- add r10, rbx
+ mov rdx, r10
+ mulx r10, rdx, r15
xor rdx, r10
- mul rdx:rax, rdx
- xor rax, rdx
- add r9, rax
- mov rax, qword ptr [rsi]
- add rax, r11
- xor r9, rax
+ add rdx, rcx
+ mov rcx, qword ptr [r9]
+ mov r10, qword ptr [r9+0x08]
+ add rcx, r10
+ xor rcx, rdx
+ mov rdx, 0xD1FFAB1E
+ mov r15, qword ptr [rbp-0x18]
+ add rdx, r15
+ xor rdx, qword ptr [r9]
+ mov r9, 0xD1FFAB1E
+ add r9, rbx
+ xor r9, r10
+ mulx r9, rdx, r9
+ xor rdx, r9
+ add r8, rdx
+ mov rdx, qword ptr [rsi]
+ add rdx, r11
+ xor r8, rdx
mov rdx, r15
- ;; size=134 bbWeight=0.50 PerfScore 13.38
+ ;; size=141 bbWeight=0.50 PerfScore 13.50
G_M27806_IG06:
lea rsi, [rdi+0x10]
- lea r10, [rdi+rcx-0x20]
- mov rax, 0xD1FFAB1E
- add rax, rdx
- xor rax, qword ptr [rsi]
+ lea r9, [rdi+rax-0x20]
+ mov r10, 0xD1FFAB1E
+ add r10, rdx
+ xor r10, qword ptr [rsi]
mov r11, qword ptr [rsi+0x08]
mov qword ptr [rbp-0x18], rdx
mov rbx, rdx
neg rbx
mov r15, 0xD1FFAB1E
add r15, rbx
xor r15, r11
- mul rdx:rax, r15
- xor rax, rdx
- add rax, r8
- mov r8, qword ptr [r10]
- mov rdx, qword ptr [r10+0x08]
- add r8, rdx
- xor r8, rax
- mov rax, 0xD1FFAB1E
- mov r15, qword ptr [rbp-0x18]
- add rax, r15
- xor rax, qword ptr [r10]
- mov r10, 0xD1FFAB1E
- add r10, rbx
+ mov rdx, r10
+ mulx r10, rdx, r15
xor rdx, r10
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, r9
- mov r9, qword ptr [rsi]
- add r9, r11
- xor r9, rax
+ add rdx, rcx
+ mov rcx, qword ptr [r9]
+ mov r10, qword ptr [r9+0x08]
+ add rcx, r10
+ xor rcx, rdx
+ mov rdx, 0xD1FFAB1E
+ mov r15, qword ptr [rbp-0x18]
+ add rdx, r15
+ xor rdx, qword ptr [r9]
+ mov r9, 0xD1FFAB1E
+ add r9, rbx
+ xor r9, r10
+ mulx r9, rdx, r9
+ xor rdx, r9
+ add rdx, r8
+ mov r8, qword ptr [rsi]
+ add r8, r11
+ xor r8, rdx
mov rdx, r15
- ;; size=134 bbWeight=0.50 PerfScore 13.38
+ ;; size=141 bbWeight=0.50 PerfScore 13.50
G_M27806_IG07:
- lea rsi, [rdi+rcx-0x10]
- mov r10, qword ptr [rdi]
- mov rax, 0xD1FFAB1E
- add rax, rdx
- xor rax, r10
- mov rdi, qword ptr [rdi+0x08]
+ lea rsi, [rdi+rax-0x10]
+ mov r9, qword ptr [rdi]
+ mov r10, 0xD1FFAB1E
mov qword ptr [rbp-0x18], rdx
- mov rbx, rdx
+ add r10, rdx
+ mov rdx, r9
+ xor rdx, r10
+ mov rdi, qword ptr [rdi+0x08]
+ mov r10, qword ptr [rbp-0x18]
+ mov rbx, r10
neg rbx
mov r11, 0xD1FFAB1E
add r11, rbx
xor r11, rdi
- mul rdx:rax, r11
- xor rax, rdx
- add rax, r8
- mov rdx, qword ptr [rsi]
- mov r8, rdx
+ mulx r11, rdx, r11
+ xor rdx, r11
+ add rdx, rcx
+ mov r11, qword ptr [rsi]
+ mov rcx, r11
mov rsi, qword ptr [rsi+0x08]
- add r8, rsi
- xor r8, rax
- mov rax, 0xD1FFAB1E
- mov r11, qword ptr [rbp-0x18]
- add rax, r11
- xor rax, rdx
+ add rcx, rsi
+ xor rcx, rdx
mov rdx, 0xD1FFAB1E
- add rdx, rbx
+ add rdx, r10
+ xor rdx, r11
+ mov r11, 0xD1FFAB1E
+ add r11, rbx
+ xor rsi, r11
+ mulx rsi, rdx, rsi
xor rdx, rsi
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, r9
- add rdi, r10
- mov r9, rdi
- xor r9, rax
+ add rdx, r8
+ add rdi, r9
+ mov r8, rdi
+ xor r8, rdx
mov rdx, 0xD1FFAB1E
- imul rdx, r8
- mov rax, 0xD1FFAB1E
- imul rax, r9
+ imul rdx, rcx
+ mov rdi, 0xD1FFAB1E
+ imul rdi, r8
+ add rdx, rdi
+ sub rax, r10
+ mov rdi, 0xD1FFAB1E
+ imul rax, rdi
add rdx, rax
- sub rcx, r11
- mov rax, 0xD1FFAB1E
- imul rax, rcx
- add rdx, rax
- lea rax, [r8+r9]
+ lea rax, [rcx+r8]
mov rcx, rax
shr rcx, 37
xor rcx, rax
mov rax, 0xD1FFAB1E
imul rax, rcx
mov rcx, rax
shr rcx, 32
xor rax, rcx
mov rcx, rdx
shr rcx, 37
xor rcx, rdx
mov rdx, 0xD1FFAB1E
imul rdx, rcx
mov rcx, rdx
shr rcx, 32
xor rcx, rdx
mov rdx, rcx
neg rdx
- ;; size=262 bbWeight=1 PerfScore 40.00
+ ;; size=269 bbWeight=1 PerfScore 40.25
G_M27806_IG08:
add rsp, 16
pop rbx
pop r15
pop rbp
ret
;; size=9 bbWeight=1 PerfScore 2.75
RWD00 dd G_M27806_IG07 - G_M27806_IG02
dd G_M27806_IG06 - G_M27806_IG02
dd G_M27806_IG05 - G_M27806_IG02
-; Total bytes of code 736, prolog size 13, PerfScore 95.75, instruction count 183, allocated bytes for code 736 (MethodHash=ae7b9361) for method System.IO.Hashing.XxHash128:HashLength17To128(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
+; Total bytes of code 766, prolog size 13, PerfScore 96.38, instruction count 187, allocated bytes for code 766 (MethodHash=ae7b9361) for method System.IO.Hashing.XxHash128:HashLength17To128(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
; ============================================================
```
22 (3.04 % of base) - System.IO.Hashing.XxHash128:HashLength0To16(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128
```diff
; Assembly listing for method System.IO.Hashing.XxHash128:HashLength0To16(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
; FullOpts code
; optimized code
; rbp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 25 single block inlinees; 8 inlinees without PGO data
; Final local variable assignments
;
; V00 arg0 [V00,T06] ( 9, 5.50) long -> rdi single-def
; V01 arg1 [V01,T01] ( 12, 7.50) int -> rsi single-def
; V02 arg2 [V02,T04] ( 10, 6 ) long -> rdx single-def
;# V03 OutArgs [V03 ] ( 1, 1 ) struct ( 0) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
; V04 tmp1 [V04,T16] ( 2, 2 ) long -> rax "impAppendStmt"
;* V05 tmp2 [V05 ] ( 0, 0 ) struct (16) zero-ref multireg-ret ld-addr-op "NewObj constructor temp"
;* V06 tmp3 [V06 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V07 tmp4 [V07 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V08 tmp5 [V08 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
; V09 tmp6 [V09,T25] ( 2, 1 ) long -> rax "Inline stloc first use temp"
; V10 tmp7 [V10,T26] ( 2, 1 ) long -> rcx "Inline stloc first use temp"
; V11 tmp8 [V11,T17] ( 2, 2 ) long -> rdx "impAppendStmt"
; V12 tmp9 [V12,T07] ( 6, 3 ) long -> rdi "Inline stloc first use temp"
-; V13 tmp10 [V13,T27] ( 2, 1 ) long -> rax ld-addr-op "Inline ldloca(s) first use temp"
-; V14 tmp11 [V14,T21] ( 3, 1.50) long -> [rbp-0x08] spill-single-def "Inline stloc first use temp"
+; V13 tmp10 [V13,T27] ( 2, 1 ) long -> rdx ld-addr-op "Inline ldloca(s) first use temp"
+; V14 tmp11 [V14,T21] ( 3, 1.50) long -> rax "Inline stloc first use temp"
;* V15 tmp12 [V15 ] ( 0, 0 ) long -> zero-ref
;* V16 tmp13 [V16 ] ( 0, 0 ) long -> zero-ref
;* V17 tmp14 [V17 ] ( 0, 0 ) long -> zero-ref
-; V18 tmp15 [V18,T28] ( 2, 1 ) long -> rax ld-addr-op "Inline ldloca(s) first use temp"
-; V19 tmp16 [V19,T15] ( 5, 2.50) long -> rdx "Inline stloc first use temp"
+; V18 tmp15 [V18,T28] ( 2, 1 ) long -> rcx ld-addr-op "Inline ldloca(s) first use temp"
+; V19 tmp16 [V19,T15] ( 5, 2.50) long -> [rbp-0x08] "Inline stloc first use temp"
;* V20 tmp17 [V20 ] ( 0, 0 ) struct (16) zero-ref multireg-ret ld-addr-op "NewObj constructor temp"
;* V21 tmp18 [V21 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V22 tmp19 [V22 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V23 tmp20 [V23 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V24 tmp21 [V24 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V25 tmp22 [V25 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V26 tmp23 [V26 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V27 tmp24 [V27 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V28 tmp25 [V28 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V29 tmp26 [V29 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V30 tmp27 [V30 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V31 tmp28 [V31 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V32 tmp29 [V32 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V33 tmp30 [V33,T09] ( 3, 3 ) long -> rax "Inlining Arg"
-; V34 tmp31 [V34,T10] ( 3, 3 ) long -> rdx "Inlining Arg"
+; V33 tmp30 [V33,T09] ( 3, 3 ) long -> rdx "Inlining Arg"
+; V34 tmp31 [V34,T10] ( 3, 3 ) long -> rax "Inlining Arg"
;* V35 tmp32 [V35 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
; V36 tmp33 [V36,T18] ( 2, 2 ) long -> rax "Inlining Arg"
; V37 tmp34 [V37,T19] ( 2, 2 ) int -> rdx "impAppendStmt"
;* V38 tmp35 [V38 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V39 tmp36 [V39 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
; V40 tmp37 [V40,T29] ( 2, 1 ) long -> rax ld-addr-op "Inline ldloca(s) first use temp"
; V41 tmp38 [V41,T08] ( 6, 3 ) long -> rdx "Inline stloc first use temp"
;* V42 tmp39 [V42 ] ( 0, 0 ) struct (16) zero-ref multireg-ret ld-addr-op "NewObj constructor temp"
;* V43 tmp40 [V43 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
;* V44 tmp41 [V44 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V45 tmp42 [V45 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V46 tmp43 [V46 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V47 tmp44 [V47 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V48 tmp45 [V48 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V49 tmp46 [V49 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V50 tmp47 [V50 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Return value temp for multireg return"
;* V51 tmp48 [V51 ] ( 0, 0 ) struct (16) zero-ref "Inline stloc first use temp"
; V52 tmp49 [V52,T11] ( 3, 3 ) long -> rax "Inlining Arg"
; V53 tmp50 [V53,T12] ( 3, 3 ) long -> rax "Inlining Arg"
; V54 tmp51 [V54,T13] ( 3, 3 ) long -> rdx "Inlining Arg"
;* V55 tmp52 [V55 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V56 tmp53 [V56 ] ( 0, 0 ) ubyte -> zero-ref "Inline stloc first use temp"
;* V57 tmp54 [V57 ] ( 0, 0 ) int -> zero-ref "impAppendStmt"
;* V58 tmp55 [V58 ] ( 0, 0 ) ubyte -> zero-ref "Inline stloc first use temp"
; V59 tmp56 [V59,T14] ( 3, 3 ) int -> rax "dup spill"
; V60 tmp57 [V60,T30] ( 2, 1 ) int -> rcx "Inline stloc first use temp"
; V61 tmp58 [V61,T31] ( 2, 1 ) long -> rdi "Inline stloc first use temp"
;* V62 tmp59 [V62 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
; V63 tmp60 [V63,T22] ( 3, 1.50) long -> rdx "Inline stloc first use temp"
; V64 tmp61 [V64,T20] ( 2, 2 ) long -> rax "impAppendStmt"
;* V65 tmp62 [V65 ] ( 0, 0 ) struct (16) zero-ref multireg-ret ld-addr-op "NewObj constructor temp"
; V66 tmp63 [V66,T02] ( 9, 9 ) long -> rax "Inlining Arg"
; V67 tmp64 [V67,T05] ( 8, 8 ) long -> rdx "Inlining Arg"
; V68 tmp65 [V68,T03] ( 9, 9 ) long -> rax "Inlining Arg"
; V69 tmp66 [V69,T00] ( 11, 11 ) long -> rdx "Inlining Arg"
;* V70 tmp67 [V70 ] ( 0, 0 ) long -> zero-ref "field V05.Low64 (fldOffset=0x0)" P-INDEP
;* V71 tmp68 [V71 ] ( 0, 0 ) long -> zero-ref "field V05.High64 (fldOffset=0x8)" P-INDEP
;* V72 tmp69 [V72 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V06.Low64 (fldOffset=0x0)" P-DEP
;* V73 tmp70 [V73 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V06.High64 (fldOffset=0x8)" P-DEP
;* V74 tmp71 [V74 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V07.Low64 (fldOffset=0x0)" P-DEP
;* V75 tmp72 [V75 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V07.High64 (fldOffset=0x8)" P-DEP
;* V76 tmp73 [V76 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V08.Low64 (fldOffset=0x0)" P-DEP
;* V77 tmp74 [V77 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V08.High64 (fldOffset=0x8)" P-DEP
;* V78 tmp75 [V78 ] ( 0, 0 ) long -> zero-ref "field V20.Low64 (fldOffset=0x0)" P-INDEP
;* V79 tmp76 [V79 ] ( 0, 0 ) long -> zero-ref "field V20.High64 (fldOffset=0x8)" P-INDEP
;* V80 tmp77 [V80 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V26.Item1 (fldOffset=0x0)" P-DEP
;* V81 tmp78 [V81 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V26.Item2 (fldOffset=0x8)" P-DEP
-; V82 tmp79 [V82,T32] ( 2, 1 ) long -> rax "field V27.Item1 (fldOffset=0x0)" P-INDEP
-; V83 tmp80 [V83,T33] ( 2, 1 ) long -> rdx "field V27.Item2 (fldOffset=0x8)" P-INDEP
+; V82 tmp79 [V82,T32] ( 2, 1 ) long -> rdx "field V27.Item1 (fldOffset=0x0)" P-INDEP
+; V83 tmp80 [V83,T33] ( 2, 1 ) long -> rax "field V27.Item2 (fldOffset=0x8)" P-INDEP
;* V84 tmp81 [V84 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V31.Item1 (fldOffset=0x0)" P-DEP
;* V85 tmp82 [V85 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V31.Item2 (fldOffset=0x8)" P-DEP
-; V86 tmp83 [V86,T23] ( 3, 1.50) long -> rax "field V32.Item1 (fldOffset=0x0)" P-INDEP
-; V87 tmp84 [V87,T34] ( 2, 1 ) long -> rdx "field V32.Item2 (fldOffset=0x8)" P-INDEP
+; V86 tmp83 [V86,T23] ( 3, 1.50) long -> rdx "field V32.Item1 (fldOffset=0x0)" P-INDEP
+; V87 tmp84 [V87,T34] ( 2, 1 ) long -> rcx "field V32.Item2 (fldOffset=0x8)" P-INDEP
;* V88 tmp85 [V88 ] ( 0, 0 ) long -> zero-ref "field V42.Low64 (fldOffset=0x0)" P-INDEP
;* V89 tmp86 [V89 ] ( 0, 0 ) long -> zero-ref "field V42.High64 (fldOffset=0x8)" P-INDEP
; V90 tmp87 [V90,T24] ( 3, 1.50) long -> rax "field V50.Item1 (fldOffset=0x0)" P-INDEP
; V91 tmp88 [V91,T35] ( 2, 1 ) long -> rdx "field V50.Item2 (fldOffset=0x8)" P-INDEP
;* V92 tmp89 [V92 ] ( 0, 0 ) long -> zero-ref "field V51.Item1 (fldOffset=0x0)" P-INDEP
;* V93 tmp90 [V93 ] ( 0, 0 ) long -> zero-ref "field V51.Item2 (fldOffset=0x8)" P-INDEP
;* V94 tmp91 [V94 ] ( 0, 0 ) long -> zero-ref "field V65.Low64 (fldOffset=0x0)" P-INDEP
;* V95 tmp92 [V95 ] ( 0, 0 ) long -> zero-ref "field V65.High64 (fldOffset=0x8)" P-INDEP
;
; Lcl frame size = 16
G_M16948_IG01:
push rbp
sub rsp, 16
lea rbp, [rsp+0x10]
;; size=10 bbWeight=1 PerfScore 1.75
G_M16948_IG02:
cmp esi, 8
ja G_M16948_IG09
;; size=9 bbWeight=1 PerfScore 1.25
G_M16948_IG03:
cmp esi, 4
jae G_M16948_IG07
test esi, esi
jne G_M16948_IG05
mov rax, 0xD1FFAB1E
xor rax, rdx
mov rdi, rax
shr rdi, 33
xor rdi, rax
mov rax, 0xD1FFAB1E
imul rax, rdi
mov rsi, rax
shr rsi, 29
xor rsi, rax
mov rax, 0xD1FFAB1E
imul rax, rsi
mov rcx, rax
shr rcx, 32
xor rax, rcx
mov rcx, 0xD1FFAB1E
xor rdx, rcx
mov rcx, rdx
shr rcx, 33
xor rcx, rdx
mov rdx, 0xD1FFAB1E
imul rdx, rcx
mov rcx, rdx
shr rcx, 29
xor rcx, rdx
mov rdx, 0xD1FFAB1E
imul rdx, rcx
mov rcx, rdx
shr rcx, 32
xor rdx, rcx
;; size=159 bbWeight=0.50 PerfScore 9.25
G_M16948_IG04:
add rsp, 16
pop rbp
ret
;; size=6 bbWeight=0.50 PerfScore 0.88
G_M16948_IG05:
movzx rax, byte ptr [rdi]
shl eax, 16
mov ecx, esi
shr ecx, 1
movzx rcx, byte ptr [rdi+rcx]
shl ecx, 24
or eax, ecx
lea ecx, [rsi-0x01]
movzx rdi, byte ptr [rdi+rcx]
or eax, edi
shl esi, 8
or eax, esi
mov ecx, eax
bswap ecx
rol ecx, 13
mov edi, 0xD1FFAB1E
add rdi, rdx
neg rdx
add rdx, 0xD1FFAB1E
xor rdx, rcx
xor rax, rdi
mov rcx, rax
shr rcx, 33
xor rcx, rax
mov rax, 0xD1FFAB1E
imul rax, rcx
mov rcx, rax
shr rcx, 29
xor rcx, rax
mov rax, 0xD1FFAB1E
imul rax, rcx
mov rcx, rax
shr rcx, 32
xor rax, rcx
mov rcx, rdx
shr rcx, 33
xor rcx, rdx
mov rdx, 0xD1FFAB1E
imul rdx, rcx
mov rcx, rdx
shr rcx, 29
xor rcx, rdx
mov rdx, 0xD1FFAB1E
imul rdx, rcx
mov rcx, rdx
shr rcx, 32
xor rdx, rcx
;; size=181 bbWeight=0.50 PerfScore 13.62
G_M16948_IG06:
add rsp, 16
pop rbp
ret
;; size=6 bbWeight=0.50 PerfScore 0.88
G_M16948_IG07:
mov eax, edx
bswap eax
shl rax, 32
xor rax, rdx
mov edx, dword ptr [rdi]
mov ecx, esi
mov edi, dword ptr [rdi+rcx-0x04]
shl rdi, 32
add rdx, rdi
mov rcx, 0xD1FFAB1E
- add rax, rcx
- xor rax, rdx
- lea edx, [4*rsi]
+ add rcx, rax
+ xor rdx, rcx
+ lea eax, [4*rsi]
mov rsi, 0xD1FFAB1E
- add rdx, rsi
- mul rdx:rax, rdx
+ add rax, rsi
+ mulx rdx, rax, rax
lea rdx, [rdx+2*rax]
mov rcx, rdx
shr rcx, 3
xor rax, rcx
mov rcx, rax
shr rcx, 35
xor rcx, rax
mov rax, 0xD1FFAB1E
imul rax, rcx
mov rcx, rax
shr rcx, 28
xor rax, rcx
mov rcx, rdx
shr rcx, 37
xor rcx, rdx
mov rdx, 0xD1FFAB1E
imul rdx, rcx
mov rcx, rdx
shr rcx, 32
xor rdx, rcx
- ;; size=147 bbWeight=0.50 PerfScore 10.62
+ ;; size=149 bbWeight=0.50 PerfScore 10.62
G_M16948_IG08:
add rsp, 16
pop rbp
ret
;; size=6 bbWeight=0.50 PerfScore 0.88
G_M16948_IG09:
mov rax, rdx
neg rax
mov rcx, 0xD1FFAB1E
add rax, rcx
mov rcx, 0xD1FFAB1E
add rcx, rdx
mov rdx, qword ptr [rdi]
mov r8d, esi
mov rdi, qword ptr [rdi+r8-0x08]
xor rdx, rdi
- xor rax, rdx
- mov rdx, 0xD1FFAB1E
- mul rdx:rax, rdx
+ xor rdx, rax
+ mov rax, 0xD1FFAB1E
+ mulx rax, rdx, rax
dec esi
shl rsi, 54
- add rax, rsi
+ add rdx, rsi
xor rdi, rcx
- add rdx, rdi
+ add rax, rdi
mov ecx, edi
mov edi, 0xD1FFAB1E
imul rcx, rdi
- add rdx, rcx
- mov qword ptr [rbp-0x08], rdx
- mov rcx, rdx
+ add rax, rcx
+ mov rcx, rax
bswap rcx
- xor rax, rcx
+ xor rdx, rcx
mov rcx, 0xD1FFAB1E
- mul rdx:rax, rcx
- imul rcx, qword ptr [rbp-0x08]
- add rdx, rcx
- mov rcx, rax
- shr rcx, 37
- xor rcx, rax
- mov rax, 0xD1FFAB1E
- imul rax, rcx
- mov rcx, rax
- shr rcx, 32
- xor rax, rcx
+ mulx rcx, rdx, rcx
+ mov rdi, 0xD1FFAB1E
+ imul rax, rdi
+ add rax, rcx
mov rcx, rdx
shr rcx, 37
xor rcx, rdx
mov rdx, 0xD1FFAB1E
imul rdx, rcx
mov rcx, rdx
shr rcx, 32
- xor rdx, rcx
- ;; size=193 bbWeight=0.50 PerfScore 16.12
+ xor rcx, rdx
+ mov rdx, rax
+ shr rdx, 37
+ xor rdx, rax
+ mov rax, 0xD1FFAB1E
+ imul rax, rdx
+ mov rdx, rax
+ shr rdx, 32
+ xor rax, rdx
+ mov qword ptr [rbp-0x08], rax
+ mov rax, rcx
+ mov rdx, qword ptr [rbp-0x08]
+ ;; size=213 bbWeight=0.50 PerfScore 15.88
G_M16948_IG10:
add rsp, 16
pop rbp
ret
;; size=6 bbWeight=0.50 PerfScore 0.88
-; Total bytes of code 723, prolog size 10, PerfScore 56.12, instruction count 180, allocated bytes for code 723 (MethodHash=a04cbdcb) for method System.IO.Hashing.XxHash128:HashLength0To16(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
+; Total bytes of code 745, prolog size 10, PerfScore 55.88, instruction count 183, allocated bytes for code 745 (MethodHash=a04cbdcb) for method System.IO.Hashing.XxHash128:HashLength0To16(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
; ============================================================
```
21 (3.69 % of base) - System.IO.Hashing.XxHash3:HashLength17To128(ptr,uint,ulong):ulong
```diff
; Assembly listing for method System.IO.Hashing.XxHash3:HashLength17To128(ptr,uint,ulong):ulong (FullOpts)
; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
; FullOpts code
; optimized code
; rbp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 27 single block inlinees; 24 inlinees without PGO data
; Final local variable assignments
;
; V00 arg0 [V00,T03] ( 11, 8 ) long -> rdi single-def
; V01 arg1 [V01,T05] ( 4, 4 ) int -> rsi single-def
; V02 arg2 [V02,T01] ( 14, 9.50) long -> [rbp-0x08] single-def
-; V03 loc0 [V03,T02] ( 16, 10 ) long -> r8
+; V03 loc0 [V03,T02] ( 16, 10 ) long -> rcx
;* V04 loc1 [V04 ] ( 0, 0 ) int -> zero-ref
;# V05 OutArgs [V05 ] ( 1, 1 ) struct ( 0) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-; V06 tmp1 [V06,T09] ( 3, 3 ) long -> rax "Inlining Arg"
+; V06 tmp1 [V06,T09] ( 3, 3 ) long -> rsi "Inlining Arg"
;* V07 tmp2 [V07 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V08 tmp3 [V08 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V09 tmp4 [V09 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V10 tmp5 [V10 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V11 tmp6 [V11 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V12 tmp7 [V12 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V13 tmp8 [V13 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V14 tmp9 [V14 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V15 tmp10 [V15 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V16 tmp11 [V16 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V17 tmp12 [V17,T10] ( 3, 3 ) long -> rax "Inlining Arg"
+; V17 tmp12 [V17,T10] ( 3, 3 ) long -> rdx "Inlining Arg"
;* V18 tmp13 [V18 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V19 tmp14 [V19 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V20 tmp15 [V20 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V21 tmp16 [V21 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V22 tmp17 [V22 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V23 tmp18 [V23 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V24 tmp19 [V24 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V25 tmp20 [V25 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V26 tmp21 [V26 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V27 tmp22 [V27 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V28 tmp23 [V28,T11] ( 3, 3 ) long -> rax "Inlining Arg"
+; V28 tmp23 [V28,T11] ( 3, 3 ) long -> rsi "Inlining Arg"
;* V29 tmp24 [V29 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V30 tmp25 [V30 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V31 tmp26 [V31 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V32 tmp27 [V32 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V33 tmp28 [V33 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V34 tmp29 [V34 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V35 tmp30 [V35 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V36 tmp31 [V36 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V37 tmp32 [V37 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V38 tmp33 [V38 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V39 tmp34 [V39,T12] ( 3, 3 ) long -> rax "Inlining Arg"
+; V39 tmp34 [V39,T12] ( 3, 3 ) long -> rdx "Inlining Arg"
;* V40 tmp35 [V40 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V41 tmp36 [V41 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V42 tmp37 [V42 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V43 tmp38 [V43 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V44 tmp39 [V44 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V45 tmp40 [V45 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V46 tmp41 [V46 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V47 tmp42 [V47 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V48 tmp43 [V48 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V49 tmp44 [V49 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V50 tmp45 [V50,T13] ( 3, 3 ) long -> rax "Inlining Arg"
+; V50 tmp45 [V50,T13] ( 3, 3 ) long -> rsi "Inlining Arg"
;* V51 tmp46 [V51 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V52 tmp47 [V52 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V53 tmp48 [V53 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V54 tmp49 [V54 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V55 tmp50 [V55 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V56 tmp51 [V56 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V57 tmp52 [V57 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V58 tmp53 [V58 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V59 tmp54 [V59 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V60 tmp55 [V60 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V61 tmp56 [V61,T14] ( 3, 3 ) long -> rax "Inlining Arg"
+; V61 tmp56 [V61,T14] ( 3, 3 ) long -> rdx "Inlining Arg"
;* V62 tmp57 [V62 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V63 tmp58 [V63 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V64 tmp59 [V64 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V65 tmp60 [V65 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V66 tmp61 [V66 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V67 tmp62 [V67 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V68 tmp63 [V68 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V69 tmp64 [V69 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V70 tmp65 [V70 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V71 tmp66 [V71 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V72 tmp67 [V72 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V73 tmp68 [V73 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V74 tmp69 [V74 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V75 tmp70 [V75 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V76 tmp71 [V76 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V77 tmp72 [V77 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V78 tmp73 [V78 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V79 tmp74 [V79 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V80 tmp75 [V80 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V81 tmp76 [V81 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V82 tmp77 [V82,T06] ( 3, 6 ) long -> rax "Inlining Arg"
+; V82 tmp77 [V82,T06] ( 3, 6 ) long -> rdx "Inlining Arg"
;* V83 tmp78 [V83 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V84 tmp79 [V84 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V85 tmp80 [V85 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V86 tmp81 [V86 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V87 tmp82 [V87 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V88 tmp83 [V88 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V89 tmp84 [V89 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V90 tmp85 [V90 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V91 tmp86 [V91 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V92 tmp87 [V92 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
; V93 tmp88 [V93,T00] ( 6, 12 ) long -> rax "Inlining Arg"
;* V94 tmp89 [V94 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V15.Item1 (fldOffset=0x0)" P-DEP
;* V95 tmp90 [V95 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V15.Item2 (fldOffset=0x8)" P-DEP
-; V96 tmp91 [V96,T19] ( 2, 1 ) long -> rax "field V16.Item1 (fldOffset=0x0)" P-INDEP
-; V97 tmp92 [V97,T20] ( 2, 1 ) long -> rdx "field V16.Item2 (fldOffset=0x8)" P-INDEP
+; V96 tmp91 [V96,T19] ( 2, 1 ) long -> rdx "field V16.Item1 (fldOffset=0x0)" P-INDEP
+; V97 tmp92 [V97,T20] ( 2, 1 ) long -> rsi "field V16.Item2 (fldOffset=0x8)" P-INDEP
;* V98 tmp93 [V98 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V26.Item1 (fldOffset=0x0)" P-DEP
;* V99 tmp94 [V99 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V26.Item2 (fldOffset=0x8)" P-DEP
-; V100 tmp95 [V100,T21] ( 2, 1 ) long -> rax "field V27.Item1 (fldOffset=0x0)" P-INDEP
-; V101 tmp96 [V101,T22] ( 2, 1 ) long -> rdx "field V27.Item2 (fldOffset=0x8)" P-INDEP
+; V100 tmp95 [V100,T21] ( 2, 1 ) long -> rdx "field V27.Item1 (fldOffset=0x0)" P-INDEP
+; V101 tmp96 [V101,T22] ( 2, 1 ) long -> rsi "field V27.Item2 (fldOffset=0x8)" P-INDEP
;* V102 tmp97 [V102 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V37.Item1 (fldOffset=0x0)" P-DEP
;* V103 tmp98 [V103 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V37.Item2 (fldOffset=0x8)" P-DEP
-; V104 tmp99 [V104,T23] ( 2, 1 ) long -> rax "field V38.Item1 (fldOffset=0x0)" P-INDEP
-; V105 tmp100 [V105,T24] ( 2, 1 ) long -> rdx "field V38.Item2 (fldOffset=0x8)" P-INDEP
+; V104 tmp99 [V104,T23] ( 2, 1 ) long -> rdx "field V38.Item1 (fldOffset=0x0)" P-INDEP
+; V105 tmp100 [V105,T24] ( 2, 1 ) long -> rsi "field V38.Item2 (fldOffset=0x8)" P-INDEP
;* V106 tmp101 [V106 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V48.Item1 (fldOffset=0x0)" P-DEP
;* V107 tmp102 [V107 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V48.Item2 (fldOffset=0x8)" P-DEP
-; V108 tmp103 [V108,T25] ( 2, 1 ) long -> rax "field V49.Item1 (fldOffset=0x0)" P-INDEP
+; V108 tmp103 [V108,T25] ( 2, 1 ) long -> r9 "field V49.Item1 (fldOffset=0x0)" P-INDEP
; V109 tmp104 [V109,T26] ( 2, 1 ) long -> rdx "field V49.Item2 (fldOffset=0x8)" P-INDEP
;* V110 tmp105 [V110 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V59.Item1 (fldOffset=0x0)" P-DEP
;* V111 tmp106 [V111 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V59.Item2 (fldOffset=0x8)" P-DEP
-; V112 tmp107 [V112,T27] ( 2, 1 ) long -> rax "field V60.Item1 (fldOffset=0x0)" P-INDEP
-; V113 tmp108 [V113,T28] ( 2, 1 ) long -> rdx "field V60.Item2 (fldOffset=0x8)" P-INDEP
+; V112 tmp107 [V112,T27] ( 2, 1 ) long -> rdx "field V60.Item1 (fldOffset=0x0)" P-INDEP
+; V113 tmp108 [V113,T28] ( 2, 1 ) long -> rsi "field V60.Item2 (fldOffset=0x8)" P-INDEP
;* V114 tmp109 [V114 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V70.Item1 (fldOffset=0x0)" P-DEP
;* V115 tmp110 [V115 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V70.Item2 (fldOffset=0x8)" P-DEP
-; V116 tmp111 [V116,T29] ( 2, 1 ) long -> rax "field V71.Item1 (fldOffset=0x0)" P-INDEP
+; V116 tmp111 [V116,T29] ( 2, 1 ) long -> r9 "field V71.Item1 (fldOffset=0x0)" P-INDEP
; V117 tmp112 [V117,T30] ( 2, 1 ) long -> rdx "field V71.Item2 (fldOffset=0x8)" P-INDEP
;* V118 tmp113 [V118 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V80.Item1 (fldOffset=0x0)" P-DEP
;* V119 tmp114 [V119 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V80.Item2 (fldOffset=0x8)" P-DEP
-; V120 tmp115 [V120,T15] ( 2, 2 ) long -> rax "field V81.Item1 (fldOffset=0x0)" P-INDEP
-; V121 tmp116 [V121,T16] ( 2, 2 ) long -> rdx "field V81.Item2 (fldOffset=0x8)" P-INDEP
+; V120 tmp115 [V120,T15] ( 2, 2 ) long -> rdx "field V81.Item1 (fldOffset=0x0)" P-INDEP
+; V121 tmp116 [V121,T16] ( 2, 2 ) long -> rsi "field V81.Item2 (fldOffset=0x8)" P-INDEP
;* V122 tmp117 [V122 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V91.Item1 (fldOffset=0x0)" P-DEP
;* V123 tmp118 [V123 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V91.Item2 (fldOffset=0x8)" P-DEP
; V124 tmp119 [V124,T17] ( 2, 2 ) long -> rax "field V92.Item1 (fldOffset=0x0)" P-INDEP
; V125 tmp120 [V125,T18] ( 2, 2 ) long -> rdx "field V92.Item2 (fldOffset=0x8)" P-INDEP
-; V126 cse0 [V126,T08] ( 6, 4.50) long -> rcx "CSE #01: aggressive"
+; V126 cse0 [V126,T08] ( 6, 4.50) long -> rax "CSE #01: aggressive"
; V127 cse1 [V127,T04] ( 12, 7.50) long -> r9 multi-def "CSE #02: aggressive"
; V128 rat0 [V128,T07] ( 3, 5.50) int -> rsi "ReplaceWithLclVar is creating a new local variable"
;
; Lcl frame size = 16
G_M39965_IG01:
push rbp
sub rsp, 16
lea rbp, [rsp+0x10]
;; size=10 bbWeight=1 PerfScore 1.75
G_M39965_IG02:
- mov ecx, esi
- mov r8, 0xD1FFAB1E
- imul r8, rcx
+ mov eax, esi
+ mov rcx, 0xD1FFAB1E
+ imul rcx, rax
dec esi
shr esi, 5
cmp esi, 2
ja SHORT G_M39965_IG04
;; size=26 bbWeight=1 PerfScore 4.50
G_M39965_IG03:
- mov eax, esi
- lea rsi, [reloc @RWD00]
- mov esi, dword ptr [rsi+4*rax]
+ mov esi, esi
+ lea r8, [reloc @RWD00]
+ mov r8d, dword ptr [r8+4*rsi]
lea r9, G_M39965_IG02
- add rsi, r9
- jmp rsi
- ;; size=24 bbWeight=0.75 PerfScore 4.50
+ add r8, r9
+ jmp r8
+ ;; size=26 bbWeight=0.75 PerfScore 4.50
G_M39965_IG04:
- lea rax, [rdi+0x30]
- mov rsi, 0xD1FFAB1E
- add rsi, rdx
- xor rsi, qword ptr [rax]
+ lea rsi, [rdi+0x30]
+ mov r8, 0xD1FFAB1E
+ add r8, rdx
+ xor r8, qword ptr [rsi]
mov qword ptr [rbp-0x08], rdx
mov r9, rdx
neg r9
mov r10, 0xD1FFAB1E
add r10, r9
- xor r10, qword ptr [rax+0x08]
- mov rax, r10
- mul rdx:rax, rsi
- xor rax, rdx
- add r8, rax
- lea rax, [rdi+rcx-0x40]
- mov rdx, 0xD1FFAB1E
- mov rsi, qword ptr [rbp-0x08]
- add rdx, rsi
- xor rdx, qword ptr [rax]
+ xor r10, qword ptr [rsi+0x08]
+ mov rdx, r8
+ mulx rsi, rdx, r10
+ xor rdx, rsi
+ add rcx, rdx
+ lea rdx, [rdi+rax-0x40]
+ mov rsi, 0xD1FFAB1E
+ mov r8, qword ptr [rbp-0x08]
+ add rsi, r8
+ xor rsi, qword ptr [rdx]
mov r10, 0xD1FFAB1E
add r9, r10
- xor r9, qword ptr [rax+0x08]
- mov rax, r9
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, r8
- mov r8, rax
+ xor r9, qword ptr [rdx+0x08]
mov rdx, rsi
- ;; size=119 bbWeight=0.50 PerfScore 11.00
+ mulx rsi, rdx, r9
+ xor rdx, rsi
+ add rdx, rcx
+ mov rcx, rdx
+ mov rdx, r8
+ ;; size=123 bbWeight=0.50 PerfScore 11.00
G_M39965_IG05:
- lea rax, [rdi+0x20]
- mov rsi, 0xD1FFAB1E
- add rsi, rdx
- xor rsi, qword ptr [rax]
+ lea rsi, [rdi+0x20]
+ mov r8, 0xD1FFAB1E
+ add r8, rdx
+ xor r8, qword ptr [rsi]
mov qword ptr [rbp-0x08], rdx
mov r9, rdx
neg r9
mov r10, 0xD1FFAB1E
add r10, r9
- xor r10, qword ptr [rax+0x08]
- mov rax, r10
- mul rdx:rax, rsi
- xor rax, rdx
- add rax, r8
- mov r8, rax
- lea rax, [rdi+rcx-0x30]
- mov rdx, 0xD1FFAB1E
- mov rsi, qword ptr [rbp-0x08]
- add rdx, rsi
- xor rdx, qword ptr [rax]
+ xor r10, qword ptr [rsi+0x08]
+ mov rdx, r8
+ mulx rsi, rdx, r10
+ xor rdx, rsi
+ add rdx, rcx
+ mov rcx, rdx
+ lea rdx, [rdi+rax-0x30]
+ mov rsi, 0xD1FFAB1E
+ mov r8, qword ptr [rbp-0x08]
+ add rsi, r8
+ xor rsi, qword ptr [rdx]
mov r10, 0xD1FFAB1E
add r10, r9
- xor r10, qword ptr [rax+0x08]
- mov rax, r10
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, r8
- mov r8, rax
+ xor r10, qword ptr [rdx+0x08]
mov rdx, rsi
- ;; size=122 bbWeight=0.50 PerfScore 11.12
+ mulx rdx, r9, r10
+ xor rdx, r9
+ add rdx, rcx
+ mov rcx, rdx
+ mov rdx, r8
+ ;; size=126 bbWeight=0.50 PerfScore 11.12
G_M39965_IG06:
- lea rax, [rdi+0x10]
+ lea rsi, [rdi+0x10]
+ mov r8, 0xD1FFAB1E
+ add r8, rdx
+ xor r8, qword ptr [rsi]
+ mov qword ptr [rbp-0x08], rdx
+ mov r9, rdx
+ neg r9
+ mov r10, 0xD1FFAB1E
+ add r10, r9
+ xor r10, qword ptr [rsi+0x08]
+ mov rdx, r8
+ mulx rsi, rdx, r10
+ xor rdx, rsi
+ add rdx, rcx
+ mov rcx, rdx
+ lea rdx, [rdi+rax-0x20]
+ mov rsi, 0xD1FFAB1E
+ mov r8, qword ptr [rbp-0x08]
+ add rsi, r8
+ xor rsi, qword ptr [rdx]
+ mov r10, 0xD1FFAB1E
+ add r10, r9
+ xor r10, qword ptr [rdx+0x08]
+ mov rdx, rsi
+ mulx rdx, r9, r10
+ xor rdx, r9
+ add rdx, rcx
+ mov rcx, rdx
+ mov rdx, r8
+ ;; size=126 bbWeight=0.50 PerfScore 11.12
+G_M39965_IG07:
mov rsi, 0xD1FFAB1E
add rsi, rdx
- xor rsi, qword ptr [rax]
+ xor rsi, qword ptr [rdi]
mov qword ptr [rbp-0x08], rdx
mov r9, rdx
neg r9
- mov r10, 0xD1FFAB1E
- add r10, r9
- xor r10, qword ptr [rax+0x08]
- mov rax, r10
- mul rdx:rax, rsi
- xor rax, rdx
- add rax, r8
- mov r8, rax
- lea rax, [rdi+rcx-0x20]
- mov rdx, 0xD1FFAB1E
- mov rsi, qword ptr [rbp-0x08]
- add rdx, rsi
- xor rdx, qword ptr [rax]
- mov r10, 0xD1FFAB1E
- add r10, r9
- xor r10, qword ptr [rax+0x08]
- mov rax, r10
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, r8
- mov r8, rax
+ mov r8, 0xD1FFAB1E
+ add r8, r9
+ xor r8, qword ptr [rdi+0x08]
mov rdx, rsi
- ;; size=122 bbWeight=0.50 PerfScore 11.12
-G_M39965_IG07:
+ mulx rsi, rdx, r8
+ xor rdx, rsi
+ add rdx, rcx
+ mov rcx, rdx
+ lea rdx, [rdi+rax-0x10]
mov rax, 0xD1FFAB1E
- add rax, rdx
- xor rax, qword ptr [rdi]
- mov qword ptr [rbp-0x08], rdx
- mov r9, rdx
- neg r9
- mov rsi, 0xD1FFAB1E
- add rsi, r9
- xor rsi, qword ptr [rdi+0x08]
- mul rdx:rax, rsi
+ add rax, qword ptr [rbp-0x08]
+ xor rax, qword ptr [rdx]
+ mov rdi, 0xD1FFAB1E
+ add rdi, r9
+ xor rdi, qword ptr [rdx+0x08]
+ mov rdx, rax
+ mulx rdx, rax, rdi
xor rax, rdx
- add rax, r8
- mov r8, rax
- lea rax, [rdi+rcx-0x10]
- mov rdx, 0xD1FFAB1E
- add rdx, qword ptr [rbp-0x08]
- xor rdx, qword ptr [rax]
- mov rcx, 0xD1FFAB1E
- add rcx, r9
- xor rcx, qword ptr [rax+0x08]
- mov rax, rcx
- mul rdx:rax, rdx
- xor rax, rdx
- add rax, r8
+ add rax, rcx
mov rcx, rax
shr rcx, 37
xor rcx, rax
mov rax, 0xD1FFAB1E
imul rax, rcx
mov rcx, rax
shr rcx, 32
xor rax, rcx
- ;; size=140 bbWeight=1 PerfScore 25.00
+ ;; size=147 bbWeight=1 PerfScore 25.25
G_M39965_IG08:
add rsp, 16
pop rbp
ret
;; size=6 bbWeight=1 PerfScore 1.75
RWD00 dd G_M39965_IG07 - G_M39965_IG02
dd G_M39965_IG06 - G_M39965_IG02
dd G_M39965_IG05 - G_M39965_IG02
-; Total bytes of code 569, prolog size 10, PerfScore 70.75, instruction count 137, allocated bytes for code 569 (MethodHash=0ade63e2) for method System.IO.Hashing.XxHash3:HashLength17To128(ptr,uint,ulong):ulong (FullOpts)
+; Total bytes of code 590, prolog size 10, PerfScore 71.00, instruction count 138, allocated bytes for code 590 (MethodHash=0ade63e2) for method System.IO.Hashing.XxHash3:HashLength17To128(ptr,uint,ulong):ulong (FullOpts)
; ============================================================
```
20 (9.57 % of base) - System.IO.Hashing.XxHash128:HashLength9To16(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128
```diff
; Assembly listing for method System.IO.Hashing.XxHash128:HashLength9To16(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
; FullOpts code
; optimized code
; rbp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 10 single block inlinees; 4 inlinees without PGO data
; Final local variable assignments
;
; V00 arg0 [V00,T01] ( 4, 4 ) long -> rdi single-def
; V01 arg1 [V01,T02] ( 4, 4 ) int -> rsi single-def
; V02 arg2 [V02,T03] ( 4, 4 ) long -> rdx single-def
; V03 loc0 [V03,T10] ( 2, 2 ) long -> rax
; V04 loc1 [V04,T11] ( 2, 2 ) long -> rcx
; V05 loc2 [V05,T00] ( 6, 6 ) long -> rdi
-; V06 loc3 [V06,T08] ( 3, 3 ) long -> [rbp-0x08] spill-single-def
-; V07 loc4 [V07,T12] ( 2, 2 ) long -> rax ld-addr-op
-; V08 loc5 [V08,T06] ( 5, 5 ) long -> rdx
-; V09 loc6 [V09,T13] ( 2, 2 ) long -> rax ld-addr-op
+; V06 loc3 [V06,T08] ( 3, 3 ) long -> rax
+; V07 loc4 [V07,T12] ( 2, 2 ) long -> rdx ld-addr-op
+; V08 loc5 [V08,T06] ( 5, 5 ) long -> [rbp-0x08]
+; V09 loc6 [V09,T13] ( 2, 2 ) long -> rcx ld-addr-op
;# V10 OutArgs [V10 ] ( 1, 1 ) struct ( 0) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
; V11 tmp1 [V11,T07] ( 2, 4 ) long -> rdx "impAppendStmt"
;* V12 tmp2 [V12 ] ( 0, 0 ) long -> zero-ref
;* V13 tmp3 [V13 ] ( 0, 0 ) long -> zero-ref
;* V14 tmp4 [V14 ] ( 0, 0 ) long -> zero-ref
;* V15 tmp5 [V15 ] ( 0, 0 ) struct (16) zero-ref multireg-ret ld-addr-op "NewObj constructor temp"
;* V16 tmp6 [V16 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V17 tmp7 [V17 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V18 tmp8 [V18 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V19 tmp9 [V19 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V20 tmp10 [V20 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V21 tmp11 [V21 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V22 tmp12 [V22 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V23 tmp13 [V23 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V24 tmp14 [V24 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V25 tmp15 [V25 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V26 tmp16 [V26 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V27 tmp17 [V27 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V28 tmp18 [V28,T04] ( 3, 6 ) long -> rax "Inlining Arg"
-; V29 tmp19 [V29,T05] ( 3, 6 ) long -> rdx "Inlining Arg"
+; V28 tmp18 [V28,T04] ( 3, 6 ) long -> rdx "Inlining Arg"
+; V29 tmp19 [V29,T05] ( 3, 6 ) long -> rax "Inlining Arg"
;* V30 tmp20 [V30 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V31 tmp21 [V31 ] ( 0, 0 ) long -> zero-ref "field V15.Low64 (fldOffset=0x0)" P-INDEP
;* V32 tmp22 [V32 ] ( 0, 0 ) long -> zero-ref "field V15.High64 (fldOffset=0x8)" P-INDEP
;* V33 tmp23 [V33 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V21.Item1 (fldOffset=0x0)" P-DEP
;* V34 tmp24 [V34 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V21.Item2 (fldOffset=0x8)" P-DEP
-; V35 tmp25 [V35,T14] ( 2, 2 ) long -> rax "field V22.Item1 (fldOffset=0x0)" P-INDEP
-; V36 tmp26 [V36,T15] ( 2, 2 ) long -> rdx "field V22.Item2 (fldOffset=0x8)" P-INDEP
+; V35 tmp25 [V35,T14] ( 2, 2 ) long -> rdx "field V22.Item1 (fldOffset=0x0)" P-INDEP
+; V36 tmp26 [V36,T15] ( 2, 2 ) long -> rax "field V22.Item2 (fldOffset=0x8)" P-INDEP
;* V37 tmp27 [V37 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V26.Item1 (fldOffset=0x0)" P-DEP
;* V38 tmp28 [V38 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V26.Item2 (fldOffset=0x8)" P-DEP
-; V39 tmp29 [V39,T09] ( 3, 3 ) long -> rax "field V27.Item1 (fldOffset=0x0)" P-INDEP
-; V40 tmp30 [V40,T16] ( 2, 2 ) long -> rdx "field V27.Item2 (fldOffset=0x8)" P-INDEP
+; V39 tmp29 [V39,T09] ( 3, 3 ) long -> rdx "field V27.Item1 (fldOffset=0x0)" P-INDEP
+; V40 tmp30 [V40,T16] ( 2, 2 ) long -> rcx "field V27.Item2 (fldOffset=0x8)" P-INDEP
;
; Lcl frame size = 16
G_M25789_IG01:
push rbp
sub rsp, 16
lea rbp, [rsp+0x10]
;; size=10 bbWeight=1 PerfScore 1.75
G_M25789_IG02:
mov rax, rdx
neg rax
mov rcx, 0xD1FFAB1E
add rax, rcx
mov rcx, 0xD1FFAB1E
add rcx, rdx
mov rdx, qword ptr [rdi]
mov r8d, esi
mov rdi, qword ptr [rdi+r8-0x08]
xor rdx, rdi
- xor rax, rdx
- mov rdx, 0xD1FFAB1E
- mul rdx:rax, rdx
+ xor rdx, rax
+ mov rax, 0xD1FFAB1E
+ mulx rax, rdx, rax
dec esi
shl rsi, 54
- add rax, rsi
+ add rdx, rsi
xor rdi, rcx
- add rdx, rdi
+ add rax, rdi
mov ecx, edi
mov edi, 0xD1FFAB1E
imul rcx, rdi
- add rdx, rcx
- mov qword ptr [rbp-0x08], rdx
- mov rcx, rdx
+ add rax, rcx
+ mov rcx, rax
bswap rcx
- xor rax, rcx
+ xor rdx, rcx
mov rcx, 0xD1FFAB1E
- mul rdx:rax, rcx
- imul rcx, qword ptr [rbp-0x08]
- add rdx, rcx
- mov rcx, rax
- shr rcx, 37
- xor rcx, rax
- mov rax, 0xD1FFAB1E
- imul rax, rcx
- mov rcx, rax
- shr rcx, 32
- xor rax, rcx
+ mulx rcx, rdx, rcx
+ mov rdi, 0xD1FFAB1E
+ imul rax, rdi
+ add rax, rcx
mov rcx, rdx
shr rcx, 37
xor rcx, rdx
mov rdx, 0xD1FFAB1E
imul rdx, rcx
mov rcx, rdx
shr rcx, 32
- xor rdx, rcx
- ;; size=193 bbWeight=1 PerfScore 32.25
+ xor rcx, rdx
+ mov rdx, rax
+ shr rdx, 37
+ xor rdx, rax
+ mov rax, 0xD1FFAB1E
+ imul rax, rdx
+ mov rdx, rax
+ shr rdx, 32
+ xor rax, rdx
+ mov qword ptr [rbp-0x08], rax
+ mov rax, rcx
+ mov rdx, qword ptr [rbp-0x08]
+ ;; size=213 bbWeight=1 PerfScore 31.75
G_M25789_IG03:
add rsp, 16
pop rbp
ret
;; size=6 bbWeight=1 PerfScore 1.75
-; Total bytes of code 209, prolog size 10, PerfScore 35.75, instruction count 52, allocated bytes for code 209 (MethodHash=aca99b42) for method System.IO.Hashing.XxHash128:HashLength9To16(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
+; Total bytes of code 229, prolog size 10, PerfScore 35.25, instruction count 55, allocated bytes for code 229 (MethodHash=aca99b42) for method System.IO.Hashing.XxHash128:HashLength9To16(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
; ============================================================
```
18 (1.11 % of base) - HotChocolate.Types.Relay.DefaultNodeIdSerializer:ParseBase36(System.String,System.Func`2[System.String,System.Type]):HotChocolate.Types.Relay.NodeId:this
```diff
; Assembly listing for method HotChocolate.Types.Relay.DefaultNodeIdSerializer:ParseBase36(System.String,System.Func`2[System.String,System.Type]):HotChocolate.Types.Relay.NodeId:this (FullOpts)
; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
; FullOpts code
; optimized code
; rbp based frame
; fully interruptible
; No PGO data
; 0 inlinees with PGO data; 40 single block inlinees; 27 inlinees without PGO data
; Final local variable assignments
;
; V00 this [V00,T27] ( 3, 3 ) ref -> rbx this class-hnd single-def
; V01 arg1 [V01,T15] ( 9, 6.50) ref -> [rbp-0xA0] class-hnd EH-live single-def ptr
; V02 arg2 [V02,T28] ( 3, 3 ) ref -> r15 class-hnd single-def
; V03 loc0 [V03,T35] ( 6, 3 ) ref -> [rbp-0xA8] do-not-enreg[M] class-hnd EH-live ptr
;* V04 loc1 [V04 ] ( 0, 0 ) int -> zero-ref single-def
;* V05 loc2 [V05 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op
;* V06 loc3 [V06 ] ( 0, 0 ) struct (16) zero-ref multireg-arg
;* V07 loc4 [V07 ] ( 0, 0 ) int -> zero-ref single-def
;* V08 loc5 [V08 ] ( 0, 0 ) struct (16) zero-ref
;* V09 loc6 [V09 ] ( 0, 0 ) int -> zero-ref single-def
;* V10 loc7 [V10 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest single-def
;# V11 OutArgs [V11 ] ( 1, 1 ) struct ( 0) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V12 tmp1 [V12 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
; V13 tmp2 [V13,T26] ( 5, 5 ) ref -> rax class-hnd single-def "dup spill"
;* V14 tmp3 [V14 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V15 tmp4 [V15 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V16 tmp5 [V16 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V17 tmp6 [V17 ] ( 0, 0 ) ref -> zero-ref class-hnd "impSpillSpecialSideEff"
; V18 tmp7 [V18,T61] ( 3, 0 ) ref -> rbx class-hnd exact single-def "NewObj constructor temp"
;* V19 tmp8 [V19 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V20 tmp9 [V20 ] ( 0, 0 ) struct (16) zero-ref "Inline return value spill temp"
;* V21 tmp10 [V21 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V22 tmp11 [V22 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V23 tmp12 [V23 ] ( 0, 0 ) byref -> zero-ref single-def "Inlining Arg"
; V24 tmp13 [V24,T43] ( 2, 2 ) int -> rdi "Inlining Arg"
; V25 tmp14 [V25,T32] ( 7, 4 ) int -> r14 "Inline return value spill temp"
;* V26 tmp15 [V26 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V27 tmp16 [V27 ] ( 0, 0 ) double -> zero-ref "Inline stloc first use temp"
;* V28 tmp17 [V28 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
; V29 tmp18 [V29,T44] ( 2, 2 ) long -> r13 "Inlining Arg"
;* V30 tmp19 [V30 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V31 tmp20 [V31 ] ( 0, 0 ) struct (16) zero-ref multireg-arg "Inline return value spill temp"
;* V32 tmp21 [V32 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V33 tmp22 [V33 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inline ldloca(s) first use temp"
; V34 tmp23 [V34,T40] ( 2, 2 ) byref -> rdi single-def "Inlining Arg"
; V35 tmp24 [V35,T45] ( 2, 2 ) int -> rdx "Inlining Arg"
; V36 tmp25 [V36,T34] ( 5, 3.50) int -> rax "Inline return value spill temp"
;* V37 tmp26 [V37 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V38 tmp27 [V38 ] ( 0, 0 ) struct (16) zero-ref "Inlining Arg"
; V39 tmp28 [V39,T48] ( 3, 1.50) int -> rax "Inline return value spill temp"
;* V40 tmp29 [V40 ] ( 0, 0 ) struct (16) zero-ref "Inline stloc first use temp"
;* V41 tmp30 [V41,T53] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V42 tmp31 [V42 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V43 tmp32 [V43 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V44 tmp33 [V44 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V45 tmp34 [V45 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V46 tmp35 [V46 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V47 tmp36 [V47 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
; V48 tmp37 [V48,T14] ( 6, 9 ) int -> rdi "Inline stloc first use temp"
;* V49 tmp38 [V49 ] ( 0, 0 ) struct (16) zero-ref "Inline stloc first use temp"
; V50 tmp39 [V50,T13] ( 6, 9.50) int -> [rbp-0x34] ptr "Inline stloc first use temp"
;* V51 tmp40 [V51 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V52 tmp41 [V52 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
; V53 tmp42 [V53,T03] ( 12, 17.54) int -> rdx "Inline stloc first use temp"
-; V54 tmp43 [V54,T06] ( 4, 16 ) byref -> rax "impAppendStmt"
+; V54 tmp43 [V54,T06] ( 4, 16 ) byref -> r8 "impAppendStmt"
;* V55 tmp44 [V55 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V56 tmp45 [V56 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
; V57 tmp46 [V57 ] ( 18, 0 ) struct (40) [rbp-0x60] do-not-enreg[XSF] must-init addr-exposed ld-addr-op ptr "Inline ldloca(s) first use temp"
; V58 tmp47 [V58,T62] ( 3, 0 ) ref -> rbx class-hnd exact single-def "NewObj constructor temp"
; V59 tmp48 [V59,T63] ( 3, 0 ) ref -> r12 class-hnd exact single-def "NewObj constructor temp"
;* V60 tmp49 [V60 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
; V61 tmp50 [V61,T00] ( 10, 43.56) ushort -> [rbp-0x64] spill-single-def "Inlining Arg"
; V62 tmp51 [V62 ] ( 11, 3.96) struct (40) [rbp-0x90] do-not-enreg[XSF] must-init addr-exposed ld-addr-op ptr "Inline ldloca(s) first use temp"
; V63 tmp52 [V63,T64] ( 3, 0 ) ref -> r13 class-hnd exact "NewObj constructor temp"
-; V64 tmp53 [V64,T12] ( 4, 9.90) int -> r10 "Inline stloc first use temp"
+; V64 tmp53 [V64,T12] ( 4, 9.90) int -> r9 "Inline stloc first use temp"
;* V65 tmp54 [V65 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
; V66 tmp55 [V66,T58] ( 4, 0 ) int -> rdi "Inlining Arg"
;* V67 tmp56 [V67 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
; V68 tmp57 [V68,T57] ( 4, 0 ) byref -> r12 "Inlining Arg"
; V69 tmp58 [V69,T68] ( 2, 0 ) int -> rsi "Inlining Arg"
;* V70 tmp59 [V70,T69] ( 0, 0 ) ubyte -> zero-ref "Inline stloc first use temp"
;* V71 tmp60 [V71 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V72 tmp61 [V72 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V73 tmp62 [V73 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V74 tmp63 [V74 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V75 tmp64 [V75 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V76 tmp65 [V76 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V77 tmp66 [V77 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V78 tmp67 [V78 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V79 tmp68 [V79 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V80 tmp69 [V80 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V81 tmp70 [V81 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V82 tmp71 [V82 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
-; V83 tmp72 [V83,T07] ( 2, 15.84) long -> r8 "Inlining Arg"
-; V84 tmp73 [V84,T08] ( 3, 11.88) long -> rcx "Inline stloc first use temp"
+; V83 tmp72 [V83,T07] ( 2, 15.84) long -> rcx "Inlining Arg"
+; V84 tmp73 [V84,T08] ( 3, 11.88) long -> rax "Inline stloc first use temp"
;* V85 tmp74 [V85 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V86 tmp75 [V86 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
-; V87 tmp76 [V87,T09] ( 3, 11.88) long -> rcx "Inline stloc first use temp"
-; V88 tmp77 [V88,T21] ( 2, 7.92) long -> rax "Inline stloc first use temp"
+; V87 tmp76 [V87,T09] ( 3, 11.88) long -> rax "Inline stloc first use temp"
+; V88 tmp77 [V88,T21] ( 2, 7.92) long -> rdx "Inline stloc first use temp"
;* V89 tmp78 [V89 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V90 tmp79 [V90 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V91 tmp80 [V91 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V92 tmp81 [V92,T54] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
;* V93 tmp82 [V93 ] ( 0, 0 ) struct (16) zero-ref "Inline return value spill temp"
;* V94 tmp83 [V94 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V95 tmp84 [V95 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V96 tmp85 [V96 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V97 tmp86 [V97 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V98 tmp87 [V98 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V99 tmp88 [V99 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V100 tmp89 [V100 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V101 tmp90 [V101,T46] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
;* V102 tmp91 [V102 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
; V103 tmp92 [V103,T59] ( 4, 0 ) int -> rdi "Inlining Arg"
;* V104 tmp93 [V104 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
; V105 tmp94 [V105,T56] ( 5, 0 ) byref -> r12 single-def "Inlining Arg"
; V106 tmp95 [V106,T70] ( 2, 0 ) int -> rsi "Inlining Arg"
;* V107 tmp96 [V107,T71] ( 0, 0 ) ubyte -> zero-ref "Inline stloc first use temp"
;* V108 tmp97 [V108 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V109 tmp98 [V109 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V110 tmp99 [V110 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V111 tmp100 [V111 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
; V112 tmp101 [V112,T60] ( 4, 0 ) int -> rdi "Inlining Arg"
;* V113 tmp102 [V113 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
; V114 tmp103 [V114,T65] ( 3, 0 ) byref -> r13 single-def "Inlining Arg"
; V115 tmp104 [V115,T72] ( 2, 0 ) int -> rsi "Inlining Arg"
;* V116 tmp105 [V116,T73] ( 0, 0 ) ubyte -> zero-ref "Inline stloc first use temp"
;* V117 tmp106 [V117 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V118 tmp107 [V118 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V119 tmp108 [V119 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V120 tmp109 [V120 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V121 tmp110 [V121 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V122 tmp111 [V122 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V123 tmp112 [V123 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V124 tmp113 [V124 ] ( 0, 0 ) struct (16) zero-ref "Inline return value spill temp"
;* V125 tmp114 [V125 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V126 tmp115 [V126 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V127 tmp116 [V127 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V128 tmp117 [V128 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V129 tmp118 [V129 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V130 tmp119 [V130 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V131 tmp120 [V131 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V132 tmp121 [V132 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V133 tmp122 [V133 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V134 tmp123 [V134 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op "NewObj constructor temp"
;* V135 tmp124 [V135 ] ( 0, 0 ) byref -> zero-ref single-def "Inlining Arg"
;* V136 tmp125 [V136 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
; V137 tmp126 [V137,T25] ( 6, 7 ) byref -> r13 single-def "field V05._reference (fldOffset=0x0)" P-INDEP
; V138 tmp127 [V138,T29] ( 8, 4.54) int -> r12 single-def "field V05._length (fldOffset=0x8)" P-INDEP
; V139 tmp128 [V139,T38] ( 3, 2 ) byref -> r13 "field V06._reference (fldOffset=0x0)" P-INDEP
; V140 tmp129 [V140,T39] ( 3, 2 ) int -> r12 "field V06._length (fldOffset=0x8)" P-INDEP
;* V141 tmp130 [V141 ] ( 0, 0 ) byref -> zero-ref "field V08._reference (fldOffset=0x0)" P-INDEP
;* V142 tmp131 [V142 ] ( 0, 0 ) int -> zero-ref "field V08._length (fldOffset=0x8)" P-INDEP
; V143 tmp132 [V143,T41] ( 2, 2 ) ref -> rbx "field V10.k__BackingField (fldOffset=0x0)" P-INDEP
; V144 tmp133 [V144,T42] ( 2, 2 ) ref -> r15 "field V10.k__BackingField (fldOffset=0x8)" P-INDEP
;* V145 tmp134 [V145 ] ( 0, 0 ) byref -> zero-ref "field V12._reference (fldOffset=0x0)" P-INDEP
;* V146 tmp135 [V146 ] ( 0, 0 ) int -> zero-ref "field V12._length (fldOffset=0x8)" P-INDEP
;* V147 tmp136 [V147 ] ( 0, 0 ) byref -> zero-ref "field V14._reference (fldOffset=0x0)" P-INDEP
;* V148 tmp137 [V148 ] ( 0, 0 ) int -> zero-ref "field V14._length (fldOffset=0x8)" P-INDEP
;* V149 tmp138 [V149 ] ( 0, 0 ) byref -> zero-ref "field V15._reference (fldOffset=0x0)" P-INDEP
;* V150 tmp139 [V150 ] ( 0, 0 ) int -> zero-ref "field V15._length (fldOffset=0x8)" P-INDEP
;* V151 tmp140 [V151 ] ( 0, 0 ) ref -> zero-ref do-not-enreg[] "field V16.k__BackingField (fldOffset=0x0)" P-DEP
;* V152 tmp141 [V152 ] ( 0, 0 ) ref -> zero-ref do-not-enreg[] "field V16.k__BackingField (fldOffset=0x8)" P-DEP
; V153 tmp142 [V153,T50] ( 2, 1 ) byref -> r13 single-def "field V19._reference (fldOffset=0x0)" P-INDEP
;* V154 tmp143 [V154 ] ( 0, 0 ) int -> zero-ref single-def "field V19._length (fldOffset=0x8)" P-INDEP
;* V155 tmp144 [V155 ] ( 0, 0 ) byref -> zero-ref "field V20._reference (fldOffset=0x0)" P-INDEP
; V156 tmp145 [V156,T36] ( 4, 2.50) int -> rdi "field V20._length (fldOffset=0x8)" P-INDEP
;* V157 tmp146 [V157 ] ( 0, 0 ) byref -> zero-ref single-def "field V21._reference (fldOffset=0x0)" P-INDEP
;* V158 tmp147 [V158 ] ( 0, 0 ) int -> zero-ref single-def "field V21._length (fldOffset=0x8)" P-INDEP
;* V159 tmp148 [V159 ] ( 0, 0 ) byref -> zero-ref single-def "field V22._reference (fldOffset=0x0)" P-INDEP
;* V160 tmp149 [V160 ] ( 0, 0 ) int -> zero-ref single-def "field V22._length (fldOffset=0x8)" P-INDEP
;* V161 tmp150 [V161 ] ( 0, 0 ) byref -> zero-ref "field V26._reference (fldOffset=0x0)" P-INDEP
;* V162 tmp151 [V162 ] ( 0, 0 ) int -> zero-ref single-def "field V26._length (fldOffset=0x8)" P-INDEP
; V163 tmp152 [V163,T47] ( 3, 1.50) byref -> r13 "field V30._reference (fldOffset=0x0)" P-INDEP
; V164 tmp153 [V164,T49] ( 3, 1.50) int -> r12 "field V30._length (fldOffset=0x8)" P-INDEP
; V165 tmp154 [V165,T37] ( 4, 2 ) byref -> rdi "field V31._reference (fldOffset=0x0)" P-INDEP
; V166 tmp155 [V166,T33] ( 6, 3.50) int -> rdx "field V31._length (fldOffset=0x8)" P-INDEP
;* V167 tmp156 [V167 ] ( 0, 0 ) byref -> zero-ref single-def "field V32._reference (fldOffset=0x0)" P-INDEP
;* V168 tmp157 [V168 ] ( 0, 0 ) int -> zero-ref single-def "field V32._length (fldOffset=0x8)" P-INDEP
;* V169 tmp158 [V169 ] ( 0, 0 ) byref -> zero-ref single-def "field V33._reference (fldOffset=0x0)" P-INDEP
;* V170 tmp159 [V170 ] ( 0, 0 ) int -> zero-ref single-def "field V33._length (fldOffset=0x8)" P-INDEP
;* V171 tmp160 [V171 ] ( 0, 0 ) byref -> zero-ref single-def "field V37._reference (fldOffset=0x0)" P-INDEP
;* V172 tmp161 [V172 ] ( 0, 0 ) int -> zero-ref single-def "field V37._length (fldOffset=0x8)" P-INDEP
;* V173 tmp162 [V173 ] ( 0, 0 ) byref -> zero-ref single-def "field V38._reference (fldOffset=0x0)" P-INDEP
;* V174 tmp163 [V174 ] ( 0, 0 ) int -> zero-ref single-def "field V38._length (fldOffset=0x8)" P-INDEP
-; V175 tmp164 [V175,T01] ( 11, 21.42) long -> rcx "field V40._lower (fldOffset=0x0)" P-INDEP
-; V176 tmp165 [V176,T02] ( 11, 21.42) long -> r8 "field V40._upper (fldOffset=0x8)" P-INDEP
+; V175 tmp164 [V175,T01] ( 11, 21.42) long -> rax "field V40._lower (fldOffset=0x0)" P-INDEP
+; V176 tmp165 [V176,T02] ( 11, 21.42) long -> rcx "field V40._upper (fldOffset=0x8)" P-INDEP
; V177 tmp166 [V177,T30] ( 2, 4.46) byref -> rdi single-def "field V42._reference (fldOffset=0x0)" P-INDEP
; V178 tmp167 [V178,T31] ( 2, 4.46) int -> [rbp-0x94] spill-single-def ptr "field V42._length (fldOffset=0x8)" P-INDEP
;* V179 tmp168 [V179 ] ( 0, 0 ) long -> zero-ref "field V44._lower (fldOffset=0x0)" P-INDEP
;* V180 tmp169 [V180 ] ( 0, 0 ) long -> zero-ref "field V44._upper (fldOffset=0x8)" P-INDEP
;* V181 tmp170 [V181 ] ( 0, 0 ) long -> zero-ref "field V45._lower (fldOffset=0x0)" P-INDEP
;* V182 tmp171 [V182 ] ( 0, 0 ) long -> zero-ref "field V45._upper (fldOffset=0x8)" P-INDEP
;* V183 tmp172 [V183 ] ( 0, 0 ) long -> zero-ref "field V46._lower (fldOffset=0x0)" P-INDEP
;* V184 tmp173 [V184 ] ( 0, 0 ) long -> zero-ref "field V46._upper (fldOffset=0x8)" P-INDEP
;* V185 tmp174 [V185 ] ( 0, 0 ) long -> zero-ref single-def "field V47._lower (fldOffset=0x0)" P-INDEP
;* V186 tmp175 [V186 ] ( 0, 0 ) long -> zero-ref single-def "field V47._upper (fldOffset=0x8)" P-INDEP
; V187 tmp176 [V187,T11] ( 4, 10.50) long -> rdx "field V49._lower (fldOffset=0x0)" P-INDEP
-; V188 tmp177 [V188,T04] ( 5, 16.50) long -> rax "field V49._upper (fldOffset=0x8)" P-INDEP
+; V188 tmp177 [V188,T04] ( 5, 16.50) long -> r8 "field V49._upper (fldOffset=0x8)" P-INDEP
;* V189 tmp178 [V189 ] ( 0, 0 ) long -> zero-ref "field V51._lower (fldOffset=0x0)" P-INDEP
;* V190 tmp179 [V190 ] ( 0, 0 ) long -> zero-ref "field V51._upper (fldOffset=0x8)" P-INDEP
;* V191 tmp180 [V191,T52] ( 0, 0 ) byref -> zero-ref single-def ptr "field V52._reference (fldOffset=0x0)" P-INDEP
; V192 tmp181 [V192,T51] ( 2, 0.50) int -> r14 single-def "field V52._length (fldOffset=0x8)" P-INDEP
;* V193 tmp182 [V193 ] ( 0, 0 ) long -> zero-ref "field V55._lower (fldOffset=0x0)" P-INDEP
;* V194 tmp183 [V194 ] ( 0, 0 ) long -> zero-ref "field V55._upper (fldOffset=0x8)" P-INDEP
;* V195 tmp184 [V195 ] ( 0, 0 ) long -> zero-ref "field V56._lower (fldOffset=0x0)" P-INDEP
;* V196 tmp185 [V196 ] ( 0, 0 ) long -> zero-ref "field V56._upper (fldOffset=0x8)" P-INDEP
;* V197 tmp186 [V197 ] ( 0, 0 ) long -> zero-ref single-def "field V60._lower (fldOffset=0x0)" P-INDEP
;* V198 tmp187 [V198 ] ( 0, 0 ) long -> zero-ref single-def "field V60._upper (fldOffset=0x8)" P-INDEP
;* V199 tmp188 [V199 ] ( 0, 0 ) byref -> zero-ref "field V65._reference (fldOffset=0x0)" P-INDEP
;* V200 tmp189 [V200 ] ( 0, 0 ) int -> zero-ref "field V65._length (fldOffset=0x8)" P-INDEP
;* V201 tmp190 [V201 ] ( 0, 0 ) byref -> zero-ref "field V67._reference (fldOffset=0x0)" P-INDEP
;* V202 tmp191 [V202 ] ( 0, 0 ) int -> zero-ref "field V67._length (fldOffset=0x8)" P-INDEP
;* V203 tmp192 [V203 ] ( 0, 0 ) byref -> zero-ref "field V71._reference (fldOffset=0x0)" P-INDEP
;* V204 tmp193 [V204 ] ( 0, 0 ) int -> zero-ref "field V71._length (fldOffset=0x8)" P-INDEP
;* V205 tmp194 [V205 ] ( 0, 0 ) long -> zero-ref "field V74._lower (fldOffset=0x0)" P-INDEP
;* V206 tmp195 [V206 ] ( 0, 0 ) long -> zero-ref "field V74._upper (fldOffset=0x8)" P-INDEP
;* V207 tmp196 [V207 ] ( 0, 0 ) long -> zero-ref "field V76._lower (fldOffset=0x0)" P-INDEP
;* V208 tmp197 [V208 ] ( 0, 0 ) long -> zero-ref "field V76._upper (fldOffset=0x8)" P-INDEP
;* V209 tmp198 [V209 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V80.Item1 (fldOffset=0x0)" P-DEP
;* V210 tmp199 [V210 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V80.Item2 (fldOffset=0x8)" P-DEP
-; V211 tmp200 [V211,T10] ( 3, 11.88) long -> rax "field V81.Item1 (fldOffset=0x0)" P-INDEP
-; V212 tmp201 [V212,T22] ( 2, 7.92) long -> rdx "field V81.Item2 (fldOffset=0x8)" P-INDEP
+; V211 tmp200 [V211,T10] ( 3, 11.88) long -> rdx "field V81.Item1 (fldOffset=0x0)" P-INDEP
+; V212 tmp201 [V212,T22] ( 2, 7.92) long -> rax "field V81.Item2 (fldOffset=0x8)" P-INDEP
;* V213 tmp202 [V213 ] ( 0, 0 ) long -> zero-ref "field V85._lower (fldOffset=0x0)" P-INDEP
-; V214 tmp203 [V214,T23] ( 2, 7.92) long -> rdx "field V85._upper (fldOffset=0x8)" P-INDEP
+; V214 tmp203 [V214,T23] ( 2, 7.92) long -> r9 "field V85._upper (fldOffset=0x8)" P-INDEP
;* V215 tmp204 [V215 ] ( 0, 0 ) long -> zero-ref "field V89._lower (fldOffset=0x0)" P-INDEP
-; V216 tmp205 [V216,T24] ( 2, 7.92) long -> r8 "field V89._upper (fldOffset=0x8)" P-INDEP
+; V216 tmp205 [V216,T24] ( 2, 7.92) long -> rcx "field V89._upper (fldOffset=0x8)" P-INDEP
;* V217 tmp206 [V217 ] ( 0, 0 ) long -> zero-ref single-def "field V91._lower (fldOffset=0x0)" P-INDEP
;* V218 tmp207 [V218 ] ( 0, 0 ) long -> zero-ref single-def "field V91._upper (fldOffset=0x8)" P-INDEP
;* V219 tmp208 [V219 ] ( 0, 0 ) long -> zero-ref "field V93._lower (fldOffset=0x0)" P-INDEP
;* V220 tmp209 [V220 ] ( 0, 0 ) long -> zero-ref "field V93._upper (fldOffset=0x8)" P-INDEP
; V221 tmp210 [V221,T19] ( 2, 8 ) long -> rdx "field V96._lower (fldOffset=0x0)" P-INDEP
-; V222 tmp211 [V222,T20] ( 2, 8 ) long -> rax "field V96._upper (fldOffset=0x8)" P-INDEP
+; V222 tmp211 [V222,T20] ( 2, 8 ) long -> r8 "field V96._upper (fldOffset=0x8)" P-INDEP
;* V223 tmp212 [V223 ] ( 0, 0 ) long -> zero-ref "field V98._lower (fldOffset=0x0)" P-INDEP
;* V224 tmp213 [V224 ] ( 0, 0 ) long -> zero-ref "field V98._upper (fldOffset=0x8)" P-INDEP
;* V225 tmp214 [V225 ] ( 0, 0 ) long -> zero-ref "field V100._lower (fldOffset=0x0)" P-INDEP
;* V226 tmp215 [V226 ] ( 0, 0 ) long -> zero-ref "field V100._upper (fldOffset=0x8)" P-INDEP
;* V227 tmp216 [V227 ] ( 0, 0 ) byref -> zero-ref "field V102._reference (fldOffset=0x0)" P-INDEP
;* V228 tmp217 [V228 ] ( 0, 0 ) int -> zero-ref "field V102._length (fldOffset=0x8)" P-INDEP
;* V229 tmp218 [V229 ] ( 0, 0 ) byref -> zero-ref single-def "field V104._reference (fldOffset=0x0)" P-INDEP
;* V230 tmp219 [V230 ] ( 0, 0 ) int -> zero-ref single-def "field V104._length (fldOffset=0x8)" P-INDEP
;* V231 tmp220 [V231 ] ( 0, 0 ) byref -> zero-ref single-def "field V108._reference (fldOffset=0x0)" P-INDEP
;* V232 tmp221 [V232 ] ( 0, 0 ) int -> zero-ref single-def "field V108._length (fldOffset=0x8)" P-INDEP
;* V233 tmp222 [V233 ] ( 0, 0 ) byref -> zero-ref "field V111._reference (fldOffset=0x0)" P-INDEP
;* V234 tmp223 [V234 ] ( 0, 0 ) int -> zero-ref "field V111._length (fldOffset=0x8)" P-INDEP
;* V235 tmp224 [V235 ] ( 0, 0 ) byref -> zero-ref single-def "field V113._reference (fldOffset=0x0)" P-INDEP
;* V236 tmp225 [V236 ] ( 0, 0 ) int -> zero-ref single-def "field V113._length (fldOffset=0x8)" P-INDEP
;* V237 tmp226 [V237 ] ( 0, 0 ) byref -> zero-ref single-def "field V117._reference (fldOffset=0x0)" P-INDEP
;* V238 tmp227 [V238 ] ( 0, 0 ) int -> zero-ref single-def "field V117._length (fldOffset=0x8)" P-INDEP
;* V239 tmp228 [V239 ] ( 0, 0 ) long -> zero-ref "field V120._lower (fldOffset=0x0)" P-INDEP
;* V240 tmp229 [V240 ] ( 0, 0 ) long -> zero-ref "field V120._upper (fldOffset=0x8)" P-INDEP
; V241 tmp230 [V241,T16] ( 4, 8 ) long -> r9 "field V121._lower (fldOffset=0x0)" P-INDEP
;* V242 tmp231 [V242 ] ( 0, 0 ) long -> zero-ref "field V121._upper (fldOffset=0x8)" P-INDEP
;* V243 tmp232 [V243 ] ( 0, 0 ) long -> zero-ref "field V124._lower (fldOffset=0x0)" P-INDEP
;* V244 tmp233 [V244 ] ( 0, 0 ) long -> zero-ref "field V124._upper (fldOffset=0x8)" P-INDEP
-; V245 tmp234 [V245,T17] ( 4, 8 ) long -> rcx "field V127._lower (fldOffset=0x0)" P-INDEP
-; V246 tmp235 [V246,T18] ( 4, 8 ) long -> r8 "field V127._upper (fldOffset=0x8)" P-INDEP
+; V245 tmp234 [V245,T17] ( 4, 8 ) long -> rax "field V127._lower (fldOffset=0x0)" P-INDEP
+; V246 tmp235 [V246,T18] ( 4, 8 ) long -> rcx "field V127._upper (fldOffset=0x8)" P-INDEP
;* V247 tmp236 [V247 ] ( 0, 0 ) long -> zero-ref "field V129._lower (fldOffset=0x0)" P-INDEP
;* V248 tmp237 [V248 ] ( 0, 0 ) long -> zero-ref "field V129._upper (fldOffset=0x8)" P-INDEP
;* V249 tmp238 [V249 ] ( 0, 0 ) byref -> zero-ref single-def "field V131._reference (fldOffset=0x0)" P-INDEP
;* V250 tmp239 [V250 ] ( 0, 0 ) int -> zero-ref single-def "field V131._length (fldOffset=0x8)" P-INDEP
;* V251 tmp240 [V251 ] ( 0, 0 ) byref -> zero-ref single-def "field V133._reference (fldOffset=0x0)" P-INDEP
;* V252 tmp241 [V252 ] ( 0, 0 ) int -> zero-ref single-def "field V133._length (fldOffset=0x8)" P-INDEP
;* V253 tmp242 [V253 ] ( 0, 0 ) byref -> zero-ref single-def "field V134._reference (fldOffset=0x0)" P-INDEP
;* V254 tmp243 [V254 ] ( 0, 0 ) int -> zero-ref single-def "field V134._length (fldOffset=0x8)" P-INDEP
; V255 tmp244 [V255,T66] ( 2, 0 ) ref -> rsi "argument with side effect"
; V256 tmp245 [V256,T67] ( 2, 0 ) ref -> rsi single-def "argument with side effect"
-; V257 rat0 [V257,T05] ( 5, 16.34) long -> r9 "Widened IV V41"
+; V257 rat0 [V257,T05] ( 5, 16.34) long -> r8 "Widened IV V41"
; V258 rat1 [V258 ] ( 1, 1 ) long -> [rbp-0x30] do-not-enreg[X] addr-exposed "GSSecurityCookie"
; V259 rat2 [V259,T55] ( 5, 5 ) simd16 -> mm0 "ReplaceWithLclVar is creating a new local variable"
;
; Lcl frame size = 136
G_M9951_IG01:
push rbp
push r15
push r14
push r13
push r12
push rbx
sub rsp, 136
lea rbp, [rsp+0xB0]
vxorps xmm8, xmm8, xmm8
vmovdqu32 zmmword ptr [rbp-0x90], zmm8
vmovdqa xmmword ptr [rbp-0x50], xmm8
xor eax, eax
mov qword ptr [rbp-0x40], rax
mov rax, 0xD1FFAB1E
mov qword ptr [rbp-0x30], rax
mov gword ptr [rbp-0xA0], rsi
mov rbx, rdi
mov r15, rdx
;; size=78 bbWeight=1 PerfScore 14.08
G_M9951_IG02:
xor rdi, rdi
mov gword ptr [rbp-0xA8], rdi
test rsi, rsi
je SHORT G_M9951_IG04
;; size=14 bbWeight=1 PerfScore 2.50
G_M9951_IG03:
mov edi, dword ptr [rsi+0x08]
mov rsi, gword ptr [rbp-0xA0]
jmp SHORT G_M9951_IG05
align [0 bytes for IG21]
;; size=12 bbWeight=0.50 PerfScore 2.50
G_M9951_IG04:
xor edi, edi
;; size=2 bbWeight=0.50 PerfScore 0.12
G_M9951_IG05:
test edi, edi
je SHORT G_M9951_IG07
;; size=4 bbWeight=1 PerfScore 1.25
G_M9951_IG06:
vxorps xmm0, xmm0, xmm0
vcvtsi2sd xmm0, xmm0, edi
vmulsd xmm0, xmm0, qword ptr [reloc @RWD00]
vmulsd xmm0, xmm0, qword ptr [reloc @RWD08]
vroundsd xmm0, xmm0, xmm0, 10
vcmpordsd xmm1, xmm0, xmm0
vandpd xmm1, xmm1, xmm0
mov edi, 0xD1FFAB1E
vcvttsd2si eax, xmm1
vucomisd xmm0, qword ptr [reloc @RWD16]
cmovb edi, eax
inc edi
mov r14d, edi
jmp SHORT G_M9951_IG08
;; size=66 bbWeight=0.50 PerfScore 19.96
G_M9951_IG07:
xor r14d, r14d
;; size=3 bbWeight=0.50 PerfScore 0.12
G_M9951_IG08:
cmp r14d, 256
jle SHORT G_M9951_IG12
;; size=9 bbWeight=1 PerfScore 1.25
G_M9951_IG09:
mov rdi, 0xD1FFAB1E ; const ptr
mov rdi, gword ptr [rdi]
mov esi, r14d
mov rax, 0xD1FFAB1E ; code for System.Buffers.SharedArrayPool`1[byte]:Rent(int):byte[]:this
call [rax]System.Buffers.SharedArrayPool`1[byte]:Rent(int):byte[]:this
mov gword ptr [rbp-0xA8], rax
test rax, rax
je SHORT G_M9951_IG10
lea r13, bword ptr [rax+0x10]
mov r12d, dword ptr [rax+0x08]
jmp SHORT G_M9951_IG11
;; size=50 bbWeight=0.50 PerfScore 6.25
G_M9951_IG10:
xor r13, r13
xor r12d, r12d
;; size=6 bbWeight=0.50 PerfScore 0.25
G_M9951_IG11:
mov rsi, gword ptr [rbp-0xA0]
jmp SHORT G_M9951_IG15
;; size=9 bbWeight=0.50 PerfScore 1.50
G_M9951_IG12:
mov edi, r14d
mov r13, rdi
test r13, r13
je SHORT G_M9951_IG14
add r13, 15
shr r13, 4
;; size=19 bbWeight=0.50 PerfScore 1.25
G_M9951_IG13:
push 0
push 0
dec r13
jne SHORT G_M9951_IG13
lea r13, [rsp]
;; size=13 bbWeight=0.50 PerfScore 1.88
G_M9951_IG14:
test r14d, r14d
jl G_M9951_IG57
mov r12d, r14d
;; size=12 bbWeight=0.50 PerfScore 0.75
G_M9951_IG15:
test rsi, rsi
je SHORT G_M9951_IG17
;; size=5 bbWeight=1 PerfScore 1.25
G_M9951_IG16:
lea rdi, bword ptr [rsi+0x0C]
mov edx, dword ptr [rsi+0x08]
mov rsi, gword ptr [rbp-0xA0]
jmp SHORT G_M9951_IG18
;; size=16 bbWeight=0.50 PerfScore 2.75
G_M9951_IG17:
xor rdi, rdi
xor edx, edx
;; size=4 bbWeight=0.50 PerfScore 0.25
G_M9951_IG18:
test edx, edx
je G_M9951_IG38
;; size=8 bbWeight=1 PerfScore 1.25
G_M9951_IG19:
cmp edx, 25
jle SHORT G_M9951_IG20
mov esi, edx
mov rdx, r13
mov ecx, r12d
mov rax, 0xD1FFAB1E ; code for HotChocolate.Buffers.Text.Base36:DecodeBigInteger(System.ReadOnlySpan`1[char],System.Span`1[byte]):int
call [rax]HotChocolate.Buffers.Text.Base36:DecodeBigInteger(System.ReadOnlySpan`1[char],System.Span`1[byte]):int
mov rsi, gword ptr [rbp-0xA0]
jmp G_M9951_IG39
;; size=37 bbWeight=0.50 PerfScore 4.12
G_M9951_IG20:
mov dword ptr [rbp-0x94], edx
mov r14d, r12d
+ xor eax, eax
xor ecx, ecx
xor r8d, r8d
- xor r9d, r9d
- ;; size=17 bbWeight=0.50 PerfScore 1.00
+ ;; size=16 bbWeight=0.50 PerfScore 1.00
G_M9951_IG21:
- movzx r10, word ptr [rdi+2*r9]
- mov dword ptr [rbp-0x64], r10d
+ movzx r9, word ptr [rdi+2*r8]
+ mov dword ptr [rbp-0x64], r9d
vxorps ymm0, ymm0, ymm0
vmovdqu ymmword ptr [rbp-0x90], ymm0
vmovdqu xmmword ptr [rbp-0x78], xmm0
- cmp r10d, 65
+ cmp r9d, 65
jge SHORT G_M9951_IG23
;; size=32 bbWeight=3.96 PerfScore 26.07
G_M9951_IG22:
- mov eax, r10d
- sub eax, 48
- cmp eax, 9
+ mov r10d, r9d
+ sub r10d, 48
+ cmp r10d, 9
ja G_M9951_IG40
- add r10d, -48
+ add r9d, -48
jmp SHORT G_M9951_IG25
- ;; size=21 bbWeight=1.98 PerfScore 7.92
+ ;; size=23 bbWeight=1.98 PerfScore 7.92
G_M9951_IG23:
- cmp r10d, 97
+ cmp r9d, 97
jge SHORT G_M9951_IG24
- cmp r10d, 90
- jg SHORT G_M9951_IG27
- ;; NOP compensation instructions of 4 bytes.
- add r10d, -55
+ cmp r9d, 90
+ jg G_M9951_IG27
+ add r9d, -55
jmp SHORT G_M9951_IG25
;; size=22 bbWeight=1.98 PerfScore 9.41
G_M9951_IG24:
- cmp r10d, 122
+ cmp r9d, 122
jg SHORT G_M9951_IG28
- add r10d, -87
- ;; size=10 bbWeight=1.98 PerfScore 2.97
+ ;; NOP compensation instructions of 4 bytes.
+ add r9d, -87
+ ;; size=14 bbWeight=1.98 PerfScore 2.97
G_M9951_IG25:
- mov eax, 36
- mul rdx:rax, rcx
- lea rcx, [r8+8*r8]
- lea r8, [rdx+4*rcx]
- mov ecx, r10d
- mov rdx, rcx
- sar rdx, 63
- add rcx, rax
- cmp rcx, rax
- setb al
- movzx rax, al
- add r8, rdx
- add r8, rax
- inc r9d
+ mov r10d, 36
+ mov rdx, r10
+ mulx rax, rdx, rax
+ lea rcx, [rcx+8*rcx]
+ lea rcx, [rax+4*rcx]
+ mov eax, r9d
+ mov r9, rax
+ sar r9, 63
+ add rax, rdx
+ cmp rax, rdx
+ setb dl
+ movzx rdx, dl
+ add rcx, r9
+ add rcx, rdx
+ inc r8d
mov edx, dword ptr [rbp-0x94]
- cmp r9d, edx
+ cmp r8d, edx
jl G_M9951_IG21
- ;; size=62 bbWeight=3.96 PerfScore 37.62
+ ;; size=68 bbWeight=3.96 PerfScore 38.61
G_M9951_IG26:
- test rcx, rcx
+ test rax, rax
jne SHORT G_M9951_IG29
- test r8, r8
+ test rcx, rcx
jne SHORT G_M9951_IG29
test r12d, r12d
jle G_M9951_IG45
mov byte ptr [r13], 0
mov eax, 1
jmp SHORT G_M9951_IG36
;; NOP compensation instructions of 3 bytes.
- align [4 bytes for IG30]
- ;; size=38 bbWeight=0.50 PerfScore 3.50
+ align [9 bytes for IG30]
+ ;; size=43 bbWeight=0.50 PerfScore 3.50
G_M9951_IG27:
jmp G_M9951_IG40
;; size=5 bbWeight=0.99 PerfScore 1.98
G_M9951_IG28:
jmp G_M9951_IG40
;; size=5 bbWeight=0.99 PerfScore 1.98
G_M9951_IG29:
xor edi, edi
- mov rdx, rcx
- mov rax, r8
+ mov rdx, rax
+ mov r8, rcx
xor r9d, r9d
jmp SHORT G_M9951_IG31
;; size=13 bbWeight=0.50 PerfScore 1.50
G_M9951_IG30:
inc r9d
shr rdx, 8
- mov r10, rax
+ mov r10, r8
shl r10, 56
or rdx, r10
- shr rax, 8
+ shr r8, 8
;; size=21 bbWeight=4 PerfScore 9.00
G_M9951_IG31:
- test rax, rax
+ test r8, r8
jne SHORT G_M9951_IG30
;; size=5 bbWeight=4 PerfScore 5.00
G_M9951_IG32:
test rdx, rdx
jne SHORT G_M9951_IG30
;; size=5 bbWeight=2 PerfScore 2.50
G_M9951_IG33:
cmp r9d, r12d
jg G_M9951_IG46
lea edx, [r9-0x01]
test edx, edx
jl SHORT G_M9951_IG35
cmp edx, r12d
jge SHORT G_M9951_IG37
align [0 bytes for IG34]
;; size=22 bbWeight=0.50 PerfScore 2.12
G_M9951_IG34:
- mov eax, edx
- add rax, r13
- movzx r9, cl
- mov byte ptr [rax], r9b
- shr rcx, 8
- mov r10, r8
+ mov r8d, edx
+ add r8, r13
+ movzx r9, al
+ mov byte ptr [r8], r9b
+ shr rax, 8
+ mov r10, rcx
shl r10, 56
- or rcx, r10
- shr r8, 8
+ or rax, r10
+ shr rcx, 8
inc edi
dec edx
jns SHORT G_M9951_IG34
- ;; size=36 bbWeight=3.96 PerfScore 20.79
+ ;; size=37 bbWeight=3.96 PerfScore 20.79
G_M9951_IG35:
mov eax, edi
;; size=2 bbWeight=0.50 PerfScore 0.12
G_M9951_IG36:
jmp SHORT G_M9951_IG39
;; size=2 bbWeight=0.50 PerfScore 1.00
G_M9951_IG37:
cmp edx, r12d
jae G_M9951_IG51
- mov eax, edx
- add rax, r13
- movzx r9, cl
- mov byte ptr [rax], r9b
+ mov r8d, edx
+ add r8, r13
+ movzx r9, al
+ mov byte ptr [r8], r9b
+ shr rax, 8
+ mov r8, rcx
+ shl r8, 56
+ or rax, r8
shr rcx, 8
- mov rax, r8
- shl rax, 56
- or rcx, rax
- shr r8, 8
inc edi
dec edx
jns SHORT G_M9951_IG37
jmp SHORT G_M9951_IG35
- ;; size=47 bbWeight=0.04 PerfScore 0.34
+ ;; size=48 bbWeight=0.04 PerfScore 0.34
G_M9951_IG38:
xor eax, eax
;; size=2 bbWeight=0.50 PerfScore 0.12
G_M9951_IG39:
cmp eax, r12d
ja SHORT G_M9951_IG41
mov rsi, r13
mov edx, eax
mov rdi, rbx
mov rcx, gword ptr [rbp-0xA0]
mov r8, r15
mov rax, 0xD1FFAB1E ; code for HotChocolate.Types.Relay.DefaultNodeIdSerializer:ParseDecodedData(System.ReadOnlySpan`1[byte],System.String,System.Func`2[System.String,System.Type]):HotChocolate.Types.Relay.NodeId:this
call [rax]HotChocolate.Types.Relay.DefaultNodeIdSerializer:ParseDecodedData(System.ReadOnlySpan`1[byte],System.String,System.Func`2[System.String,System.Type]):HotChocolate.Types.Relay.NodeId:this
mov rbx, rax
mov r15, rdx
jmp G_M9951_IG52
;; size=46 bbWeight=1 PerfScore 9.00
G_M9951_IG40:
lea rdi, [rbp-0x90]
mov esi, 26
mov edx, 1
mov rax, 0xD1FFAB1E ; code for System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:.ctor(int,int):this
call [rax]System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:.ctor(int,int):this
mov edi, dword ptr [rbp-0x80]
cmp edi, dword ptr [rbp-0x70]
jbe SHORT G_M9951_IG42
;; size=37 bbWeight=0 PerfScore 0.00
G_M9951_IG41:
mov rax, 0xD1FFAB1E ; code for System.ThrowHelper:ThrowArgumentOutOfRangeException()
call [rax]System.ThrowHelper:ThrowArgumentOutOfRangeException()
int3
;; size=13 bbWeight=0 PerfScore 0.00
G_M9951_IG42:
mov rsi, bword ptr [rbp-0x78]
mov eax, edi
lea r12, bword ptr [rsi+2*rax]
mov esi, dword ptr [rbp-0x70]
sub esi, edi
cmp esi, 26
jb SHORT G_M9951_IG43
vmovups ymm0, ymmword ptr [reloc @RWD32]
vmovups ymmword ptr [r12], ymm0
vmovups xmm0, xmmword ptr [reloc @RWD64]
vmovups xmmword ptr [r12+0x20], xmm0
mov dword ptr [r12+0x30], 0xD1FFAB1E
mov edi, dword ptr [rbp-0x80]
add edi, 26
mov dword ptr [rbp-0x80], edi
jmp SHORT G_M9951_IG44
;; size=69 bbWeight=0 PerfScore 0.00
G_M9951_IG43:
lea rdi, [rbp-0x90]
mov rsi, 0xD1FFAB1E ; 'Invalid Base36 character: '
mov rax, 0xD1FFAB1E ; code for System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:GrowThenCopyString(System.String):this
call [rax]System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:GrowThenCopyString(System.String):this
;; size=29 bbWeight=0 PerfScore 0.00
G_M9951_IG44:
lea rdi, [rbp-0x90]
mov esi, dword ptr [rbp-0x64]
mov rax, 0xD1FFAB1E ; code for System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:AppendFormatted[char](char):this
call [rax]System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:AppendFormatted[char](char):this
mov rdi, 0xD1FFAB1E ; System.ArgumentException
call CORINFO_HELP_NEWSFAST
mov r13, rax
lea rdi, [rbp-0x90]
mov rax, 0xD1FFAB1E ; code for System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:ToStringAndClear():System.String:this
call [rax]System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:ToStringAndClear():System.String:this
mov rsi, rax
mov rdi, r13
mov rax, 0xD1FFAB1E ; code for System.ArgumentException:.ctor(System.String):this
call [rax]System.ArgumentException:.ctor(System.String):this
mov rdi, r13
call CORINFO_HELP_THROW
int3
;; size=86 bbWeight=0 PerfScore 0.00
G_M9951_IG45:
mov rdi, 0xD1FFAB1E ; System.ArgumentException
call CORINFO_HELP_NEWSFAST
mov r12, rax
mov rdi, r12
mov rsi, 0xD1FFAB1E ; 'Output buffer too small'
mov rax, 0xD1FFAB1E ; code for System.ArgumentException:.ctor(System.String):this
call [rax]System.ArgumentException:.ctor(System.String):this
mov rdi, r12
call CORINFO_HELP_THROW
int3
;; size=52 bbWeight=0 PerfScore 0.00
G_M9951_IG46:
mov dword ptr [rbp-0x34], r9d
lea rdi, [rbp-0x60]
mov esi, 42
mov edx, 2
mov rax, 0xD1FFAB1E ; code for System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:.ctor(int,int):this
call [rax]System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:.ctor(int,int):this
mov edi, dword ptr [rbp-0x50]
cmp edi, dword ptr [rbp-0x40]
ja G_M9951_IG41
mov rsi, bword ptr [rbp-0x48]
mov eax, edi
lea r12, bword ptr [rsi+2*rax]
mov esi, dword ptr [rbp-0x40]
sub esi, edi
cmp esi, 30
jb SHORT G_M9951_IG47
vmovups ymm0, ymmword ptr [reloc @RWD96]
vmovups ymmword ptr [r12], ymm0
vmovups xmm0, xmmword ptr [reloc @RWD128]
vmovups xmmword ptr [r12+0x20], xmm0
mov rdi, 0xD1FFAB1E
mov qword ptr [r12+0x30], rdi
mov dword ptr [r12+0x38], 0xD1FFAB1E
mov edi, dword ptr [rbp-0x50]
add edi, 30
mov dword ptr [rbp-0x50], edi
jmp SHORT G_M9951_IG48
;; size=126 bbWeight=0 PerfScore 0.00
G_M9951_IG47:
lea rdi, [rbp-0x60]
mov rsi, 0xD1FFAB1E ; 'Output buffer too small. Need '
mov rax, 0xD1FFAB1E ; code for System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:GrowThenCopyString(System.String):this
call [rax]System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:GrowThenCopyString(System.String):this
;; size=26 bbWeight=0 PerfScore 0.00
G_M9951_IG48:
lea rdi, [rbp-0x60]
mov esi, dword ptr [rbp-0x34]
mov rax, 0xD1FFAB1E ; code for System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:AppendFormatted[int](int):this
call [rax]System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:AppendFormatted[int](int):this
mov edi, dword ptr [rbp-0x50]
cmp edi, dword ptr [rbp-0x40]
ja G_M9951_IG41
mov rsi, bword ptr [rbp-0x48]
mov eax, edi
lea r13, bword ptr [rsi+2*rax]
mov esi, dword ptr [rbp-0x40]
sub esi, edi
cmp esi, 12
jb SHORT G_M9951_IG49
vmovups xmm0, xmmword ptr [reloc @RWD144]
vmovups xmmword ptr [r13], xmm0
mov rdi, 0xD1FFAB1E
mov qword ptr [r13+0x10], rdi
mov edi, dword ptr [rbp-0x50]
add edi, 12
mov dword ptr [rbp-0x50], edi
jmp SHORT G_M9951_IG50
;; size=90 bbWeight=0 PerfScore 0.00
G_M9951_IG49:
lea rdi, [rbp-0x60]
mov rsi, 0xD1FFAB1E ; ' bytes, got '
mov rax, 0xD1FFAB1E ; code for System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:GrowThenCopyString(System.String):this
call [rax]System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:GrowThenCopyString(System.String):this
;; size=26 bbWeight=0 PerfScore 0.00
G_M9951_IG50:
lea rdi, [rbp-0x60]
mov esi, r14d
mov rax, 0xD1FFAB1E ; code for System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:AppendFormatted[int](int):this
call [rax]System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:AppendFormatted[int](int):this
mov rdi, 0xD1FFAB1E ; System.ArgumentException
call CORINFO_HELP_NEWSFAST
mov rbx, rax
lea rdi, [rbp-0x60]
mov rax, 0xD1FFAB1E ; code for System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:ToStringAndClear():System.String:this
call [rax]System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:ToStringAndClear():System.String:this
mov rsi, rax
mov rdi, rbx
mov rax, 0xD1FFAB1E ; code for System.ArgumentException:.ctor(System.String):this
call [rax]System.ArgumentException:.ctor(System.String):this
mov rdi, rbx
call CORINFO_HELP_THROW
int3
;; size=80 bbWeight=0 PerfScore 0.00
G_M9951_IG51:
call CORINFO_HELP_RNGCHKFAIL
int3
;; size=6 bbWeight=0 PerfScore 0.00
G_M9951_IG52:
cmp gword ptr [rbp-0xA8], 0
je SHORT G_M9951_IG54
;; size=10 bbWeight=1 PerfScore 2.00
G_M9951_IG53:
mov rdi, 0xD1FFAB1E ; const ptr
mov rdi, gword ptr [rdi]
mov rsi, gword ptr [rbp-0xA8]
xor edx, edx
mov rax, 0xD1FFAB1E ; code for System.Buffers.SharedArrayPool`1[byte]:Return(byte[],bool):this
call [rax]System.Buffers.SharedArrayPool`1[byte]:Return(byte[],bool):this
;; size=34 bbWeight=0.50 PerfScore 3.38
G_M9951_IG54:
mov rax, rbx
mov rdx, r15
mov r9, 0xD1FFAB1E
cmp qword ptr [rbp-0x30], r9
je SHORT G_M9951_IG55
call CORINFO_HELP_FAIL_FAST
;; size=27 bbWeight=1 PerfScore 3.75
G_M9951_IG55:
nop
;; size=1 bbWeight=1 PerfScore 0.25
G_M9951_IG56:
vzeroupper
lea rsp, [rbp-0x28]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
ret
;; size=18 bbWeight=1 PerfScore 5.50
G_M9951_IG57:
mov rax, 0xD1FFAB1E ; code for System.ThrowHelper:ThrowArgumentOutOfRangeException()
call [rax]System.ThrowHelper:ThrowArgumentOutOfRangeException()
int3
;; size=13 bbWeight=0 PerfScore 0.00
G_M9951_IG58:
push rax
;; size=1 bbWeight=0 PerfScore 0.00
G_M9951_IG59:
mov rdi, 0xD1FFAB1E ; HotChocolate.Execution.Relay.NodeIdInvalidFormatException
call CORINFO_HELP_NEWSFAST
mov rbx, rax
mov rdi, rbx
mov rsi, gword ptr [rbp-0xA0]
mov rax, 0xD1FFAB1E ; code for HotChocolate.Execution.Relay.NodeIdInvalidFormatException:.ctor(System.Object):this
call [rax]HotChocolate.Execution.Relay.NodeIdInvalidFormatException:.ctor(System.Object):this
mov rdi, rbx
call CORINFO_HELP_THROW
int3
;; size=49 bbWeight=0 PerfScore 0.00
G_M9951_IG60:
push rax
;; size=1 bbWeight=0 PerfScore 0.00
G_M9951_IG61:
cmp gword ptr [rbp-0xA8], 0
je SHORT G_M9951_IG62
mov rdi, 0xD1FFAB1E ; const ptr
mov rdi, gword ptr [rdi]
mov rsi, gword ptr [rbp-0xA8]
xor edx, edx
mov rax, 0xD1FFAB1E ; code for System.Buffers.SharedArrayPool`1[byte]:Return(byte[],bool):this
call [rax]System.Buffers.SharedArrayPool`1[byte]:Return(byte[],bool):this
;; size=44 bbWeight=0 PerfScore 0.00
G_M9951_IG62:
nop
;; size=1 bbWeight=0 PerfScore 0.00
G_M9951_IG63:
vzeroupper
add rsp, 8
ret
;; size=8 bbWeight=0 PerfScore 0.00
RWD00 dq 4014AE147AE147AEh ; 5.17
RWD08 dq 3FC0000000000000h ; 0.125
RWD16 dq 41E0000000000000h
RWD32 dq 00610076006E0049h, 002000640069006Ch, 0065007300610042h, 0063002000360033h
RWD64 dq 0061007200610068h, 0072006500740063h
RWD96 dq 007000740075004Fh, 0062002000740075h, 0065006600660075h, 006F007400200072h
RWD128 dq 006D00730020006Fh, 002E006C006C0061h
RWD144 dq 0074007900620020h, 0020002C00730065h
-; Total bytes of code 1627, prolog size 78, PerfScore 222.12, instruction count 400, allocated bytes for code 1627 (MethodHash=c748d920) for method HotChocolate.Types.Relay.DefaultNodeIdSerializer:ParseBase36(System.String,System.Func`2[System.String,System.Type]):HotChocolate.Types.Relay.NodeId:this (FullOpts)
+; Total bytes of code 1645, prolog size 78, PerfScore 223.11, instruction count 401, allocated bytes for code 1645 (MethodHash=c748d920) for method HotChocolate.Types.Relay.DefaultNodeIdSerializer:ParseBase36(System.String,System.Func`2[System.String,System.Type]):HotChocolate.Types.Relay.NodeId:this (FullOpts)
; ============================================================
```
18 (1.11 % of base) - HotChocolate.Types.Relay.OptimizedNodeIdSerializer:ParseBase36(System.String,System.Func`2[System.String,System.Type]):HotChocolate.Types.Relay.NodeId:this
```diff
; Assembly listing for method HotChocolate.Types.Relay.OptimizedNodeIdSerializer:ParseBase36(System.String,System.Func`2[System.String,System.Type]):HotChocolate.Types.Relay.NodeId:this (FullOpts)
; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
; FullOpts code
; optimized code
; rbp based frame
; fully interruptible
; No PGO data
; 0 inlinees with PGO data; 40 single block inlinees; 27 inlinees without PGO data
; Final local variable assignments
;
; V00 this [V00,T27] ( 3, 3 ) ref -> rbx this class-hnd single-def
; V01 arg1 [V01,T15] ( 9, 6.50) ref -> [rbp-0xA0] class-hnd EH-live single-def ptr
; V02 arg2 [V02,T28] ( 3, 3 ) ref -> r15 class-hnd single-def
; V03 loc0 [V03,T35] ( 6, 3 ) ref -> [rbp-0xA8] do-not-enreg[M] class-hnd EH-live ptr
;* V04 loc1 [V04 ] ( 0, 0 ) int -> zero-ref single-def
;* V05 loc2 [V05 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op
;* V06 loc3 [V06 ] ( 0, 0 ) struct (16) zero-ref multireg-arg
;* V07 loc4 [V07 ] ( 0, 0 ) int -> zero-ref single-def
;* V08 loc5 [V08 ] ( 0, 0 ) struct (16) zero-ref
;* V09 loc6 [V09 ] ( 0, 0 ) int -> zero-ref single-def
;* V10 loc7 [V10 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest single-def
;# V11 OutArgs [V11 ] ( 1, 1 ) struct ( 0) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V12 tmp1 [V12 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
; V13 tmp2 [V13,T26] ( 5, 5 ) ref -> rax class-hnd single-def "dup spill"
;* V14 tmp3 [V14 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V15 tmp4 [V15 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V16 tmp5 [V16 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V17 tmp6 [V17 ] ( 0, 0 ) ref -> zero-ref class-hnd "impSpillSpecialSideEff"
; V18 tmp7 [V18,T61] ( 3, 0 ) ref -> rbx class-hnd exact single-def "NewObj constructor temp"
;* V19 tmp8 [V19 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V20 tmp9 [V20 ] ( 0, 0 ) struct (16) zero-ref "Inline return value spill temp"
;* V21 tmp10 [V21 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V22 tmp11 [V22 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V23 tmp12 [V23 ] ( 0, 0 ) byref -> zero-ref single-def "Inlining Arg"
; V24 tmp13 [V24,T43] ( 2, 2 ) int -> rdi "Inlining Arg"
; V25 tmp14 [V25,T32] ( 7, 4 ) int -> r14 "Inline return value spill temp"
;* V26 tmp15 [V26 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V27 tmp16 [V27 ] ( 0, 0 ) double -> zero-ref "Inline stloc first use temp"
;* V28 tmp17 [V28 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
; V29 tmp18 [V29,T44] ( 2, 2 ) long -> r13 "Inlining Arg"
;* V30 tmp19 [V30 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V31 tmp20 [V31 ] ( 0, 0 ) struct (16) zero-ref multireg-arg "Inline return value spill temp"
;* V32 tmp21 [V32 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V33 tmp22 [V33 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inline ldloca(s) first use temp"
; V34 tmp23 [V34,T40] ( 2, 2 ) byref -> rdi single-def "Inlining Arg"
; V35 tmp24 [V35,T45] ( 2, 2 ) int -> rdx "Inlining Arg"
; V36 tmp25 [V36,T34] ( 5, 3.50) int -> rax "Inline return value spill temp"
;* V37 tmp26 [V37 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V38 tmp27 [V38 ] ( 0, 0 ) struct (16) zero-ref "Inlining Arg"
; V39 tmp28 [V39,T48] ( 3, 1.50) int -> rax "Inline return value spill temp"
;* V40 tmp29 [V40 ] ( 0, 0 ) struct (16) zero-ref "Inline stloc first use temp"
;* V41 tmp30 [V41,T53] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V42 tmp31 [V42 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V43 tmp32 [V43 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V44 tmp33 [V44 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V45 tmp34 [V45 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V46 tmp35 [V46 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V47 tmp36 [V47 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
; V48 tmp37 [V48,T14] ( 6, 9 ) int -> rdi "Inline stloc first use temp"
;* V49 tmp38 [V49 ] ( 0, 0 ) struct (16) zero-ref "Inline stloc first use temp"
; V50 tmp39 [V50,T13] ( 6, 9.50) int -> [rbp-0x34] ptr "Inline stloc first use temp"
;* V51 tmp40 [V51 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V52 tmp41 [V52 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
; V53 tmp42 [V53,T03] ( 12, 17.54) int -> rdx "Inline stloc first use temp"
-; V54 tmp43 [V54,T06] ( 4, 16 ) byref -> rax "impAppendStmt"
+; V54 tmp43 [V54,T06] ( 4, 16 ) byref -> r8 "impAppendStmt"
;* V55 tmp44 [V55 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V56 tmp45 [V56 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
; V57 tmp46 [V57 ] ( 18, 0 ) struct (40) [rbp-0x60] do-not-enreg[XSF] must-init addr-exposed ld-addr-op ptr "Inline ldloca(s) first use temp"
; V58 tmp47 [V58,T62] ( 3, 0 ) ref -> rbx class-hnd exact single-def "NewObj constructor temp"
; V59 tmp48 [V59,T63] ( 3, 0 ) ref -> r12 class-hnd exact single-def "NewObj constructor temp"
;* V60 tmp49 [V60 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
; V61 tmp50 [V61,T00] ( 10, 43.56) ushort -> [rbp-0x64] spill-single-def "Inlining Arg"
; V62 tmp51 [V62 ] ( 11, 3.96) struct (40) [rbp-0x90] do-not-enreg[XSF] must-init addr-exposed ld-addr-op ptr "Inline ldloca(s) first use temp"
; V63 tmp52 [V63,T64] ( 3, 0 ) ref -> r13 class-hnd exact "NewObj constructor temp"
-; V64 tmp53 [V64,T12] ( 4, 9.90) int -> r10 "Inline stloc first use temp"
+; V64 tmp53 [V64,T12] ( 4, 9.90) int -> r9 "Inline stloc first use temp"
;* V65 tmp54 [V65 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
; V66 tmp55 [V66,T58] ( 4, 0 ) int -> rdi "Inlining Arg"
;* V67 tmp56 [V67 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
; V68 tmp57 [V68,T57] ( 4, 0 ) byref -> r12 "Inlining Arg"
; V69 tmp58 [V69,T68] ( 2, 0 ) int -> rsi "Inlining Arg"
;* V70 tmp59 [V70,T69] ( 0, 0 ) ubyte -> zero-ref "Inline stloc first use temp"
;* V71 tmp60 [V71 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V72 tmp61 [V72 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V73 tmp62 [V73 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V74 tmp63 [V74 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V75 tmp64 [V75 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V76 tmp65 [V76 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V77 tmp66 [V77 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V78 tmp67 [V78 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V79 tmp68 [V79 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V80 tmp69 [V80 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V81 tmp70 [V81 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V82 tmp71 [V82 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
-; V83 tmp72 [V83,T07] ( 2, 15.84) long -> r8 "Inlining Arg"
-; V84 tmp73 [V84,T08] ( 3, 11.88) long -> rcx "Inline stloc first use temp"
+; V83 tmp72 [V83,T07] ( 2, 15.84) long -> rcx "Inlining Arg"
+; V84 tmp73 [V84,T08] ( 3, 11.88) long -> rax "Inline stloc first use temp"
;* V85 tmp74 [V85 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V86 tmp75 [V86 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
-; V87 tmp76 [V87,T09] ( 3, 11.88) long -> rcx "Inline stloc first use temp"
-; V88 tmp77 [V88,T21] ( 2, 7.92) long -> rax "Inline stloc first use temp"
+; V87 tmp76 [V87,T09] ( 3, 11.88) long -> rax "Inline stloc first use temp"
+; V88 tmp77 [V88,T21] ( 2, 7.92) long -> rdx "Inline stloc first use temp"
;* V89 tmp78 [V89 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V90 tmp79 [V90 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V91 tmp80 [V91 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V92 tmp81 [V92,T54] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
;* V93 tmp82 [V93 ] ( 0, 0 ) struct (16) zero-ref "Inline return value spill temp"
;* V94 tmp83 [V94 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V95 tmp84 [V95 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V96 tmp85 [V96 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V97 tmp86 [V97 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V98 tmp87 [V98 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V99 tmp88 [V99 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V100 tmp89 [V100 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V101 tmp90 [V101,T46] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
;* V102 tmp91 [V102 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
; V103 tmp92 [V103,T59] ( 4, 0 ) int -> rdi "Inlining Arg"
;* V104 tmp93 [V104 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
; V105 tmp94 [V105,T56] ( 5, 0 ) byref -> r12 single-def "Inlining Arg"
; V106 tmp95 [V106,T70] ( 2, 0 ) int -> rsi "Inlining Arg"
;* V107 tmp96 [V107,T71] ( 0, 0 ) ubyte -> zero-ref "Inline stloc first use temp"
;* V108 tmp97 [V108 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V109 tmp98 [V109 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V110 tmp99 [V110 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V111 tmp100 [V111 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
; V112 tmp101 [V112,T60] ( 4, 0 ) int -> rdi "Inlining Arg"
;* V113 tmp102 [V113 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
; V114 tmp103 [V114,T65] ( 3, 0 ) byref -> r13 single-def "Inlining Arg"
; V115 tmp104 [V115,T72] ( 2, 0 ) int -> rsi "Inlining Arg"
;* V116 tmp105 [V116,T73] ( 0, 0 ) ubyte -> zero-ref "Inline stloc first use temp"
;* V117 tmp106 [V117 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V118 tmp107 [V118 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V119 tmp108 [V119 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V120 tmp109 [V120 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V121 tmp110 [V121 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V122 tmp111 [V122 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V123 tmp112 [V123 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V124 tmp113 [V124 ] ( 0, 0 ) struct (16) zero-ref "Inline return value spill temp"
;* V125 tmp114 [V125 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V126 tmp115 [V126 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V127 tmp116 [V127 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V128 tmp117 [V128 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V129 tmp118 [V129 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V130 tmp119 [V130 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V131 tmp120 [V131 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V132 tmp121 [V132 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V133 tmp122 [V133 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V134 tmp123 [V134 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op "NewObj constructor temp"
;* V135 tmp124 [V135 ] ( 0, 0 ) byref -> zero-ref single-def "Inlining Arg"
;* V136 tmp125 [V136 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
; V137 tmp126 [V137,T25] ( 6, 7 ) byref -> r13 single-def "field V05._reference (fldOffset=0x0)" P-INDEP
; V138 tmp127 [V138,T29] ( 8, 4.54) int -> r12 single-def "field V05._length (fldOffset=0x8)" P-INDEP
; V139 tmp128 [V139,T38] ( 3, 2 ) byref -> r13 "field V06._reference (fldOffset=0x0)" P-INDEP
; V140 tmp129 [V140,T39] ( 3, 2 ) int -> r12 "field V06._length (fldOffset=0x8)" P-INDEP
;* V141 tmp130 [V141 ] ( 0, 0 ) byref -> zero-ref "field V08._reference (fldOffset=0x0)" P-INDEP
;* V142 tmp131 [V142 ] ( 0, 0 ) int -> zero-ref "field V08._length (fldOffset=0x8)" P-INDEP
; V143 tmp132 [V143,T41] ( 2, 2 ) ref -> rbx "field V10.k__BackingField (fldOffset=0x0)" P-INDEP
; V144 tmp133 [V144,T42] ( 2, 2 ) ref -> r15 "field V10.k__BackingField (fldOffset=0x8)" P-INDEP
;* V145 tmp134 [V145 ] ( 0, 0 ) byref -> zero-ref "field V12._reference (fldOffset=0x0)" P-INDEP
;* V146 tmp135 [V146 ] ( 0, 0 ) int -> zero-ref "field V12._length (fldOffset=0x8)" P-INDEP
;* V147 tmp136 [V147 ] ( 0, 0 ) byref -> zero-ref "field V14._reference (fldOffset=0x0)" P-INDEP
;* V148 tmp137 [V148 ] ( 0, 0 ) int -> zero-ref "field V14._length (fldOffset=0x8)" P-INDEP
;* V149 tmp138 [V149 ] ( 0, 0 ) byref -> zero-ref "field V15._reference (fldOffset=0x0)" P-INDEP
;* V150 tmp139 [V150 ] ( 0, 0 ) int -> zero-ref "field V15._length (fldOffset=0x8)" P-INDEP
;* V151 tmp140 [V151 ] ( 0, 0 ) ref -> zero-ref do-not-enreg[] "field V16.k__BackingField (fldOffset=0x0)" P-DEP
;* V152 tmp141 [V152 ] ( 0, 0 ) ref -> zero-ref do-not-enreg[] "field V16.k__BackingField (fldOffset=0x8)" P-DEP
; V153 tmp142 [V153,T50] ( 2, 1 ) byref -> r13 single-def "field V19._reference (fldOffset=0x0)" P-INDEP
;* V154 tmp143 [V154 ] ( 0, 0 ) int -> zero-ref single-def "field V19._length (fldOffset=0x8)" P-INDEP
;* V155 tmp144 [V155 ] ( 0, 0 ) byref -> zero-ref "field V20._reference (fldOffset=0x0)" P-INDEP
; V156 tmp145 [V156,T36] ( 4, 2.50) int -> rdi "field V20._length (fldOffset=0x8)" P-INDEP
;* V157 tmp146 [V157 ] ( 0, 0 ) byref -> zero-ref single-def "field V21._reference (fldOffset=0x0)" P-INDEP
;* V158 tmp147 [V158 ] ( 0, 0 ) int -> zero-ref single-def "field V21._length (fldOffset=0x8)" P-INDEP
;* V159 tmp148 [V159 ] ( 0, 0 ) byref -> zero-ref single-def "field V22._reference (fldOffset=0x0)" P-INDEP
;* V160 tmp149 [V160 ] ( 0, 0 ) int -> zero-ref single-def "field V22._length (fldOffset=0x8)" P-INDEP
;* V161 tmp150 [V161 ] ( 0, 0 ) byref -> zero-ref "field V26._reference (fldOffset=0x0)" P-INDEP
;* V162 tmp151 [V162 ] ( 0, 0 ) int -> zero-ref single-def "field V26._length (fldOffset=0x8)" P-INDEP
; V163 tmp152 [V163,T47] ( 3, 1.50) byref -> r13 "field V30._reference (fldOffset=0x0)" P-INDEP
; V164 tmp153 [V164,T49] ( 3, 1.50) int -> r12 "field V30._length (fldOffset=0x8)" P-INDEP
; V165 tmp154 [V165,T37] ( 4, 2 ) byref -> rdi "field V31._reference (fldOffset=0x0)" P-INDEP
; V166 tmp155 [V166,T33] ( 6, 3.50) int -> rdx "field V31._length (fldOffset=0x8)" P-INDEP
;* V167 tmp156 [V167 ] ( 0, 0 ) byref -> zero-ref single-def "field V32._reference (fldOffset=0x0)" P-INDEP
;* V168 tmp157 [V168 ] ( 0, 0 ) int -> zero-ref single-def "field V32._length (fldOffset=0x8)" P-INDEP
;* V169 tmp158 [V169 ] ( 0, 0 ) byref -> zero-ref single-def "field V33._reference (fldOffset=0x0)" P-INDEP
;* V170 tmp159 [V170 ] ( 0, 0 ) int -> zero-ref single-def "field V33._length (fldOffset=0x8)" P-INDEP
;* V171 tmp160 [V171 ] ( 0, 0 ) byref -> zero-ref single-def "field V37._reference (fldOffset=0x0)" P-INDEP
;* V172 tmp161 [V172 ] ( 0, 0 ) int -> zero-ref single-def "field V37._length (fldOffset=0x8)" P-INDEP
;* V173 tmp162 [V173 ] ( 0, 0 ) byref -> zero-ref single-def "field V38._reference (fldOffset=0x0)" P-INDEP
;* V174 tmp163 [V174 ] ( 0, 0 ) int -> zero-ref single-def "field V38._length (fldOffset=0x8)" P-INDEP
-; V175 tmp164 [V175,T01] ( 11, 21.42) long -> rcx "field V40._lower (fldOffset=0x0)" P-INDEP
-; V176 tmp165 [V176,T02] ( 11, 21.42) long -> r8 "field V40._upper (fldOffset=0x8)" P-INDEP
+; V175 tmp164 [V175,T01] ( 11, 21.42) long -> rax "field V40._lower (fldOffset=0x0)" P-INDEP
+; V176 tmp165 [V176,T02] ( 11, 21.42) long -> rcx "field V40._upper (fldOffset=0x8)" P-INDEP
; V177 tmp166 [V177,T30] ( 2, 4.46) byref -> rdi single-def "field V42._reference (fldOffset=0x0)" P-INDEP
; V178 tmp167 [V178,T31] ( 2, 4.46) int -> [rbp-0x94] spill-single-def ptr "field V42._length (fldOffset=0x8)" P-INDEP
;* V179 tmp168 [V179 ] ( 0, 0 ) long -> zero-ref "field V44._lower (fldOffset=0x0)" P-INDEP
;* V180 tmp169 [V180 ] ( 0, 0 ) long -> zero-ref "field V44._upper (fldOffset=0x8)" P-INDEP
;* V181 tmp170 [V181 ] ( 0, 0 ) long -> zero-ref "field V45._lower (fldOffset=0x0)" P-INDEP
;* V182 tmp171 [V182 ] ( 0, 0 ) long -> zero-ref "field V45._upper (fldOffset=0x8)" P-INDEP
;* V183 tmp172 [V183 ] ( 0, 0 ) long -> zero-ref "field V46._lower (fldOffset=0x0)" P-INDEP
;* V184 tmp173 [V184 ] ( 0, 0 ) long -> zero-ref "field V46._upper (fldOffset=0x8)" P-INDEP
;* V185 tmp174 [V185 ] ( 0, 0 ) long -> zero-ref single-def "field V47._lower (fldOffset=0x0)" P-INDEP
;* V186 tmp175 [V186 ] ( 0, 0 ) long -> zero-ref single-def "field V47._upper (fldOffset=0x8)" P-INDEP
; V187 tmp176 [V187,T11] ( 4, 10.50) long -> rdx "field V49._lower (fldOffset=0x0)" P-INDEP
-; V188 tmp177 [V188,T04] ( 5, 16.50) long -> rax "field V49._upper (fldOffset=0x8)" P-INDEP
+; V188 tmp177 [V188,T04] ( 5, 16.50) long -> r8 "field V49._upper (fldOffset=0x8)" P-INDEP
;* V189 tmp178 [V189 ] ( 0, 0 ) long -> zero-ref "field V51._lower (fldOffset=0x0)" P-INDEP
;* V190 tmp179 [V190 ] ( 0, 0 ) long -> zero-ref "field V51._upper (fldOffset=0x8)" P-INDEP
;* V191 tmp180 [V191,T52] ( 0, 0 ) byref -> zero-ref single-def ptr "field V52._reference (fldOffset=0x0)" P-INDEP
; V192 tmp181 [V192,T51] ( 2, 0.50) int -> r14 single-def "field V52._length (fldOffset=0x8)" P-INDEP
;* V193 tmp182 [V193 ] ( 0, 0 ) long -> zero-ref "field V55._lower (fldOffset=0x0)" P-INDEP
;* V194 tmp183 [V194 ] ( 0, 0 ) long -> zero-ref "field V55._upper (fldOffset=0x8)" P-INDEP
;* V195 tmp184 [V195 ] ( 0, 0 ) long -> zero-ref "field V56._lower (fldOffset=0x0)" P-INDEP
;* V196 tmp185 [V196 ] ( 0, 0 ) long -> zero-ref "field V56._upper (fldOffset=0x8)" P-INDEP
;* V197 tmp186 [V197 ] ( 0, 0 ) long -> zero-ref single-def "field V60._lower (fldOffset=0x0)" P-INDEP
;* V198 tmp187 [V198 ] ( 0, 0 ) long -> zero-ref single-def "field V60._upper (fldOffset=0x8)" P-INDEP
;* V199 tmp188 [V199 ] ( 0, 0 ) byref -> zero-ref "field V65._reference (fldOffset=0x0)" P-INDEP
;* V200 tmp189 [V200 ] ( 0, 0 ) int -> zero-ref "field V65._length (fldOffset=0x8)" P-INDEP
;* V201 tmp190 [V201 ] ( 0, 0 ) byref -> zero-ref "field V67._reference (fldOffset=0x0)" P-INDEP
;* V202 tmp191 [V202 ] ( 0, 0 ) int -> zero-ref "field V67._length (fldOffset=0x8)" P-INDEP
;* V203 tmp192 [V203 ] ( 0, 0 ) byref -> zero-ref "field V71._reference (fldOffset=0x0)" P-INDEP
;* V204 tmp193 [V204 ] ( 0, 0 ) int -> zero-ref "field V71._length (fldOffset=0x8)" P-INDEP
;* V205 tmp194 [V205 ] ( 0, 0 ) long -> zero-ref "field V74._lower (fldOffset=0x0)" P-INDEP
;* V206 tmp195 [V206 ] ( 0, 0 ) long -> zero-ref "field V74._upper (fldOffset=0x8)" P-INDEP
;* V207 tmp196 [V207 ] ( 0, 0 ) long -> zero-ref "field V76._lower (fldOffset=0x0)" P-INDEP
;* V208 tmp197 [V208 ] ( 0, 0 ) long -> zero-ref "field V76._upper (fldOffset=0x8)" P-INDEP
;* V209 tmp198 [V209 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V80.Item1 (fldOffset=0x0)" P-DEP
;* V210 tmp199 [V210 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V80.Item2 (fldOffset=0x8)" P-DEP
-; V211 tmp200 [V211,T10] ( 3, 11.88) long -> rax "field V81.Item1 (fldOffset=0x0)" P-INDEP
-; V212 tmp201 [V212,T22] ( 2, 7.92) long -> rdx "field V81.Item2 (fldOffset=0x8)" P-INDEP
+; V211 tmp200 [V211,T10] ( 3, 11.88) long -> rdx "field V81.Item1 (fldOffset=0x0)" P-INDEP
+; V212 tmp201 [V212,T22] ( 2, 7.92) long -> rax "field V81.Item2 (fldOffset=0x8)" P-INDEP
;* V213 tmp202 [V213 ] ( 0, 0 ) long -> zero-ref "field V85._lower (fldOffset=0x0)" P-INDEP
-; V214 tmp203 [V214,T23] ( 2, 7.92) long -> rdx "field V85._upper (fldOffset=0x8)" P-INDEP
+; V214 tmp203 [V214,T23] ( 2, 7.92) long -> r9 "field V85._upper (fldOffset=0x8)" P-INDEP
;* V215 tmp204 [V215 ] ( 0, 0 ) long -> zero-ref "field V89._lower (fldOffset=0x0)" P-INDEP
-; V216 tmp205 [V216,T24] ( 2, 7.92) long -> r8 "field V89._upper (fldOffset=0x8)" P-INDEP
+; V216 tmp205 [V216,T24] ( 2, 7.92) long -> rcx "field V89._upper (fldOffset=0x8)" P-INDEP
;* V217 tmp206 [V217 ] ( 0, 0 ) long -> zero-ref single-def "field V91._lower (fldOffset=0x0)" P-INDEP
;* V218 tmp207 [V218 ] ( 0, 0 ) long -> zero-ref single-def "field V91._upper (fldOffset=0x8)" P-INDEP
;* V219 tmp208 [V219 ] ( 0, 0 ) long -> zero-ref "field V93._lower (fldOffset=0x0)" P-INDEP
;* V220 tmp209 [V220 ] ( 0, 0 ) long -> zero-ref "field V93._upper (fldOffset=0x8)" P-INDEP
; V221 tmp210 [V221,T19] ( 2, 8 ) long -> rdx "field V96._lower (fldOffset=0x0)" P-INDEP
-; V222 tmp211 [V222,T20] ( 2, 8 ) long -> rax "field V96._upper (fldOffset=0x8)" P-INDEP
+; V222 tmp211 [V222,T20] ( 2, 8 ) long -> r8 "field V96._upper (fldOffset=0x8)" P-INDEP
;* V223 tmp212 [V223 ] ( 0, 0 ) long -> zero-ref "field V98._lower (fldOffset=0x0)" P-INDEP
;* V224 tmp213 [V224 ] ( 0, 0 ) long -> zero-ref "field V98._upper (fldOffset=0x8)" P-INDEP
;* V225 tmp214 [V225 ] ( 0, 0 ) long -> zero-ref "field V100._lower (fldOffset=0x0)" P-INDEP
;* V226 tmp215 [V226 ] ( 0, 0 ) long -> zero-ref "field V100._upper (fldOffset=0x8)" P-INDEP
;* V227 tmp216 [V227 ] ( 0, 0 ) byref -> zero-ref "field V102._reference (fldOffset=0x0)" P-INDEP
;* V228 tmp217 [V228 ] ( 0, 0 ) int -> zero-ref "field V102._length (fldOffset=0x8)" P-INDEP
;* V229 tmp218 [V229 ] ( 0, 0 ) byref -> zero-ref single-def "field V104._reference (fldOffset=0x0)" P-INDEP
;* V230 tmp219 [V230 ] ( 0, 0 ) int -> zero-ref single-def "field V104._length (fldOffset=0x8)" P-INDEP
;* V231 tmp220 [V231 ] ( 0, 0 ) byref -> zero-ref single-def "field V108._reference (fldOffset=0x0)" P-INDEP
;* V232 tmp221 [V232 ] ( 0, 0 ) int -> zero-ref single-def "field V108._length (fldOffset=0x8)" P-INDEP
;* V233 tmp222 [V233 ] ( 0, 0 ) byref -> zero-ref "field V111._reference (fldOffset=0x0)" P-INDEP
;* V234 tmp223 [V234 ] ( 0, 0 ) int -> zero-ref "field V111._length (fldOffset=0x8)" P-INDEP
;* V235 tmp224 [V235 ] ( 0, 0 ) byref -> zero-ref single-def "field V113._reference (fldOffset=0x0)" P-INDEP
;* V236 tmp225 [V236 ] ( 0, 0 ) int -> zero-ref single-def "field V113._length (fldOffset=0x8)" P-INDEP
;* V237 tmp226 [V237 ] ( 0, 0 ) byref -> zero-ref single-def "field V117._reference (fldOffset=0x0)" P-INDEP
;* V238 tmp227 [V238 ] ( 0, 0 ) int -> zero-ref single-def "field V117._length (fldOffset=0x8)" P-INDEP
;* V239 tmp228 [V239 ] ( 0, 0 ) long -> zero-ref "field V120._lower (fldOffset=0x0)" P-INDEP
;* V240 tmp229 [V240 ] ( 0, 0 ) long -> zero-ref "field V120._upper (fldOffset=0x8)" P-INDEP
; V241 tmp230 [V241,T16] ( 4, 8 ) long -> r9 "field V121._lower (fldOffset=0x0)" P-INDEP
;* V242 tmp231 [V242 ] ( 0, 0 ) long -> zero-ref "field V121._upper (fldOffset=0x8)" P-INDEP
;* V243 tmp232 [V243 ] ( 0, 0 ) long -> zero-ref "field V124._lower (fldOffset=0x0)" P-INDEP
;* V244 tmp233 [V244 ] ( 0, 0 ) long -> zero-ref "field V124._upper (fldOffset=0x8)" P-INDEP
-; V245 tmp234 [V245,T17] ( 4, 8 ) long -> rcx "field V127._lower (fldOffset=0x0)" P-INDEP
-; V246 tmp235 [V246,T18] ( 4, 8 ) long -> r8 "field V127._upper (fldOffset=0x8)" P-INDEP
+; V245 tmp234 [V245,T17] ( 4, 8 ) long -> rax "field V127._lower (fldOffset=0x0)" P-INDEP
+; V246 tmp235 [V246,T18] ( 4, 8 ) long -> rcx "field V127._upper (fldOffset=0x8)" P-INDEP
;* V247 tmp236 [V247 ] ( 0, 0 ) long -> zero-ref "field V129._lower (fldOffset=0x0)" P-INDEP
;* V248 tmp237 [V248 ] ( 0, 0 ) long -> zero-ref "field V129._upper (fldOffset=0x8)" P-INDEP
;* V249 tmp238 [V249 ] ( 0, 0 ) byref -> zero-ref single-def "field V131._reference (fldOffset=0x0)" P-INDEP
;* V250 tmp239 [V250 ] ( 0, 0 ) int -> zero-ref single-def "field V131._length (fldOffset=0x8)" P-INDEP
;* V251 tmp240 [V251 ] ( 0, 0 ) byref -> zero-ref single-def "field V133._reference (fldOffset=0x0)" P-INDEP
;* V252 tmp241 [V252 ] ( 0, 0 ) int -> zero-ref single-def "field V133._length (fldOffset=0x8)" P-INDEP
;* V253 tmp242 [V253 ] ( 0, 0 ) byref -> zero-ref single-def "field V134._reference (fldOffset=0x0)" P-INDEP
;* V254 tmp243 [V254 ] ( 0, 0 ) int -> zero-ref single-def "field V134._length (fldOffset=0x8)" P-INDEP
; V255 tmp244 [V255,T66] ( 2, 0 ) ref -> rsi "argument with side effect"
; V256 tmp245 [V256,T67] ( 2, 0 ) ref -> rsi single-def "argument with side effect"
-; V257 rat0 [V257,T05] ( 5, 16.34) long -> r9 "Widened IV V41"
+; V257 rat0 [V257,T05] ( 5, 16.34) long -> r8 "Widened IV V41"
; V258 rat1 [V258 ] ( 1, 1 ) long -> [rbp-0x30] do-not-enreg[X] addr-exposed "GSSecurityCookie"
; V259 rat2 [V259,T55] ( 5, 5 ) simd16 -> mm0 "ReplaceWithLclVar is creating a new local variable"
;
; Lcl frame size = 136
G_M6633_IG01:
push rbp
push r15
push r14
push r13
push r12
push rbx
sub rsp, 136
lea rbp, [rsp+0xB0]
vxorps xmm8, xmm8, xmm8
vmovdqu32 zmmword ptr [rbp-0x90], zmm8
vmovdqa xmmword ptr [rbp-0x50], xmm8
xor eax, eax
mov qword ptr [rbp-0x40], rax
mov rax, 0xD1FFAB1E
mov qword ptr [rbp-0x30], rax
mov gword ptr [rbp-0xA0], rsi
mov rbx, rdi
mov r15, rdx
;; size=78 bbWeight=1 PerfScore 14.08
G_M6633_IG02:
xor rdi, rdi
mov gword ptr [rbp-0xA8], rdi
test rsi, rsi
je SHORT G_M6633_IG04
;; size=14 bbWeight=1 PerfScore 2.50
G_M6633_IG03:
mov edi, dword ptr [rsi+0x08]
mov rsi, gword ptr [rbp-0xA0]
jmp SHORT G_M6633_IG05
align [0 bytes for IG21]
;; size=12 bbWeight=0.50 PerfScore 2.50
G_M6633_IG04:
xor edi, edi
;; size=2 bbWeight=0.50 PerfScore 0.12
G_M6633_IG05:
test edi, edi
je SHORT G_M6633_IG07
;; size=4 bbWeight=1 PerfScore 1.25
G_M6633_IG06:
vxorps xmm0, xmm0, xmm0
vcvtsi2sd xmm0, xmm0, edi
vmulsd xmm0, xmm0, qword ptr [reloc @RWD00]
vmulsd xmm0, xmm0, qword ptr [reloc @RWD08]
vroundsd xmm0, xmm0, xmm0, 10
vcmpordsd xmm1, xmm0, xmm0
vandpd xmm1, xmm1, xmm0
mov edi, 0xD1FFAB1E
vcvttsd2si eax, xmm1
vucomisd xmm0, qword ptr [reloc @RWD16]
cmovb edi, eax
inc edi
mov r14d, edi
jmp SHORT G_M6633_IG08
;; size=66 bbWeight=0.50 PerfScore 19.96
G_M6633_IG07:
xor r14d, r14d
;; size=3 bbWeight=0.50 PerfScore 0.12
G_M6633_IG08:
cmp r14d, 256
jle SHORT G_M6633_IG12
;; size=9 bbWeight=1 PerfScore 1.25
G_M6633_IG09:
mov rdi, 0xD1FFAB1E ; const ptr
mov rdi, gword ptr [rdi]
mov esi, r14d
mov rax, 0xD1FFAB1E ; code for System.Buffers.SharedArrayPool`1[byte]:Rent(int):byte[]:this
call [rax]System.Buffers.SharedArrayPool`1[byte]:Rent(int):byte[]:this
mov gword ptr [rbp-0xA8], rax
test rax, rax
je SHORT G_M6633_IG10
lea r13, bword ptr [rax+0x10]
mov r12d, dword ptr [rax+0x08]
jmp SHORT G_M6633_IG11
;; size=50 bbWeight=0.50 PerfScore 6.25
G_M6633_IG10:
xor r13, r13
xor r12d, r12d
;; size=6 bbWeight=0.50 PerfScore 0.25
G_M6633_IG11:
mov rsi, gword ptr [rbp-0xA0]
jmp SHORT G_M6633_IG15
;; size=9 bbWeight=0.50 PerfScore 1.50
G_M6633_IG12:
mov edi, r14d
mov r13, rdi
test r13, r13
je SHORT G_M6633_IG14
add r13, 15
shr r13, 4
;; size=19 bbWeight=0.50 PerfScore 1.25
G_M6633_IG13:
push 0
push 0
dec r13
jne SHORT G_M6633_IG13
lea r13, [rsp]
;; size=13 bbWeight=0.50 PerfScore 1.88
G_M6633_IG14:
test r14d, r14d
jl G_M6633_IG57
mov r12d, r14d
;; size=12 bbWeight=0.50 PerfScore 0.75
G_M6633_IG15:
test rsi, rsi
je SHORT G_M6633_IG17
;; size=5 bbWeight=1 PerfScore 1.25
G_M6633_IG16:
lea rdi, bword ptr [rsi+0x0C]
mov edx, dword ptr [rsi+0x08]
mov rsi, gword ptr [rbp-0xA0]
jmp SHORT G_M6633_IG18
;; size=16 bbWeight=0.50 PerfScore 2.75
G_M6633_IG17:
xor rdi, rdi
xor edx, edx
;; size=4 bbWeight=0.50 PerfScore 0.25
G_M6633_IG18:
test edx, edx
je G_M6633_IG38
;; size=8 bbWeight=1 PerfScore 1.25
G_M6633_IG19:
cmp edx, 25
jle SHORT G_M6633_IG20
mov esi, edx
mov rdx, r13
mov ecx, r12d
mov rax, 0xD1FFAB1E ; code for HotChocolate.Buffers.Text.Base36:DecodeBigInteger(System.ReadOnlySpan`1[char],System.Span`1[byte]):int
call [rax]HotChocolate.Buffers.Text.Base36:DecodeBigInteger(System.ReadOnlySpan`1[char],System.Span`1[byte]):int
mov rsi, gword ptr [rbp-0xA0]
jmp G_M6633_IG39
;; size=37 bbWeight=0.50 PerfScore 4.12
G_M6633_IG20:
mov dword ptr [rbp-0x94], edx
mov r14d, r12d
+ xor eax, eax
xor ecx, ecx
xor r8d, r8d
- xor r9d, r9d
- ;; size=17 bbWeight=0.50 PerfScore 1.00
+ ;; size=16 bbWeight=0.50 PerfScore 1.00
G_M6633_IG21:
- movzx r10, word ptr [rdi+2*r9]
- mov dword ptr [rbp-0x64], r10d
+ movzx r9, word ptr [rdi+2*r8]
+ mov dword ptr [rbp-0x64], r9d
vxorps ymm0, ymm0, ymm0
vmovdqu ymmword ptr [rbp-0x90], ymm0
vmovdqu xmmword ptr [rbp-0x78], xmm0
- cmp r10d, 65
+ cmp r9d, 65
jge SHORT G_M6633_IG23
;; size=32 bbWeight=3.96 PerfScore 26.07
G_M6633_IG22:
- mov eax, r10d
- sub eax, 48
- cmp eax, 9
+ mov r10d, r9d
+ sub r10d, 48
+ cmp r10d, 9
ja G_M6633_IG40
- add r10d, -48
+ add r9d, -48
jmp SHORT G_M6633_IG25
- ;; size=21 bbWeight=1.98 PerfScore 7.92
+ ;; size=23 bbWeight=1.98 PerfScore 7.92
G_M6633_IG23:
- cmp r10d, 97
+ cmp r9d, 97
jge SHORT G_M6633_IG24
- cmp r10d, 90
- jg SHORT G_M6633_IG27
- ;; NOP compensation instructions of 4 bytes.
- add r10d, -55
+ cmp r9d, 90
+ jg G_M6633_IG27
+ add r9d, -55
jmp SHORT G_M6633_IG25
;; size=22 bbWeight=1.98 PerfScore 9.41
G_M6633_IG24:
- cmp r10d, 122
+ cmp r9d, 122
jg SHORT G_M6633_IG28
- add r10d, -87
- ;; size=10 bbWeight=1.98 PerfScore 2.97
+ ;; NOP compensation instructions of 4 bytes.
+ add r9d, -87
+ ;; size=14 bbWeight=1.98 PerfScore 2.97
G_M6633_IG25:
- mov eax, 36
- mul rdx:rax, rcx
- lea rcx, [r8+8*r8]
- lea r8, [rdx+4*rcx]
- mov ecx, r10d
- mov rdx, rcx
- sar rdx, 63
- add rcx, rax
- cmp rcx, rax
- setb al
- movzx rax, al
- add r8, rdx
- add r8, rax
- inc r9d
+ mov r10d, 36
+ mov rdx, r10
+ mulx rax, rdx, rax
+ lea rcx, [rcx+8*rcx]
+ lea rcx, [rax+4*rcx]
+ mov eax, r9d
+ mov r9, rax
+ sar r9, 63
+ add rax, rdx
+ cmp rax, rdx
+ setb dl
+ movzx rdx, dl
+ add rcx, r9
+ add rcx, rdx
+ inc r8d
mov edx, dword ptr [rbp-0x94]
- cmp r9d, edx
+ cmp r8d, edx
jl G_M6633_IG21
- ;; size=62 bbWeight=3.96 PerfScore 37.62
+ ;; size=68 bbWeight=3.96 PerfScore 38.61
G_M6633_IG26:
- test rcx, rcx
+ test rax, rax
jne SHORT G_M6633_IG29
- test r8, r8
+ test rcx, rcx
jne SHORT G_M6633_IG29
test r12d, r12d
jle G_M6633_IG45
mov byte ptr [r13], 0
mov eax, 1
jmp SHORT G_M6633_IG36
;; NOP compensation instructions of 3 bytes.
- align [4 bytes for IG30]
- ;; size=38 bbWeight=0.50 PerfScore 3.50
+ align [9 bytes for IG30]
+ ;; size=43 bbWeight=0.50 PerfScore 3.50
G_M6633_IG27:
jmp G_M6633_IG40
;; size=5 bbWeight=0.99 PerfScore 1.98
G_M6633_IG28:
jmp G_M6633_IG40
;; size=5 bbWeight=0.99 PerfScore 1.98
G_M6633_IG29:
xor edi, edi
- mov rdx, rcx
- mov rax, r8
+ mov rdx, rax
+ mov r8, rcx
xor r9d, r9d
jmp SHORT G_M6633_IG31
;; size=13 bbWeight=0.50 PerfScore 1.50
G_M6633_IG30:
inc r9d
shr rdx, 8
- mov r10, rax
+ mov r10, r8
shl r10, 56
or rdx, r10
- shr rax, 8
+ shr r8, 8
;; size=21 bbWeight=4 PerfScore 9.00
G_M6633_IG31:
- test rax, rax
+ test r8, r8
jne SHORT G_M6633_IG30
;; size=5 bbWeight=4 PerfScore 5.00
G_M6633_IG32:
test rdx, rdx
jne SHORT G_M6633_IG30
;; size=5 bbWeight=2 PerfScore 2.50
G_M6633_IG33:
cmp r9d, r12d
jg G_M6633_IG46
lea edx, [r9-0x01]
test edx, edx
jl SHORT G_M6633_IG35
cmp edx, r12d
jge SHORT G_M6633_IG37
align [0 bytes for IG34]
;; size=22 bbWeight=0.50 PerfScore 2.12
G_M6633_IG34:
- mov eax, edx
- add rax, r13
- movzx r9, cl
- mov byte ptr [rax], r9b
- shr rcx, 8
- mov r10, r8
+ mov r8d, edx
+ add r8, r13
+ movzx r9, al
+ mov byte ptr [r8], r9b
+ shr rax, 8
+ mov r10, rcx
shl r10, 56
- or rcx, r10
- shr r8, 8
+ or rax, r10
+ shr rcx, 8
inc edi
dec edx
jns SHORT G_M6633_IG34
- ;; size=36 bbWeight=3.96 PerfScore 20.79
+ ;; size=37 bbWeight=3.96 PerfScore 20.79
G_M6633_IG35:
mov eax, edi
;; size=2 bbWeight=0.50 PerfScore 0.12
G_M6633_IG36:
jmp SHORT G_M6633_IG39
;; size=2 bbWeight=0.50 PerfScore 1.00
G_M6633_IG37:
cmp edx, r12d
jae G_M6633_IG51
- mov eax, edx
- add rax, r13
- movzx r9, cl
- mov byte ptr [rax], r9b
+ mov r8d, edx
+ add r8, r13
+ movzx r9, al
+ mov byte ptr [r8], r9b
+ shr rax, 8
+ mov r8, rcx
+ shl r8, 56
+ or rax, r8
shr rcx, 8
- mov rax, r8
- shl rax, 56
- or rcx, rax
- shr r8, 8
inc edi
dec edx
jns SHORT G_M6633_IG37
jmp SHORT G_M6633_IG35
- ;; size=47 bbWeight=0.04 PerfScore 0.34
+ ;; size=48 bbWeight=0.04 PerfScore 0.34
G_M6633_IG38:
xor eax, eax
;; size=2 bbWeight=0.50 PerfScore 0.12
G_M6633_IG39:
cmp eax, r12d
ja SHORT G_M6633_IG41
mov rsi, r13
mov edx, eax
mov rdi, rbx
mov rcx, gword ptr [rbp-0xA0]
mov r8, r15
mov rax, 0xD1FFAB1E ; code for HotChocolate.Types.Relay.OptimizedNodeIdSerializer:ParseDecodedData(System.ReadOnlySpan`1[byte],System.String,System.Func`2[System.String,System.Type]):HotChocolate.Types.Relay.NodeId:this
call [rax]HotChocolate.Types.Relay.OptimizedNodeIdSerializer:ParseDecodedData(System.ReadOnlySpan`1[byte],System.String,System.Func`2[System.String,System.Type]):HotChocolate.Types.Relay.NodeId:this
mov rbx, rax
mov r15, rdx
jmp G_M6633_IG52
;; size=46 bbWeight=1 PerfScore 9.00
G_M6633_IG40:
lea rdi, [rbp-0x90]
mov esi, 26
mov edx, 1
mov rax, 0xD1FFAB1E ; code for System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:.ctor(int,int):this
call [rax]System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:.ctor(int,int):this
mov edi, dword ptr [rbp-0x80]
cmp edi, dword ptr [rbp-0x70]
jbe SHORT G_M6633_IG42
;; size=37 bbWeight=0 PerfScore 0.00
G_M6633_IG41:
mov rax, 0xD1FFAB1E ; code for System.ThrowHelper:ThrowArgumentOutOfRangeException()
call [rax]System.ThrowHelper:ThrowArgumentOutOfRangeException()
int3
;; size=13 bbWeight=0 PerfScore 0.00
G_M6633_IG42:
mov rsi, bword ptr [rbp-0x78]
mov eax, edi
lea r12, bword ptr [rsi+2*rax]
mov esi, dword ptr [rbp-0x70]
sub esi, edi
cmp esi, 26
jb SHORT G_M6633_IG43
vmovups ymm0, ymmword ptr [reloc @RWD32]
vmovups ymmword ptr [r12], ymm0
vmovups xmm0, xmmword ptr [reloc @RWD64]
vmovups xmmword ptr [r12+0x20], xmm0
mov dword ptr [r12+0x30], 0xD1FFAB1E
mov edi, dword ptr [rbp-0x80]
add edi, 26
mov dword ptr [rbp-0x80], edi
jmp SHORT G_M6633_IG44
;; size=69 bbWeight=0 PerfScore 0.00
G_M6633_IG43:
lea rdi, [rbp-0x90]
mov rsi, 0xD1FFAB1E ; 'Invalid Base36 character: '
mov rax, 0xD1FFAB1E ; code for System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:GrowThenCopyString(System.String):this
call [rax]System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:GrowThenCopyString(System.String):this
;; size=29 bbWeight=0 PerfScore 0.00
G_M6633_IG44:
lea rdi, [rbp-0x90]
mov esi, dword ptr [rbp-0x64]
mov rax, 0xD1FFAB1E ; code for System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:AppendFormatted[char](char):this
call [rax]System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:AppendFormatted[char](char):this
mov rdi, 0xD1FFAB1E ; System.ArgumentException
call CORINFO_HELP_NEWSFAST
mov r13, rax
lea rdi, [rbp-0x90]
mov rax, 0xD1FFAB1E ; code for System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:ToStringAndClear():System.String:this
call [rax]System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:ToStringAndClear():System.String:this
mov rsi, rax
mov rdi, r13
mov rax, 0xD1FFAB1E ; code for System.ArgumentException:.ctor(System.String):this
call [rax]System.ArgumentException:.ctor(System.String):this
mov rdi, r13
call CORINFO_HELP_THROW
int3
;; size=86 bbWeight=0 PerfScore 0.00
G_M6633_IG45:
mov rdi, 0xD1FFAB1E ; System.ArgumentException
call CORINFO_HELP_NEWSFAST
mov r12, rax
mov rdi, r12
mov rsi, 0xD1FFAB1E ; 'Output buffer too small'
mov rax, 0xD1FFAB1E ; code for System.ArgumentException:.ctor(System.String):this
call [rax]System.ArgumentException:.ctor(System.String):this
mov rdi, r12
call CORINFO_HELP_THROW
int3
;; size=52 bbWeight=0 PerfScore 0.00
G_M6633_IG46:
mov dword ptr [rbp-0x34], r9d
lea rdi, [rbp-0x60]
mov esi, 42
mov edx, 2
mov rax, 0xD1FFAB1E ; code for System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:.ctor(int,int):this
call [rax]System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:.ctor(int,int):this
mov edi, dword ptr [rbp-0x50]
cmp edi, dword ptr [rbp-0x40]
ja G_M6633_IG41
mov rsi, bword ptr [rbp-0x48]
mov eax, edi
lea r12, bword ptr [rsi+2*rax]
mov esi, dword ptr [rbp-0x40]
sub esi, edi
cmp esi, 30
jb SHORT G_M6633_IG47
vmovups ymm0, ymmword ptr [reloc @RWD96]
vmovups ymmword ptr [r12], ymm0
vmovups xmm0, xmmword ptr [reloc @RWD128]
vmovups xmmword ptr [r12+0x20], xmm0
mov rdi, 0xD1FFAB1E
mov qword ptr [r12+0x30], rdi
mov dword ptr [r12+0x38], 0xD1FFAB1E
mov edi, dword ptr [rbp-0x50]
add edi, 30
mov dword ptr [rbp-0x50], edi
jmp SHORT G_M6633_IG48
;; size=126 bbWeight=0 PerfScore 0.00
G_M6633_IG47:
lea rdi, [rbp-0x60]
mov rsi, 0xD1FFAB1E ; 'Output buffer too small. Need '
mov rax, 0xD1FFAB1E ; code for System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:GrowThenCopyString(System.String):this
call [rax]System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:GrowThenCopyString(System.String):this
;; size=26 bbWeight=0 PerfScore 0.00
G_M6633_IG48:
lea rdi, [rbp-0x60]
mov esi, dword ptr [rbp-0x34]
mov rax, 0xD1FFAB1E ; code for System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:AppendFormatted[int](int):this
call [rax]System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:AppendFormatted[int](int):this
mov edi, dword ptr [rbp-0x50]
cmp edi, dword ptr [rbp-0x40]
ja G_M6633_IG41
mov rsi, bword ptr [rbp-0x48]
mov eax, edi
lea r13, bword ptr [rsi+2*rax]
mov esi, dword ptr [rbp-0x40]
sub esi, edi
cmp esi, 12
jb SHORT G_M6633_IG49
vmovups xmm0, xmmword ptr [reloc @RWD144]
vmovups xmmword ptr [r13], xmm0
mov rdi, 0xD1FFAB1E
mov qword ptr [r13+0x10], rdi
mov edi, dword ptr [rbp-0x50]
add edi, 12
mov dword ptr [rbp-0x50], edi
jmp SHORT G_M6633_IG50
;; size=90 bbWeight=0 PerfScore 0.00
G_M6633_IG49:
lea rdi, [rbp-0x60]
mov rsi, 0xD1FFAB1E ; ' bytes, got '
mov rax, 0xD1FFAB1E ; code for System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:GrowThenCopyString(System.String):this
call [rax]System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:GrowThenCopyString(System.String):this
;; size=26 bbWeight=0 PerfScore 0.00
G_M6633_IG50:
lea rdi, [rbp-0x60]
mov esi, r14d
mov rax, 0xD1FFAB1E ; code for System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:AppendFormatted[int](int):this
call [rax]System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:AppendFormatted[int](int):this
mov rdi, 0xD1FFAB1E ; System.ArgumentException
call CORINFO_HELP_NEWSFAST
mov rbx, rax
lea rdi, [rbp-0x60]
mov rax, 0xD1FFAB1E ; code for System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:ToStringAndClear():System.String:this
call [rax]System.Runtime.CompilerServices.DefaultInterpolatedStringHandler:ToStringAndClear():System.String:this
mov rsi, rax
mov rdi, rbx
mov rax, 0xD1FFAB1E ; code for System.ArgumentException:.ctor(System.String):this
call [rax]System.ArgumentException:.ctor(System.String):this
mov rdi, rbx
call CORINFO_HELP_THROW
int3
;; size=80 bbWeight=0 PerfScore 0.00
G_M6633_IG51:
call CORINFO_HELP_RNGCHKFAIL
int3
;; size=6 bbWeight=0 PerfScore 0.00
G_M6633_IG52:
cmp gword ptr [rbp-0xA8], 0
je SHORT G_M6633_IG54
;; size=10 bbWeight=1 PerfScore 2.00
G_M6633_IG53:
mov rdi, 0xD1FFAB1E ; const ptr
mov rdi, gword ptr [rdi]
mov rsi, gword ptr [rbp-0xA8]
xor edx, edx
mov rax, 0xD1FFAB1E ; code for System.Buffers.SharedArrayPool`1[byte]:Return(byte[],bool):this
call [rax]System.Buffers.SharedArrayPool`1[byte]:Return(byte[],bool):this
;; size=34 bbWeight=0.50 PerfScore 3.38
G_M6633_IG54:
mov rax, rbx
mov rdx, r15
mov r9, 0xD1FFAB1E
cmp qword ptr [rbp-0x30], r9
je SHORT G_M6633_IG55
call CORINFO_HELP_FAIL_FAST
;; size=27 bbWeight=1 PerfScore 3.75
G_M6633_IG55:
nop
;; size=1 bbWeight=1 PerfScore 0.25
G_M6633_IG56:
vzeroupper
lea rsp, [rbp-0x28]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
ret
;; size=18 bbWeight=1 PerfScore 5.50
G_M6633_IG57:
mov rax, 0xD1FFAB1E ; code for System.ThrowHelper:ThrowArgumentOutOfRangeException()
call [rax]System.ThrowHelper:ThrowArgumentOutOfRangeException()
int3
;; size=13 bbWeight=0 PerfScore 0.00
G_M6633_IG58:
push rax
;; size=1 bbWeight=0 PerfScore 0.00
G_M6633_IG59:
mov rdi, 0xD1FFAB1E ; HotChocolate.Execution.Relay.NodeIdInvalidFormatException
call CORINFO_HELP_NEWSFAST
mov rbx, rax
mov rdi, rbx
mov rsi, gword ptr [rbp-0xA0]
mov rax, 0xD1FFAB1E ; code for HotChocolate.Execution.Relay.NodeIdInvalidFormatException:.ctor(System.Object):this
call [rax]HotChocolate.Execution.Relay.NodeIdInvalidFormatException:.ctor(System.Object):this
mov rdi, rbx
call CORINFO_HELP_THROW
int3
;; size=49 bbWeight=0 PerfScore 0.00
G_M6633_IG60:
push rax
;; size=1 bbWeight=0 PerfScore 0.00
G_M6633_IG61:
cmp gword ptr [rbp-0xA8], 0
je SHORT G_M6633_IG62
mov rdi, 0xD1FFAB1E ; const ptr
mov rdi, gword ptr [rdi]
mov rsi, gword ptr [rbp-0xA8]
xor edx, edx
mov rax, 0xD1FFAB1E ; code for System.Buffers.SharedArrayPool`1[byte]:Return(byte[],bool):this
call [rax]System.Buffers.SharedArrayPool`1[byte]:Return(byte[],bool):this
;; size=44 bbWeight=0 PerfScore 0.00
G_M6633_IG62:
nop
;; size=1 bbWeight=0 PerfScore 0.00
G_M6633_IG63:
vzeroupper
add rsp, 8
ret
;; size=8 bbWeight=0 PerfScore 0.00
RWD00 dq 4014AE147AE147AEh ; 5.17
RWD08 dq 3FC0000000000000h ; 0.125
RWD16 dq 41E0000000000000h
RWD32 dq 00610076006E0049h, 002000640069006Ch, 0065007300610042h, 0063002000360033h
RWD64 dq 0061007200610068h, 0072006500740063h
RWD96 dq 007000740075004Fh, 0062002000740075h, 0065006600660075h, 006F007400200072h
RWD128 dq 006D00730020006Fh, 002E006C006C0061h
RWD144 dq 0074007900620020h, 0020002C00730065h
-; Total bytes of code 1627, prolog size 78, PerfScore 222.12, instruction count 400, allocated bytes for code 1627 (MethodHash=8f98e616) for method HotChocolate.Types.Relay.OptimizedNodeIdSerializer:ParseBase36(System.String,System.Func`2[System.String,System.Type]):HotChocolate.Types.Relay.NodeId:this (FullOpts)
+; Total bytes of code 1645, prolog size 78, PerfScore 223.11, instruction count 401, allocated bytes for code 1645 (MethodHash=8f98e616) for method HotChocolate.Types.Relay.OptimizedNodeIdSerializer:ParseBase36(System.String,System.Func`2[System.String,System.Type]):HotChocolate.Types.Relay.NodeId:this (FullOpts)
; ============================================================
```
13 (2.28 % of base) - System.Numerics.BigIntegerCalculator:SubMul1(System.Span`1[nuint],System.ReadOnlySpan`1[nuint],nuint):nuint
```diff
; Assembly listing for method System.Numerics.BigIntegerCalculator:SubMul1(System.Span`1[nuint],System.ReadOnlySpan`1[nuint],nuint):nuint (FullOpts)
; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
; FullOpts code
; optimized code
; rbp based frame
; fully interruptible
; No PGO data
; 0 inlinees with PGO data; 75 single block inlinees; 10 inlinees without PGO data
; Final local variable assignments
;
;* V00 arg0 [V00 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op single-def
;* V01 arg1 [V01 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op single-def
; V02 arg2 [V02,T02] ( 8, 22 ) long -> r8 single-def
-; V03 loc0 [V03,T04] ( 7, 21 ) int -> r9
-; V04 loc1 [V04,T00] ( 24, 53.91) int -> r10
-; V05 loc2 [V05,T06] ( 8, 18 ) long -> [rbp-0x18]
+; V03 loc0 [V03,T04] ( 7, 21 ) int -> rax
+; V04 loc1 [V04,T00] ( 24, 53.91) int -> r9
+; V05 loc2 [V05,T06] ( 8, 18 ) long -> r10
;* V06 loc3 [V06 ] ( 0, 0 ) long -> zero-ref
-; V07 loc4 [V07,T35] ( 2, 8 ) long -> r11
-; V08 loc5 [V08,T22] ( 3, 12 ) long -> rdx
+; V07 loc4 [V07,T35] ( 2, 8 ) long -> r10
+; V08 loc5 [V08,T22] ( 3, 12 ) long -> rbx
;* V09 loc6 [V09 ] ( 0, 0 ) long -> zero-ref
-; V10 loc7 [V10,T36] ( 2, 8 ) long -> r11
-; V11 loc8 [V11,T23] ( 3, 12 ) long -> rdx
+; V10 loc7 [V10,T36] ( 2, 8 ) long -> r10
+; V11 loc8 [V11,T23] ( 3, 12 ) long -> r11
;* V12 loc9 [V12 ] ( 0, 0 ) long -> zero-ref
-; V13 loc10 [V13,T37] ( 2, 8 ) long -> r11
-; V14 loc11 [V14,T24] ( 3, 12 ) long -> rdx
+; V13 loc10 [V13,T37] ( 2, 8 ) long -> r10
+; V14 loc11 [V14,T24] ( 3, 12 ) long -> r11
;* V15 loc12 [V15 ] ( 0, 0 ) long -> zero-ref
-; V16 loc13 [V16,T25] ( 3, 12 ) long -> rdx
+; V16 loc13 [V16,T25] ( 3, 12 ) long -> r11
;* V17 loc14 [V17 ] ( 0, 0 ) long -> zero-ref
-; V18 loc15 [V18,T20] ( 6, 12 ) long -> registers
+; V18 loc15 [V18,T20] ( 6, 12 ) long -> r15
;# V19 OutArgs [V19 ] ( 1, 1 ) struct ( 0) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V20 tmp1 [V20 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V21 tmp2 [V21 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V22 tmp3 [V22 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V23 tmp4 [V23 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V24 tmp5 [V24 ] ( 0, 0 ) struct (16) zero-ref "dup spill"
;* V25 tmp6 [V25 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V26 tmp7 [V26 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V27 tmp8 [V27 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V28 tmp9 [V28 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V29 tmp10 [V29 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V30 tmp11 [V30 ] ( 0, 0 ) struct (16) zero-ref "dup spill"
;* V31 tmp12 [V31 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V32 tmp13 [V32 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V33 tmp14 [V33 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V34 tmp15 [V34 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V35 tmp16 [V35 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V36 tmp17 [V36 ] ( 0, 0 ) struct (16) zero-ref "dup spill"
;* V37 tmp18 [V37 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V38 tmp19 [V38 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V39 tmp20 [V39 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V40 tmp21 [V40 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V41 tmp22 [V41 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V42 tmp23 [V42 ] ( 0, 0 ) struct (16) zero-ref "dup spill"
;* V43 tmp24 [V43 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V44 tmp25 [V44 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V45 tmp26 [V45 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V46 tmp27 [V46 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V47 tmp28 [V47 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V48 tmp29 [V48 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V49 tmp30 [V49 ] ( 0, 0 ) struct (16) zero-ref "dup spill"
;* V50 tmp31 [V50 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V51 tmp32 [V51 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V52 tmp33 [V52 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V53 tmp34 [V53 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V54 tmp35 [V54 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V55 tmp36 [V55 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V56 tmp37 [V56 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V57 tmp38 [V57 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V58 tmp39 [V58 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V59 tmp40 [V59 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V60 tmp41 [V60 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V61 tmp42 [V61 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V62 tmp43 [V62 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V63 tmp44 [V63 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V64 tmp45 [V64 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
-; V65 tmp46 [V65,T08] ( 4, 16 ) long -> rbx "Inline stloc first use temp"
-; V66 tmp47 [V66,T38] ( 2, 8 ) long -> rax "Inline stloc first use temp"
+; V65 tmp46 [V65,T08] ( 4, 16 ) long -> r10 "Inline stloc first use temp"
+; V66 tmp47 [V66,T38] ( 2, 8 ) long -> rdx "Inline stloc first use temp"
;* V67 tmp48 [V67 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V68 tmp49 [V68 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V69 tmp50 [V69 ] ( 0, 0 ) struct (16) zero-ref "Inline return value spill temp"
;* V70 tmp51 [V70 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V71 tmp52 [V71 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V72 tmp53 [V72 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V73 tmp54 [V73 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V74 tmp55 [V74 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V75 tmp56 [V75 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V76 tmp57 [V76 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V77 tmp58 [V77 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V78 tmp59 [V78 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V79 tmp60 [V79 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V80 tmp61 [V80 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V81 tmp62 [V81 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V82 tmp63 [V82 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V83 tmp64 [V83 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V84 tmp65 [V84 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V85 tmp66 [V85 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V86 tmp67 [V86 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V87 tmp68 [V87 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V88 tmp69 [V88 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
-; V89 tmp70 [V89,T09] ( 4, 16 ) long -> r11 "Inline stloc first use temp"
-; V90 tmp71 [V90,T39] ( 2, 8 ) long -> rax "Inline stloc first use temp"
+; V89 tmp70 [V89,T09] ( 4, 16 ) long -> r10 "Inline stloc first use temp"
+; V90 tmp71 [V90,T39] ( 2, 8 ) long -> rdx "Inline stloc first use temp"
;* V91 tmp72 [V91 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V92 tmp73 [V92 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V93 tmp74 [V93 ] ( 0, 0 ) struct (16) zero-ref "Inline return value spill temp"
;* V94 tmp75 [V94 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V95 tmp76 [V95 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V96 tmp77 [V96 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V97 tmp78 [V97 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V98 tmp79 [V98 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V99 tmp80 [V99 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V100 tmp81 [V100 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V101 tmp82 [V101 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V102 tmp83 [V102 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V103 tmp84 [V103 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V104 tmp85 [V104 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V105 tmp86 [V105 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V106 tmp87 [V106 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V107 tmp88 [V107 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V108 tmp89 [V108 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V109 tmp90 [V109 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V110 tmp91 [V110 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V111 tmp92 [V111 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V112 tmp93 [V112 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
-; V113 tmp94 [V113,T10] ( 4, 16 ) long -> r11 "Inline stloc first use temp"
-; V114 tmp95 [V114,T40] ( 2, 8 ) long -> rax "Inline stloc first use temp"
+; V113 tmp94 [V113,T10] ( 4, 16 ) long -> r10 "Inline stloc first use temp"
+; V114 tmp95 [V114,T40] ( 2, 8 ) long -> rdx "Inline stloc first use temp"
;* V115 tmp96 [V115 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V116 tmp97 [V116 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V117 tmp98 [V117 ] ( 0, 0 ) struct (16) zero-ref "Inline return value spill temp"
;* V118 tmp99 [V118 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V119 tmp100 [V119 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V120 tmp101 [V120 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V121 tmp102 [V121 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V122 tmp103 [V122 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V123 tmp104 [V123 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V124 tmp105 [V124 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V125 tmp106 [V125 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V126 tmp107 [V126 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V127 tmp108 [V127 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V128 tmp109 [V128 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V129 tmp110 [V129 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V130 tmp111 [V130 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V131 tmp112 [V131 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V132 tmp113 [V132 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V133 tmp114 [V133 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V134 tmp115 [V134 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V135 tmp116 [V135 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V136 tmp117 [V136 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
-; V137 tmp118 [V137,T11] ( 4, 16 ) long -> r11 "Inline stloc first use temp"
-; V138 tmp119 [V138,T41] ( 2, 8 ) long -> rax "Inline stloc first use temp"
+; V137 tmp118 [V137,T11] ( 4, 16 ) long -> r10 "Inline stloc first use temp"
+; V138 tmp119 [V138,T41] ( 2, 8 ) long -> rdx "Inline stloc first use temp"
;* V139 tmp120 [V139 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V140 tmp121 [V140 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V141 tmp122 [V141 ] ( 0, 0 ) struct (16) zero-ref "Inline return value spill temp"
;* V142 tmp123 [V142 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V143 tmp124 [V143 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V144 tmp125 [V144 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V145 tmp126 [V145 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V146 tmp127 [V146 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V147 tmp128 [V147 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V148 tmp129 [V148 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V149 tmp130 [V149 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V150 tmp131 [V150 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V151 tmp132 [V151 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V152 tmp133 [V152 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V153 tmp134 [V153 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V154 tmp135 [V154 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V155 tmp136 [V155 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V156 tmp137 [V156 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V157 tmp138 [V157 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V158 tmp139 [V158 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V159 tmp140 [V159 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V160 tmp141 [V160 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
-; V161 tmp142 [V161,T07] ( 8, 16 ) long -> r11 "Inline stloc first use temp"
-; V162 tmp143 [V162,T31] ( 4, 8 ) long -> rbx "Inline stloc first use temp"
+; V161 tmp142 [V161,T07] ( 8, 16 ) long -> rbx "Inline stloc first use temp"
+; V162 tmp143 [V162,T31] ( 4, 8 ) long -> r10 "Inline stloc first use temp"
;* V163 tmp144 [V163 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V164 tmp145 [V164 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V165 tmp146 [V165 ] ( 0, 0 ) struct (16) zero-ref "Inline return value spill temp"
;* V166 tmp147 [V166 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V167 tmp148 [V167 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V168 tmp149 [V168 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V169 tmp150 [V169 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V170 tmp151 [V170 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V171 tmp152 [V171 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
; V172 tmp153 [V172,T01] ( 13, 41 ) byref -> rdi single-def "field V00._reference (fldOffset=0x0)" P-INDEP
; V173 tmp154 [V173,T05] ( 7, 17.29) int -> rsi single-def "field V00._length (fldOffset=0x8)" P-INDEP
; V174 tmp155 [V174,T03] ( 7, 21 ) byref -> [rbp-0x20] single-def "field V01._reference (fldOffset=0x0)" P-INDEP
; V175 tmp156 [V175,T30] ( 7, 7.79) int -> rcx single-def "field V01._length (fldOffset=0x8)" P-INDEP
;* V176 tmp157 [V176 ] ( 0, 0 ) long -> zero-ref "field V20._lower (fldOffset=0x0)" P-INDEP
;* V177 tmp158 [V177 ] ( 0, 0 ) long -> zero-ref "field V20._upper (fldOffset=0x8)" P-INDEP
;* V178 tmp159 [V178 ] ( 0, 0 ) long -> zero-ref "field V21._lower (fldOffset=0x0)" P-INDEP
;* V179 tmp160 [V179 ] ( 0, 0 ) long -> zero-ref "field V21._upper (fldOffset=0x8)" P-INDEP
;* V180 tmp161 [V180 ] ( 0, 0 ) long -> zero-ref "field V22._lower (fldOffset=0x0)" P-INDEP
;* V181 tmp162 [V181 ] ( 0, 0 ) long -> zero-ref "field V22._upper (fldOffset=0x8)" P-INDEP
;* V182 tmp163 [V182 ] ( 0, 0 ) long -> zero-ref "field V23._lower (fldOffset=0x0)" P-INDEP
;* V183 tmp164 [V183 ] ( 0, 0 ) long -> zero-ref "field V23._upper (fldOffset=0x8)" P-INDEP
;* V184 tmp165 [V184 ] ( 0, 0 ) long -> zero-ref "field V24._lower (fldOffset=0x0)" P-INDEP
;* V185 tmp166 [V185 ] ( 0, 0 ) long -> zero-ref "field V24._upper (fldOffset=0x8)" P-INDEP
;* V186 tmp167 [V186 ] ( 0, 0 ) long -> zero-ref "field V25._lower (fldOffset=0x0)" P-INDEP
;* V187 tmp168 [V187 ] ( 0, 0 ) long -> zero-ref "field V25._upper (fldOffset=0x8)" P-INDEP
;* V188 tmp169 [V188 ] ( 0, 0 ) long -> zero-ref "field V26._lower (fldOffset=0x0)" P-INDEP
;* V189 tmp170 [V189 ] ( 0, 0 ) long -> zero-ref "field V26._upper (fldOffset=0x8)" P-INDEP
;* V190 tmp171 [V190 ] ( 0, 0 ) long -> zero-ref "field V27._lower (fldOffset=0x0)" P-INDEP
;* V191 tmp172 [V191 ] ( 0, 0 ) long -> zero-ref "field V27._upper (fldOffset=0x8)" P-INDEP
;* V192 tmp173 [V192 ] ( 0, 0 ) long -> zero-ref "field V28._lower (fldOffset=0x0)" P-INDEP
;* V193 tmp174 [V193 ] ( 0, 0 ) long -> zero-ref "field V28._upper (fldOffset=0x8)" P-INDEP
;* V194 tmp175 [V194 ] ( 0, 0 ) long -> zero-ref "field V29._lower (fldOffset=0x0)" P-INDEP
;* V195 tmp176 [V195 ] ( 0, 0 ) long -> zero-ref "field V29._upper (fldOffset=0x8)" P-INDEP
;* V196 tmp177 [V196 ] ( 0, 0 ) long -> zero-ref "field V30._lower (fldOffset=0x0)" P-INDEP
;* V197 tmp178 [V197 ] ( 0, 0 ) long -> zero-ref "field V30._upper (fldOffset=0x8)" P-INDEP
;* V198 tmp179 [V198 ] ( 0, 0 ) long -> zero-ref "field V31._lower (fldOffset=0x0)" P-INDEP
;* V199 tmp180 [V199 ] ( 0, 0 ) long -> zero-ref "field V31._upper (fldOffset=0x8)" P-INDEP
;* V200 tmp181 [V200 ] ( 0, 0 ) long -> zero-ref "field V32._lower (fldOffset=0x0)" P-INDEP
;* V201 tmp182 [V201 ] ( 0, 0 ) long -> zero-ref "field V32._upper (fldOffset=0x8)" P-INDEP
;* V202 tmp183 [V202 ] ( 0, 0 ) long -> zero-ref "field V33._lower (fldOffset=0x0)" P-INDEP
;* V203 tmp184 [V203 ] ( 0, 0 ) long -> zero-ref "field V33._upper (fldOffset=0x8)" P-INDEP
;* V204 tmp185 [V204 ] ( 0, 0 ) long -> zero-ref "field V34._lower (fldOffset=0x0)" P-INDEP
;* V205 tmp186 [V205 ] ( 0, 0 ) long -> zero-ref "field V34._upper (fldOffset=0x8)" P-INDEP
;* V206 tmp187 [V206 ] ( 0, 0 ) long -> zero-ref "field V35._lower (fldOffset=0x0)" P-INDEP
;* V207 tmp188 [V207 ] ( 0, 0 ) long -> zero-ref "field V35._upper (fldOffset=0x8)" P-INDEP
;* V208 tmp189 [V208 ] ( 0, 0 ) long -> zero-ref "field V36._lower (fldOffset=0x0)" P-INDEP
;* V209 tmp190 [V209 ] ( 0, 0 ) long -> zero-ref "field V36._upper (fldOffset=0x8)" P-INDEP
;* V210 tmp191 [V210 ] ( 0, 0 ) long -> zero-ref "field V37._lower (fldOffset=0x0)" P-INDEP
;* V211 tmp192 [V211 ] ( 0, 0 ) long -> zero-ref "field V37._upper (fldOffset=0x8)" P-INDEP
;* V212 tmp193 [V212 ] ( 0, 0 ) long -> zero-ref "field V38._lower (fldOffset=0x0)" P-INDEP
;* V213 tmp194 [V213 ] ( 0, 0 ) long -> zero-ref "field V38._upper (fldOffset=0x8)" P-INDEP
;* V214 tmp195 [V214 ] ( 0, 0 ) long -> zero-ref "field V39._lower (fldOffset=0x0)" P-INDEP
;* V215 tmp196 [V215 ] ( 0, 0 ) long -> zero-ref "field V39._upper (fldOffset=0x8)" P-INDEP
;* V216 tmp197 [V216 ] ( 0, 0 ) long -> zero-ref "field V40._lower (fldOffset=0x0)" P-INDEP
;* V217 tmp198 [V217 ] ( 0, 0 ) long -> zero-ref "field V40._upper (fldOffset=0x8)" P-INDEP
;* V218 tmp199 [V218 ] ( 0, 0 ) long -> zero-ref "field V41._lower (fldOffset=0x0)" P-INDEP
;* V219 tmp200 [V219 ] ( 0, 0 ) long -> zero-ref "field V41._upper (fldOffset=0x8)" P-INDEP
;* V220 tmp201 [V220 ] ( 0, 0 ) long -> zero-ref "field V42._lower (fldOffset=0x0)" P-INDEP
;* V221 tmp202 [V221 ] ( 0, 0 ) long -> zero-ref "field V42._upper (fldOffset=0x8)" P-INDEP
;* V222 tmp203 [V222 ] ( 0, 0 ) long -> zero-ref "field V43._lower (fldOffset=0x0)" P-INDEP
;* V223 tmp204 [V223 ] ( 0, 0 ) long -> zero-ref "field V43._upper (fldOffset=0x8)" P-INDEP
;* V224 tmp205 [V224 ] ( 0, 0 ) long -> zero-ref "field V45._lower (fldOffset=0x0)" P-INDEP
;* V225 tmp206 [V225 ] ( 0, 0 ) long -> zero-ref "field V45._upper (fldOffset=0x8)" P-INDEP
;* V226 tmp207 [V226 ] ( 0, 0 ) long -> zero-ref "field V46._lower (fldOffset=0x0)" P-INDEP
;* V227 tmp208 [V227 ] ( 0, 0 ) long -> zero-ref "field V46._upper (fldOffset=0x8)" P-INDEP
;* V228 tmp209 [V228 ] ( 0, 0 ) long -> zero-ref "field V47._lower (fldOffset=0x0)" P-INDEP
;* V229 tmp210 [V229 ] ( 0, 0 ) long -> zero-ref "field V47._upper (fldOffset=0x8)" P-INDEP
;* V230 tmp211 [V230 ] ( 0, 0 ) long -> zero-ref "field V48._lower (fldOffset=0x0)" P-INDEP
;* V231 tmp212 [V231 ] ( 0, 0 ) long -> zero-ref "field V48._upper (fldOffset=0x8)" P-INDEP
;* V232 tmp213 [V232 ] ( 0, 0 ) long -> zero-ref "field V49._lower (fldOffset=0x0)" P-INDEP
;* V233 tmp214 [V233 ] ( 0, 0 ) long -> zero-ref "field V49._upper (fldOffset=0x8)" P-INDEP
;* V234 tmp215 [V234 ] ( 0, 0 ) long -> zero-ref "field V50._lower (fldOffset=0x0)" P-INDEP
;* V235 tmp216 [V235 ] ( 0, 0 ) long -> zero-ref "field V50._upper (fldOffset=0x8)" P-INDEP
; V236 tmp217 [V236,T42] ( 2, 8 ) long -> rbx "field V53._lower (fldOffset=0x0)" P-INDEP
;* V237 tmp218 [V237 ] ( 0, 0 ) long -> zero-ref "field V53._upper (fldOffset=0x8)" P-INDEP
;* V238 tmp219 [V238 ] ( 0, 0 ) long -> zero-ref "field V54._lower (fldOffset=0x0)" P-INDEP
;* V239 tmp220 [V239 ] ( 0, 0 ) long -> zero-ref "field V54._upper (fldOffset=0x8)" P-INDEP
;* V240 tmp221 [V240 ] ( 0, 0 ) long -> zero-ref "field V56._lower (fldOffset=0x0)" P-INDEP
;* V241 tmp222 [V241 ] ( 0, 0 ) long -> zero-ref "field V56._upper (fldOffset=0x8)" P-INDEP
;* V242 tmp223 [V242 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V60.Item1 (fldOffset=0x0)" P-DEP
;* V243 tmp224 [V243 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V60.Item2 (fldOffset=0x8)" P-DEP
-; V244 tmp225 [V244,T26] ( 3, 12 ) long -> rax "field V61.Item1 (fldOffset=0x0)" P-INDEP
-; V245 tmp226 [V245,T43] ( 2, 8 ) long -> rdx "field V61.Item2 (fldOffset=0x8)" P-INDEP
+; V244 tmp225 [V244,T26] ( 3, 12 ) long -> rdx "field V61.Item1 (fldOffset=0x0)" P-INDEP
+; V245 tmp226 [V245,T43] ( 2, 8 ) long -> rbx "field V61.Item2 (fldOffset=0x8)" P-INDEP
;* V246 tmp227 [V246 ] ( 0, 0 ) long -> zero-ref "field V64._lower (fldOffset=0x0)" P-INDEP
;* V247 tmp228 [V247 ] ( 0, 0 ) long -> zero-ref "field V64._upper (fldOffset=0x8)" P-INDEP
;* V248 tmp229 [V248 ] ( 0, 0 ) long -> zero-ref "field V67._lower (fldOffset=0x0)" P-INDEP
-; V249 tmp230 [V249,T44] ( 2, 8 ) long -> rax "field V67._upper (fldOffset=0x8)" P-INDEP
+; V249 tmp230 [V249,T44] ( 2, 8 ) long -> rdx "field V67._upper (fldOffset=0x8)" P-INDEP
;* V250 tmp231 [V250 ] ( 0, 0 ) long -> zero-ref "field V69._lower (fldOffset=0x0)" P-INDEP
;* V251 tmp232 [V251 ] ( 0, 0 ) long -> zero-ref "field V69._upper (fldOffset=0x8)" P-INDEP
;* V252 tmp233 [V252 ] ( 0, 0 ) long -> zero-ref "field V72._lower (fldOffset=0x0)" P-INDEP
;* V253 tmp234 [V253 ] ( 0, 0 ) long -> zero-ref "field V72._upper (fldOffset=0x8)" P-INDEP
;* V254 tmp235 [V254 ] ( 0, 0 ) long -> zero-ref "field V74._lower (fldOffset=0x0)" P-INDEP
;* V255 tmp236 [V255 ] ( 0, 0 ) long -> zero-ref "field V74._upper (fldOffset=0x8)" P-INDEP
-; V256 tmp237 [V256,T45] ( 2, 8 ) long -> rax "field V77._lower (fldOffset=0x0)" P-INDEP
+; V256 tmp237 [V256,T45] ( 2, 8 ) long -> r15 "field V77._lower (fldOffset=0x0)" P-INDEP
;* V257 tmp238 [V257 ] ( 0, 0 ) long -> zero-ref "field V77._upper (fldOffset=0x8)" P-INDEP
;* V258 tmp239 [V258 ] ( 0, 0 ) long -> zero-ref "field V78._lower (fldOffset=0x0)" P-INDEP
;* V259 tmp240 [V259 ] ( 0, 0 ) long -> zero-ref "field V78._upper (fldOffset=0x8)" P-INDEP
;* V260 tmp241 [V260 ] ( 0, 0 ) long -> zero-ref "field V80._lower (fldOffset=0x0)" P-INDEP
;* V261 tmp242 [V261 ] ( 0, 0 ) long -> zero-ref "field V80._upper (fldOffset=0x8)" P-INDEP
;* V262 tmp243 [V262 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V84.Item1 (fldOffset=0x0)" P-DEP
;* V263 tmp244 [V263 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V84.Item2 (fldOffset=0x8)" P-DEP
-; V264 tmp245 [V264,T27] ( 3, 12 ) long -> rax "field V85.Item1 (fldOffset=0x0)" P-INDEP
-; V265 tmp246 [V265,T46] ( 2, 8 ) long -> rdx "field V85.Item2 (fldOffset=0x8)" P-INDEP
+; V264 tmp245 [V264,T27] ( 3, 12 ) long -> rdx "field V85.Item1 (fldOffset=0x0)" P-INDEP
+; V265 tmp246 [V265,T46] ( 2, 8 ) long -> r15 "field V85.Item2 (fldOffset=0x8)" P-INDEP
;* V266 tmp247 [V266 ] ( 0, 0 ) long -> zero-ref "field V88._lower (fldOffset=0x0)" P-INDEP
;* V267 tmp248 [V267 ] ( 0, 0 ) long -> zero-ref "field V88._upper (fldOffset=0x8)" P-INDEP
;* V268 tmp249 [V268 ] ( 0, 0 ) long -> zero-ref "field V91._lower (fldOffset=0x0)" P-INDEP
-; V269 tmp250 [V269,T47] ( 2, 8 ) long -> rax "field V91._upper (fldOffset=0x8)" P-INDEP
+; V269 tmp250 [V269,T47] ( 2, 8 ) long -> rdx "field V91._upper (fldOffset=0x8)" P-INDEP
;* V270 tmp251 [V270 ] ( 0, 0 ) long -> zero-ref "field V93._lower (fldOffset=0x0)" P-INDEP
;* V271 tmp252 [V271 ] ( 0, 0 ) long -> zero-ref "field V93._upper (fldOffset=0x8)" P-INDEP
;* V272 tmp253 [V272 ] ( 0, 0 ) long -> zero-ref "field V96._lower (fldOffset=0x0)" P-INDEP
;* V273 tmp254 [V273 ] ( 0, 0 ) long -> zero-ref "field V96._upper (fldOffset=0x8)" P-INDEP
;* V274 tmp255 [V274 ] ( 0, 0 ) long -> zero-ref "field V98._lower (fldOffset=0x0)" P-INDEP
;* V275 tmp256 [V275 ] ( 0, 0 ) long -> zero-ref "field V98._upper (fldOffset=0x8)" P-INDEP
-; V276 tmp257 [V276,T48] ( 2, 8 ) long -> rax "field V101._lower (fldOffset=0x0)" P-INDEP
+; V276 tmp257 [V276,T48] ( 2, 8 ) long -> r15 "field V101._lower (fldOffset=0x0)" P-INDEP
;* V277 tmp258 [V277 ] ( 0, 0 ) long -> zero-ref "field V101._upper (fldOffset=0x8)" P-INDEP
;* V278 tmp259 [V278 ] ( 0, 0 ) long -> zero-ref "field V102._lower (fldOffset=0x0)" P-INDEP
;* V279 tmp260 [V279 ] ( 0, 0 ) long -> zero-ref "field V102._upper (fldOffset=0x8)" P-INDEP
;* V280 tmp261 [V280 ] ( 0, 0 ) long -> zero-ref "field V104._lower (fldOffset=0x0)" P-INDEP
;* V281 tmp262 [V281 ] ( 0, 0 ) long -> zero-ref "field V104._upper (fldOffset=0x8)" P-INDEP
;* V282 tmp263 [V282 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V108.Item1 (fldOffset=0x0)" P-DEP
;* V283 tmp264 [V283 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V108.Item2 (fldOffset=0x8)" P-DEP
-; V284 tmp265 [V284,T28] ( 3, 12 ) long -> rax "field V109.Item1 (fldOffset=0x0)" P-INDEP
-; V285 tmp266 [V285,T49] ( 2, 8 ) long -> rdx "field V109.Item2 (fldOffset=0x8)" P-INDEP
+; V284 tmp265 [V284,T28] ( 3, 12 ) long -> rdx "field V109.Item1 (fldOffset=0x0)" P-INDEP
+; V285 tmp266 [V285,T49] ( 2, 8 ) long -> r15 "field V109.Item2 (fldOffset=0x8)" P-INDEP
;* V286 tmp267 [V286 ] ( 0, 0 ) long -> zero-ref "field V112._lower (fldOffset=0x0)" P-INDEP
;* V287 tmp268 [V287 ] ( 0, 0 ) long -> zero-ref "field V112._upper (fldOffset=0x8)" P-INDEP
;* V288 tmp269 [V288 ] ( 0, 0 ) long -> zero-ref "field V115._lower (fldOffset=0x0)" P-INDEP
-; V289 tmp270 [V289,T50] ( 2, 8 ) long -> rax "field V115._upper (fldOffset=0x8)" P-INDEP
+; V289 tmp270 [V289,T50] ( 2, 8 ) long -> rdx "field V115._upper (fldOffset=0x8)" P-INDEP
;* V290 tmp271 [V290 ] ( 0, 0 ) long -> zero-ref "field V117._lower (fldOffset=0x0)" P-INDEP
;* V291 tmp272 [V291 ] ( 0, 0 ) long -> zero-ref "field V117._upper (fldOffset=0x8)" P-INDEP
;* V292 tmp273 [V292 ] ( 0, 0 ) long -> zero-ref "field V120._lower (fldOffset=0x0)" P-INDEP
;* V293 tmp274 [V293 ] ( 0, 0 ) long -> zero-ref "field V120._upper (fldOffset=0x8)" P-INDEP
;* V294 tmp275 [V294 ] ( 0, 0 ) long -> zero-ref "field V122._lower (fldOffset=0x0)" P-INDEP
;* V295 tmp276 [V295 ] ( 0, 0 ) long -> zero-ref "field V122._upper (fldOffset=0x8)" P-INDEP
-; V296 tmp277 [V296,T51] ( 2, 8 ) long -> rax "field V125._lower (fldOffset=0x0)" P-INDEP
+; V296 tmp277 [V296,T51] ( 2, 8 ) long -> r15 "field V125._lower (fldOffset=0x0)" P-INDEP
;* V297 tmp278 [V297 ] ( 0, 0 ) long -> zero-ref "field V125._upper (fldOffset=0x8)" P-INDEP
;* V298 tmp279 [V298 ] ( 0, 0 ) long -> zero-ref "field V126._lower (fldOffset=0x0)" P-INDEP
;* V299 tmp280 [V299 ] ( 0, 0 ) long -> zero-ref "field V126._upper (fldOffset=0x8)" P-INDEP
;* V300 tmp281 [V300 ] ( 0, 0 ) long -> zero-ref "field V128._lower (fldOffset=0x0)" P-INDEP
;* V301 tmp282 [V301 ] ( 0, 0 ) long -> zero-ref "field V128._upper (fldOffset=0x8)" P-INDEP
;* V302 tmp283 [V302 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V132.Item1 (fldOffset=0x0)" P-DEP
;* V303 tmp284 [V303 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V132.Item2 (fldOffset=0x8)" P-DEP
-; V304 tmp285 [V304,T29] ( 3, 12 ) long -> rax "field V133.Item1 (fldOffset=0x0)" P-INDEP
-; V305 tmp286 [V305,T52] ( 2, 8 ) long -> rdx "field V133.Item2 (fldOffset=0x8)" P-INDEP
+; V304 tmp285 [V304,T29] ( 3, 12 ) long -> rdx "field V133.Item1 (fldOffset=0x0)" P-INDEP
+; V305 tmp286 [V305,T52] ( 2, 8 ) long -> r15 "field V133.Item2 (fldOffset=0x8)" P-INDEP
;* V306 tmp287 [V306 ] ( 0, 0 ) long -> zero-ref "field V136._lower (fldOffset=0x0)" P-INDEP
;* V307 tmp288 [V307 ] ( 0, 0 ) long -> zero-ref "field V136._upper (fldOffset=0x8)" P-INDEP
;* V308 tmp289 [V308 ] ( 0, 0 ) long -> zero-ref "field V139._lower (fldOffset=0x0)" P-INDEP
-; V309 tmp290 [V309,T53] ( 2, 8 ) long -> rax "field V139._upper (fldOffset=0x8)" P-INDEP
+; V309 tmp290 [V309,T53] ( 2, 8 ) long -> rdx "field V139._upper (fldOffset=0x8)" P-INDEP
;* V310 tmp291 [V310 ] ( 0, 0 ) long -> zero-ref "field V141._lower (fldOffset=0x0)" P-INDEP
;* V311 tmp292 [V311 ] ( 0, 0 ) long -> zero-ref "field V141._upper (fldOffset=0x8)" P-INDEP
;* V312 tmp293 [V312 ] ( 0, 0 ) long -> zero-ref "field V144._lower (fldOffset=0x0)" P-INDEP
;* V313 tmp294 [V313 ] ( 0, 0 ) long -> zero-ref "field V144._upper (fldOffset=0x8)" P-INDEP
;* V314 tmp295 [V314 ] ( 0, 0 ) long -> zero-ref "field V146._lower (fldOffset=0x0)" P-INDEP
;* V315 tmp296 [V315 ] ( 0, 0 ) long -> zero-ref "field V146._upper (fldOffset=0x8)" P-INDEP
; V316 tmp297 [V316,T32] ( 4, 8 ) long -> registers "field V149._lower (fldOffset=0x0)" P-INDEP
;* V317 tmp298 [V317 ] ( 0, 0 ) long -> zero-ref "field V149._upper (fldOffset=0x8)" P-INDEP
;* V318 tmp299 [V318 ] ( 0, 0 ) long -> zero-ref "field V150._lower (fldOffset=0x0)" P-INDEP
;* V319 tmp300 [V319 ] ( 0, 0 ) long -> zero-ref "field V150._upper (fldOffset=0x8)" P-INDEP
;* V320 tmp301 [V320 ] ( 0, 0 ) long -> zero-ref "field V152._lower (fldOffset=0x0)" P-INDEP
;* V321 tmp302 [V321 ] ( 0, 0 ) long -> zero-ref "field V152._upper (fldOffset=0x8)" P-INDEP
;* V322 tmp303 [V322 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V156.Item1 (fldOffset=0x0)" P-DEP
;* V323 tmp304 [V323 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V156.Item2 (fldOffset=0x8)" P-DEP
-; V324 tmp305 [V324,T21] ( 6, 12 ) long -> rax "field V157.Item1 (fldOffset=0x0)" P-INDEP
-; V325 tmp306 [V325,T33] ( 4, 8 ) long -> rdx "field V157.Item2 (fldOffset=0x8)" P-INDEP
+; V324 tmp305 [V324,T21] ( 6, 12 ) long -> registers "field V157.Item1 (fldOffset=0x0)" P-INDEP
+; V325 tmp306 [V325,T33] ( 4, 8 ) long -> registers "field V157.Item2 (fldOffset=0x8)" P-INDEP
;* V326 tmp307 [V326 ] ( 0, 0 ) long -> zero-ref "field V160._lower (fldOffset=0x0)" P-INDEP
;* V327 tmp308 [V327 ] ( 0, 0 ) long -> zero-ref "field V160._upper (fldOffset=0x8)" P-INDEP
;* V328 tmp309 [V328 ] ( 0, 0 ) long -> zero-ref "field V163._lower (fldOffset=0x0)" P-INDEP
-; V329 tmp310 [V329,T34] ( 4, 8 ) long -> rbx "field V163._upper (fldOffset=0x8)" P-INDEP
+; V329 tmp310 [V329,T34] ( 4, 8 ) long -> r10 "field V163._upper (fldOffset=0x8)" P-INDEP
;* V330 tmp311 [V330 ] ( 0, 0 ) long -> zero-ref "field V165._lower (fldOffset=0x0)" P-INDEP
;* V331 tmp312 [V331 ] ( 0, 0 ) long -> zero-ref "field V165._upper (fldOffset=0x8)" P-INDEP
;* V332 tmp313 [V332 ] ( 0, 0 ) long -> zero-ref "field V168._lower (fldOffset=0x0)" P-INDEP
;* V333 tmp314 [V333 ] ( 0, 0 ) long -> zero-ref "field V168._upper (fldOffset=0x8)" P-INDEP
;* V334 tmp315 [V334 ] ( 0, 0 ) long -> zero-ref "field V170._lower (fldOffset=0x0)" P-INDEP
;* V335 tmp316 [V335 ] ( 0, 0 ) long -> zero-ref "field V170._upper (fldOffset=0x8)" P-INDEP
-; V336 cse0 [V336,T12] ( 4, 16 ) long -> r15 "CSE #03: moderate"
-; V337 cse1 [V337,T13] ( 4, 16 ) long -> r15 "CSE #05: moderate"
-; V338 cse2 [V338,T14] ( 4, 16 ) long -> r15 "CSE #07: moderate"
-; V339 cse3 [V339,T15] ( 4, 16 ) int -> rbx "CSE #02: moderate"
-; V340 cse4 [V340,T16] ( 4, 16 ) int -> rbx "CSE #04: moderate"
-; V341 cse5 [V341,T17] ( 4, 16 ) int -> rbx "CSE #06: moderate"
+; V336 cse0 [V336,T12] ( 4, 16 ) long -> rbx "CSE #03: moderate"
+; V337 cse1 [V337,T13] ( 4, 16 ) long -> rbx "CSE #05: moderate"
+; V338 cse2 [V338,T14] ( 4, 16 ) long -> rbx "CSE #07: moderate"
+; V339 cse3 [V339,T15] ( 4, 16 ) int -> r11 "CSE #02: moderate"
+; V340 cse4 [V340,T16] ( 4, 16 ) int -> r11 "CSE #04: moderate"
+; V341 cse5 [V341,T17] ( 4, 16 ) int -> r11 "CSE #06: moderate"
; V342 cse6 [V342,T18] ( 4, 16 ) long -> r11 "CSE #01: moderate"
; V343 cse7 [V343,T19] ( 4, 15.84) long -> rsi "CSE #08: moderate"
;
-; Lcl frame size = 16
+; Lcl frame size = 8
G_M64471_IG01:
push rbp
push r15
+ push r14
push rbx
- sub rsp, 16
+ push rax
lea rbp, [rsp+0x20]
- ;; size=13 bbWeight=1 PerfScore 3.75
+ ;; size=12 bbWeight=1 PerfScore 5.50
G_M64471_IG02:
- mov r9d, ecx
+ mov eax, ecx
+ xor r9d, r9d
xor r10d, r10d
- xor eax, eax
- mov qword ptr [rbp-0x18], rax
cmp ecx, 3
jg SHORT G_M64471_IG05
- ;; size=17 bbWeight=1 PerfScore 3.00
+ ;; size=13 bbWeight=1 PerfScore 2.00
G_M64471_IG03:
mov bword ptr [rbp-0x20], rdx
- mov rbx, qword ptr [rbp-0x18]
jmp G_M64471_IG07
align [0 bytes for IG09]
- ;; size=13 bbWeight=0.50 PerfScore 2.00
+ ;; size=9 bbWeight=0.50 PerfScore 1.50
G_M64471_IG04:
- mov qword ptr [rbp-0x18], rbx
mov rdx, bword ptr [rbp-0x20]
- ;; size=8 bbWeight=2 PerfScore 4.00
+ ;; size=4 bbWeight=2 PerfScore 2.00
G_M64471_IG05:
- cmp r10d, r9d
+ cmp r9d, eax
jae G_M64471_IG13
- mov r11d, r10d
+ mov r11d, r9d
mov bword ptr [rbp-0x20], rdx
mov rbx, qword ptr [rdx+8*r11]
- mov rax, r8
- mul rdx:rax, rbx
- mov rbx, qword ptr [rbp-0x18]
- add rbx, rax
- cmp rbx, rax
- setb al
- movzx rax, al
- add rax, rdx
- cmp r10d, esi
+ mov rdx, r8
+ mulx rbx, rdx, rbx
+ add r10, rdx
+ cmp r10, rdx
+ setb dl
+ movzx rdx, dl
+ add rdx, rbx
+ cmp r9d, esi
jae G_M64471_IG13
- mov rdx, qword ptr [rdi+8*r11]
- mov r15, rdx
- sub r15, rbx
+ mov rbx, qword ptr [rdi+8*r11]
+ mov r15, rbx
+ sub r15, r10
mov qword ptr [rdi+8*r11], r15
- cmp rdx, rbx
+ cmp rbx, r10
+ setb r10b
+ movzx r10, r10b
+ add r10, rdx
+ lea r11d, [r9+0x01]
+ cmp r11d, eax
+ jae G_M64471_IG13
+ mov ebx, r11d
+ mov rdx, bword ptr [rbp-0x20]
+ mov r15, qword ptr [rdx+8*rbx]
+ mov rdx, r8
+ mulx r15, rdx, r15
+ add r10, rdx
+ cmp r10, rdx
setb dl
movzx rdx, dl
- mov r11d, edx
- add r11, rax
- lea ebx, [r10+0x01]
- cmp ebx, r9d
+ add rdx, r15
+ cmp r11d, esi
jae G_M64471_IG13
- mov r15d, ebx
+ mov r11, qword ptr [rdi+8*rbx]
+ mov r15, r11
+ sub r15, r10
+ mov qword ptr [rdi+8*rbx], r15
+ cmp r11, r10
+ setb r10b
+ movzx r10, r10b
+ add r10, rdx
+ lea r11d, [r9+0x02]
+ cmp r11d, eax
+ jae G_M64471_IG13
+ mov ebx, r11d
mov rdx, bword ptr [rbp-0x20]
- mov rax, qword ptr [rdx+8*r15]
- mul rdx:rax, r8
- add r11, rax
- cmp r11, rax
- setb al
- movzx rax, al
- add rax, rdx
- cmp ebx, esi
- jae G_M64471_IG13
- mov rdx, qword ptr [rdi+8*r15]
- mov rbx, rdx
- sub rbx, r11
- mov qword ptr [rdi+8*r15], rbx
- cmp rdx, r11
+ mov r15, qword ptr [rdx+8*rbx]
+ mov rdx, r8
+ mulx r15, rdx, r15
+ add r10, rdx
+ cmp r10, rdx
setb dl
movzx rdx, dl
- mov r11d, edx
- add r11, rax
- lea ebx, [r10+0x02]
- cmp ebx, r9d
+ add rdx, r15
+ cmp r11d, esi
jae G_M64471_IG13
- mov r15d, ebx
- mov rdx, bword ptr [rbp-0x20]
- mov rax, qword ptr [rdx+8*r15]
- mul rdx:rax, r8
- add r11, rax
- cmp r11, rax
- setb al
- movzx rax, al
- add rax, rdx
- cmp ebx, esi
- jae G_M64471_IG13
- mov rdx, qword ptr [rdi+8*r15]
- mov rbx, rdx
- sub rbx, r11
- mov qword ptr [rdi+8*r15], rbx
- cmp rdx, r11
- ;; size=229 bbWeight=4 PerfScore 187.00
+ mov r11, qword ptr [rdi+8*rbx]
+ mov r15, r11
+ sub r15, r10
+ mov qword ptr [rdi+8*rbx], r15
+ cmp r11, r10
+ ;; size=237 bbWeight=4 PerfScore 183.00
G_M64471_IG06:
- setb dl
- movzx rdx, dl
- mov r11d, edx
- add r11, rax
- lea ebx, [r10+0x03]
- cmp ebx, r9d
+ setb r10b
+ movzx r10, r10b
+ add r10, rdx
+ lea r11d, [r9+0x03]
+ cmp r11d, eax
jae G_M64471_IG13
- mov r15d, ebx
+ mov ebx, r11d
mov rdx, bword ptr [rbp-0x20]
- mov rax, qword ptr [rdx+8*r15]
- mul rdx:rax, r8
- add r11, rax
- cmp r11, rax
- setb al
- movzx rax, al
- add rax, rdx
- cmp ebx, esi
- jae G_M64471_IG13
- mov rdx, qword ptr [rdi+8*r15]
- mov rbx, rdx
- sub rbx, r11
- mov qword ptr [rdi+8*r15], rbx
- cmp rdx, r11
+ mov r15, qword ptr [rdx+8*rbx]
+ mov rdx, r8
+ mulx r15, rdx, r15
+ add r10, rdx
+ cmp r10, rdx
setb dl
movzx rdx, dl
- mov ebx, edx
- add rbx, rax
- add r10d, 4
- lea eax, [r10+0x03]
- cmp eax, ecx
+ add rdx, r15
+ cmp r11d, esi
+ jae G_M64471_IG13
+ mov r11, qword ptr [rdi+8*rbx]
+ mov r15, r11
+ sub r15, r10
+ mov qword ptr [rdi+8*rbx], r15
+ cmp r11, r10
+ setb r10b
+ movzx r10, r10b
+ add r10, rdx
+ add r9d, 4
+ lea edx, [r9+0x03]
+ cmp edx, ecx
jl G_M64471_IG04
- ;; size=106 bbWeight=4 PerfScore 76.00
+ ;; size=111 bbWeight=4 PerfScore 75.00
G_M64471_IG07:
- cmp r10d, ecx
+ cmp r9d, ecx
jge SHORT G_M64471_IG10
;; size=5 bbWeight=0.50 PerfScore 0.62
G_M64471_IG08:
- test r10d, r10d
+ test r9d, r9d
jl SHORT G_M64471_IG12
cmp ecx, esi
jg SHORT G_M64471_IG12
;; size=9 bbWeight=0.25 PerfScore 0.62
G_M64471_IG09:
- mov esi, r10d
+ mov esi, r9d
mov rdx, bword ptr [rbp-0x20]
mov rcx, qword ptr [rdx+8*rsi]
- mov rax, r8
- mul rdx:rax, rcx
- lea r11, [rax+rbx]
- cmp r11, rax
- setb cl
- movzx rcx, cl
- mov ebx, ecx
- add rbx, rdx
- mov rcx, qword ptr [rdi+8*rsi]
- mov rax, rcx
- sub rax, r11
- mov qword ptr [rdi+8*rsi], rax
- cmp rcx, r11
- setb al
- movzx rax, al
- add rbx, rax
- inc r10d
- cmp r10d, r9d
+ mov rdx, r8
+ mulx r11, rcx, rcx
+ lea rbx, [rcx+r10]
+ cmp rbx, rcx
+ setb r10b
+ movzx r10, r10b
+ add r10, r11
+ mov r15, qword ptr [rdi+8*rsi]
+ mov rdx, r15
+ sub rdx, rbx
+ mov qword ptr [rdi+8*rsi], rdx
+ cmp r15, rbx
+ setb dl
+ movzx rdx, dl
+ add r10, rdx
+ inc r9d
+ cmp r9d, eax
jl SHORT G_M64471_IG09
- ;; size=69 bbWeight=3.96 PerfScore 58.41
+ ;; size=71 bbWeight=3.96 PerfScore 57.42
G_M64471_IG10:
- mov rax, rbx
+ mov rax, r10
;; size=3 bbWeight=1 PerfScore 0.25
G_M64471_IG11:
- add rsp, 16
+ add rsp, 8
pop rbx
+ pop r14
pop r15
pop rbp
ret
- ;; size=9 bbWeight=1 PerfScore 2.75
+ ;; size=11 bbWeight=1 PerfScore 3.25
G_M64471_IG12:
- cmp r10d, r9d
+ cmp r9d, eax
jae SHORT G_M64471_IG13
- mov eax, r10d
- mov rdx, bword ptr [rbp-0x20]
- mov rax, qword ptr [rdx+8*rax]
- mul rdx:rax, r8
- lea r11, [rax+rbx]
- cmp r11, rax
- setb al
- movzx rax, al
- mov ebx, eax
- add rbx, rdx
- cmp r10d, esi
+ mov edx, r9d
+ mov r11, bword ptr [rbp-0x20]
+ mov rdx, qword ptr [r11+8*rdx]
+ mulx rbx, rdx, r8
+ mov r15, rbx
+ lea rbx, [rdx+r10]
+ cmp rbx, rdx
+ setb r10b
+ movzx r10, r10b
+ add r10, r15
+ cmp r9d, esi
jae SHORT G_M64471_IG13
- mov eax, r10d
- mov rax, qword ptr [rdi+8*rax]
- mov edx, r10d
- mov r15, rax
- sub r15, r11
- mov qword ptr [rdi+8*rdx], r15
- cmp rax, r11
- setb al
- movzx rax, al
- add rbx, rax
- inc r10d
- cmp r10d, ecx
+ mov edx, r9d
+ mov r15, qword ptr [rdi+8*rdx]
+ mov edx, r9d
+ mov r14, r15
+ sub r14, rbx
+ mov qword ptr [rdi+8*rdx], r14
+ cmp r15, rbx
+ setb dl
+ movzx rdx, dl
+ add r10, rdx
+ inc r9d
+ cmp r9d, ecx
+ mov bword ptr [rbp-0x20], r11
jl SHORT G_M64471_IG12
jmp SHORT G_M64471_IG10
- ;; size=84 bbWeight=0.04 PerfScore 0.78
+ ;; size=93 bbWeight=0.04 PerfScore 0.82
G_M64471_IG13:
call CORINFO_HELP_RNGCHKFAIL
int3
;; size=6 bbWeight=0 PerfScore 0.00
-; Total bytes of code 571, prolog size 13, PerfScore 339.19, instruction count 178, allocated bytes for code 571 (MethodHash=b1050428) for method System.Numerics.BigIntegerCalculator:SubMul1(System.Span`1[nuint],System.ReadOnlySpan`1[nuint],nuint):nuint (FullOpts)
+; Total bytes of code 584, prolog size 12, PerfScore 331.99, instruction count 175, allocated bytes for code 584 (MethodHash=b1050428) for method System.Numerics.BigIntegerCalculator:SubMul1(System.Span`1[nuint],System.ReadOnlySpan`1[nuint],nuint):nuint (FullOpts)
; ============================================================
```
13 (2.28 % of base) - System.Numerics.BigIntegerCalculator:SubMul1(System.Span`1[nuint],System.ReadOnlySpan`1[nuint],nuint):nuint
```diff
; Assembly listing for method System.Numerics.BigIntegerCalculator:SubMul1(System.Span`1[nuint],System.ReadOnlySpan`1[nuint],nuint):nuint (FullOpts)
; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
; FullOpts code
; optimized code
; rbp based frame
; fully interruptible
; No PGO data
; 0 inlinees with PGO data; 76 single block inlinees; 10 inlinees without PGO data
; Final local variable assignments
;
;* V00 arg0 [V00 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op single-def
;* V01 arg1 [V01 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op single-def
; V02 arg2 [V02,T02] ( 8, 22 ) long -> r8 single-def
-; V03 loc0 [V03,T04] ( 7, 21 ) int -> r9
-; V04 loc1 [V04,T00] ( 24, 53.91) int -> r10
-; V05 loc2 [V05,T06] ( 8, 18 ) long -> [rbp-0x18]
+; V03 loc0 [V03,T04] ( 7, 21 ) int -> rax
+; V04 loc1 [V04,T00] ( 24, 53.91) int -> r9
+; V05 loc2 [V05,T06] ( 8, 18 ) long -> r10
;* V06 loc3 [V06 ] ( 0, 0 ) long -> zero-ref
-; V07 loc4 [V07,T35] ( 2, 8 ) long -> r11
-; V08 loc5 [V08,T22] ( 3, 12 ) long -> rdx
+; V07 loc4 [V07,T35] ( 2, 8 ) long -> r10
+; V08 loc5 [V08,T22] ( 3, 12 ) long -> rbx
;* V09 loc6 [V09 ] ( 0, 0 ) long -> zero-ref
-; V10 loc7 [V10,T36] ( 2, 8 ) long -> r11
-; V11 loc8 [V11,T23] ( 3, 12 ) long -> rdx
+; V10 loc7 [V10,T36] ( 2, 8 ) long -> r10
+; V11 loc8 [V11,T23] ( 3, 12 ) long -> r11
;* V12 loc9 [V12 ] ( 0, 0 ) long -> zero-ref
-; V13 loc10 [V13,T37] ( 2, 8 ) long -> r11
-; V14 loc11 [V14,T24] ( 3, 12 ) long -> rdx
+; V13 loc10 [V13,T37] ( 2, 8 ) long -> r10
+; V14 loc11 [V14,T24] ( 3, 12 ) long -> r11
;* V15 loc12 [V15 ] ( 0, 0 ) long -> zero-ref
-; V16 loc13 [V16,T25] ( 3, 12 ) long -> rdx
+; V16 loc13 [V16,T25] ( 3, 12 ) long -> r11
;* V17 loc14 [V17 ] ( 0, 0 ) long -> zero-ref
-; V18 loc15 [V18,T20] ( 6, 12 ) long -> registers
+; V18 loc15 [V18,T20] ( 6, 12 ) long -> r15
;* V19 loc16 [V19 ] ( 0, 0 ) int -> zero-ref
;* V20 loc17 [V20 ] ( 0, 0 ) int -> zero-ref
;# V21 OutArgs [V21 ] ( 1, 1 ) struct ( 0) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V22 tmp1 [V22 ] ( 0, 0 ) long -> zero-ref "dup spill"
;* V23 tmp2 [V23 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V24 tmp3 [V24 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V25 tmp4 [V25 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V26 tmp5 [V26 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V27 tmp6 [V27 ] ( 0, 0 ) struct (16) zero-ref "dup spill"
;* V28 tmp7 [V28 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V29 tmp8 [V29 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V30 tmp9 [V30 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V31 tmp10 [V31 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V32 tmp11 [V32 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V33 tmp12 [V33 ] ( 0, 0 ) struct (16) zero-ref "dup spill"
;* V34 tmp13 [V34 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V35 tmp14 [V35 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V36 tmp15 [V36 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V37 tmp16 [V37 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V38 tmp17 [V38 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V39 tmp18 [V39 ] ( 0, 0 ) struct (16) zero-ref "dup spill"
;* V40 tmp19 [V40 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V41 tmp20 [V41 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V42 tmp21 [V42 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V43 tmp22 [V43 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V44 tmp23 [V44 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V45 tmp24 [V45 ] ( 0, 0 ) struct (16) zero-ref "dup spill"
;* V46 tmp25 [V46 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V47 tmp26 [V47 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V48 tmp27 [V48 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V49 tmp28 [V49 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V50 tmp29 [V50 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V51 tmp30 [V51 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V52 tmp31 [V52 ] ( 0, 0 ) struct (16) zero-ref "dup spill"
;* V53 tmp32 [V53 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V54 tmp33 [V54 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V55 tmp34 [V55 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V56 tmp35 [V56 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V57 tmp36 [V57 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V58 tmp37 [V58 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V59 tmp38 [V59 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V60 tmp39 [V60 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V61 tmp40 [V61 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V62 tmp41 [V62 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V63 tmp42 [V63 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V64 tmp43 [V64 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V65 tmp44 [V65 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V66 tmp45 [V66 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V67 tmp46 [V67 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
-; V68 tmp47 [V68,T08] ( 4, 16 ) long -> rbx "Inline stloc first use temp"
-; V69 tmp48 [V69,T38] ( 2, 8 ) long -> rax "Inline stloc first use temp"
+; V68 tmp47 [V68,T08] ( 4, 16 ) long -> r10 "Inline stloc first use temp"
+; V69 tmp48 [V69,T38] ( 2, 8 ) long -> rdx "Inline stloc first use temp"
;* V70 tmp49 [V70 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V71 tmp50 [V71 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V72 tmp51 [V72 ] ( 0, 0 ) struct (16) zero-ref "Inline return value spill temp"
;* V73 tmp52 [V73 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V74 tmp53 [V74 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V75 tmp54 [V75 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V76 tmp55 [V76 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V77 tmp56 [V77 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V78 tmp57 [V78 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V79 tmp58 [V79 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V80 tmp59 [V80 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V81 tmp60 [V81 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V82 tmp61 [V82 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V83 tmp62 [V83 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V84 tmp63 [V84 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V85 tmp64 [V85 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V86 tmp65 [V86 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V87 tmp66 [V87 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V88 tmp67 [V88 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V89 tmp68 [V89 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V90 tmp69 [V90 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V91 tmp70 [V91 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
-; V92 tmp71 [V92,T09] ( 4, 16 ) long -> r11 "Inline stloc first use temp"
-; V93 tmp72 [V93,T39] ( 2, 8 ) long -> rax "Inline stloc first use temp"
+; V92 tmp71 [V92,T09] ( 4, 16 ) long -> r10 "Inline stloc first use temp"
+; V93 tmp72 [V93,T39] ( 2, 8 ) long -> rdx "Inline stloc first use temp"
;* V94 tmp73 [V94 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V95 tmp74 [V95 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V96 tmp75 [V96 ] ( 0, 0 ) struct (16) zero-ref "Inline return value spill temp"
;* V97 tmp76 [V97 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V98 tmp77 [V98 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V99 tmp78 [V99 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V100 tmp79 [V100 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V101 tmp80 [V101 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V102 tmp81 [V102 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V103 tmp82 [V103 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V104 tmp83 [V104 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V105 tmp84 [V105 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V106 tmp85 [V106 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V107 tmp86 [V107 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V108 tmp87 [V108 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V109 tmp88 [V109 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V110 tmp89 [V110 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V111 tmp90 [V111 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V112 tmp91 [V112 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V113 tmp92 [V113 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V114 tmp93 [V114 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V115 tmp94 [V115 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
-; V116 tmp95 [V116,T10] ( 4, 16 ) long -> r11 "Inline stloc first use temp"
-; V117 tmp96 [V117,T40] ( 2, 8 ) long -> rax "Inline stloc first use temp"
+; V116 tmp95 [V116,T10] ( 4, 16 ) long -> r10 "Inline stloc first use temp"
+; V117 tmp96 [V117,T40] ( 2, 8 ) long -> rdx "Inline stloc first use temp"
;* V118 tmp97 [V118 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V119 tmp98 [V119 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V120 tmp99 [V120 ] ( 0, 0 ) struct (16) zero-ref "Inline return value spill temp"
;* V121 tmp100 [V121 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V122 tmp101 [V122 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V123 tmp102 [V123 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V124 tmp103 [V124 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V125 tmp104 [V125 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V126 tmp105 [V126 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V127 tmp106 [V127 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V128 tmp107 [V128 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V129 tmp108 [V129 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V130 tmp109 [V130 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V131 tmp110 [V131 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V132 tmp111 [V132 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V133 tmp112 [V133 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V134 tmp113 [V134 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V135 tmp114 [V135 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V136 tmp115 [V136 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V137 tmp116 [V137 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V138 tmp117 [V138 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V139 tmp118 [V139 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
-; V140 tmp119 [V140,T11] ( 4, 16 ) long -> r11 "Inline stloc first use temp"
-; V141 tmp120 [V141,T41] ( 2, 8 ) long -> rax "Inline stloc first use temp"
+; V140 tmp119 [V140,T11] ( 4, 16 ) long -> r10 "Inline stloc first use temp"
+; V141 tmp120 [V141,T41] ( 2, 8 ) long -> rdx "Inline stloc first use temp"
;* V142 tmp121 [V142 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V143 tmp122 [V143 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V144 tmp123 [V144 ] ( 0, 0 ) struct (16) zero-ref "Inline return value spill temp"
;* V145 tmp124 [V145 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V146 tmp125 [V146 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V147 tmp126 [V147 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V148 tmp127 [V148 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V149 tmp128 [V149 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V150 tmp129 [V150 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V151 tmp130 [V151 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V152 tmp131 [V152 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V153 tmp132 [V153 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V154 tmp133 [V154 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V155 tmp134 [V155 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V156 tmp135 [V156 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V157 tmp136 [V157 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V158 tmp137 [V158 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V159 tmp138 [V159 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V160 tmp139 [V160 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V161 tmp140 [V161 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V162 tmp141 [V162 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V163 tmp142 [V163 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
-; V164 tmp143 [V164,T07] ( 8, 16 ) long -> r11 "Inline stloc first use temp"
-; V165 tmp144 [V165,T31] ( 4, 8 ) long -> rbx "Inline stloc first use temp"
+; V164 tmp143 [V164,T07] ( 8, 16 ) long -> rbx "Inline stloc first use temp"
+; V165 tmp144 [V165,T31] ( 4, 8 ) long -> r10 "Inline stloc first use temp"
;* V166 tmp145 [V166 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V167 tmp146 [V167 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V168 tmp147 [V168 ] ( 0, 0 ) struct (16) zero-ref "Inline return value spill temp"
;* V169 tmp148 [V169 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V170 tmp149 [V170 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V171 tmp150 [V171 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V172 tmp151 [V172 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V173 tmp152 [V173 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V174 tmp153 [V174 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
; V175 tmp154 [V175,T01] ( 13, 41 ) byref -> rdi single-def "field V00._reference (fldOffset=0x0)" P-INDEP
; V176 tmp155 [V176,T05] ( 7, 17.29) int -> rsi single-def "field V00._length (fldOffset=0x8)" P-INDEP
; V177 tmp156 [V177,T03] ( 7, 21 ) byref -> [rbp-0x20] single-def "field V01._reference (fldOffset=0x0)" P-INDEP
; V178 tmp157 [V178,T30] ( 7, 7.79) int -> rcx single-def "field V01._length (fldOffset=0x8)" P-INDEP
;* V179 tmp158 [V179 ] ( 0, 0 ) long -> zero-ref "field V23._lower (fldOffset=0x0)" P-INDEP
;* V180 tmp159 [V180 ] ( 0, 0 ) long -> zero-ref "field V23._upper (fldOffset=0x8)" P-INDEP
;* V181 tmp160 [V181 ] ( 0, 0 ) long -> zero-ref "field V24._lower (fldOffset=0x0)" P-INDEP
;* V182 tmp161 [V182 ] ( 0, 0 ) long -> zero-ref "field V24._upper (fldOffset=0x8)" P-INDEP
;* V183 tmp162 [V183 ] ( 0, 0 ) long -> zero-ref "field V25._lower (fldOffset=0x0)" P-INDEP
;* V184 tmp163 [V184 ] ( 0, 0 ) long -> zero-ref "field V25._upper (fldOffset=0x8)" P-INDEP
;* V185 tmp164 [V185 ] ( 0, 0 ) long -> zero-ref "field V26._lower (fldOffset=0x0)" P-INDEP
;* V186 tmp165 [V186 ] ( 0, 0 ) long -> zero-ref "field V26._upper (fldOffset=0x8)" P-INDEP
;* V187 tmp166 [V187 ] ( 0, 0 ) long -> zero-ref "field V27._lower (fldOffset=0x0)" P-INDEP
;* V188 tmp167 [V188 ] ( 0, 0 ) long -> zero-ref "field V27._upper (fldOffset=0x8)" P-INDEP
;* V189 tmp168 [V189 ] ( 0, 0 ) long -> zero-ref "field V28._lower (fldOffset=0x0)" P-INDEP
;* V190 tmp169 [V190 ] ( 0, 0 ) long -> zero-ref "field V28._upper (fldOffset=0x8)" P-INDEP
;* V191 tmp170 [V191 ] ( 0, 0 ) long -> zero-ref "field V29._lower (fldOffset=0x0)" P-INDEP
;* V192 tmp171 [V192 ] ( 0, 0 ) long -> zero-ref "field V29._upper (fldOffset=0x8)" P-INDEP
;* V193 tmp172 [V193 ] ( 0, 0 ) long -> zero-ref "field V30._lower (fldOffset=0x0)" P-INDEP
;* V194 tmp173 [V194 ] ( 0, 0 ) long -> zero-ref "field V30._upper (fldOffset=0x8)" P-INDEP
;* V195 tmp174 [V195 ] ( 0, 0 ) long -> zero-ref "field V31._lower (fldOffset=0x0)" P-INDEP
;* V196 tmp175 [V196 ] ( 0, 0 ) long -> zero-ref "field V31._upper (fldOffset=0x8)" P-INDEP
;* V197 tmp176 [V197 ] ( 0, 0 ) long -> zero-ref "field V32._lower (fldOffset=0x0)" P-INDEP
;* V198 tmp177 [V198 ] ( 0, 0 ) long -> zero-ref "field V32._upper (fldOffset=0x8)" P-INDEP
;* V199 tmp178 [V199 ] ( 0, 0 ) long -> zero-ref "field V33._lower (fldOffset=0x0)" P-INDEP
;* V200 tmp179 [V200 ] ( 0, 0 ) long -> zero-ref "field V33._upper (fldOffset=0x8)" P-INDEP
;* V201 tmp180 [V201 ] ( 0, 0 ) long -> zero-ref "field V34._lower (fldOffset=0x0)" P-INDEP
;* V202 tmp181 [V202 ] ( 0, 0 ) long -> zero-ref "field V34._upper (fldOffset=0x8)" P-INDEP
;* V203 tmp182 [V203 ] ( 0, 0 ) long -> zero-ref "field V35._lower (fldOffset=0x0)" P-INDEP
;* V204 tmp183 [V204 ] ( 0, 0 ) long -> zero-ref "field V35._upper (fldOffset=0x8)" P-INDEP
;* V205 tmp184 [V205 ] ( 0, 0 ) long -> zero-ref "field V36._lower (fldOffset=0x0)" P-INDEP
;* V206 tmp185 [V206 ] ( 0, 0 ) long -> zero-ref "field V36._upper (fldOffset=0x8)" P-INDEP
;* V207 tmp186 [V207 ] ( 0, 0 ) long -> zero-ref "field V37._lower (fldOffset=0x0)" P-INDEP
;* V208 tmp187 [V208 ] ( 0, 0 ) long -> zero-ref "field V37._upper (fldOffset=0x8)" P-INDEP
;* V209 tmp188 [V209 ] ( 0, 0 ) long -> zero-ref "field V38._lower (fldOffset=0x0)" P-INDEP
;* V210 tmp189 [V210 ] ( 0, 0 ) long -> zero-ref "field V38._upper (fldOffset=0x8)" P-INDEP
;* V211 tmp190 [V211 ] ( 0, 0 ) long -> zero-ref "field V39._lower (fldOffset=0x0)" P-INDEP
;* V212 tmp191 [V212 ] ( 0, 0 ) long -> zero-ref "field V39._upper (fldOffset=0x8)" P-INDEP
;* V213 tmp192 [V213 ] ( 0, 0 ) long -> zero-ref "field V40._lower (fldOffset=0x0)" P-INDEP
;* V214 tmp193 [V214 ] ( 0, 0 ) long -> zero-ref "field V40._upper (fldOffset=0x8)" P-INDEP
;* V215 tmp194 [V215 ] ( 0, 0 ) long -> zero-ref "field V41._lower (fldOffset=0x0)" P-INDEP
;* V216 tmp195 [V216 ] ( 0, 0 ) long -> zero-ref "field V41._upper (fldOffset=0x8)" P-INDEP
;* V217 tmp196 [V217 ] ( 0, 0 ) long -> zero-ref "field V42._lower (fldOffset=0x0)" P-INDEP
;* V218 tmp197 [V218 ] ( 0, 0 ) long -> zero-ref "field V42._upper (fldOffset=0x8)" P-INDEP
;* V219 tmp198 [V219 ] ( 0, 0 ) long -> zero-ref "field V43._lower (fldOffset=0x0)" P-INDEP
;* V220 tmp199 [V220 ] ( 0, 0 ) long -> zero-ref "field V43._upper (fldOffset=0x8)" P-INDEP
;* V221 tmp200 [V221 ] ( 0, 0 ) long -> zero-ref "field V44._lower (fldOffset=0x0)" P-INDEP
;* V222 tmp201 [V222 ] ( 0, 0 ) long -> zero-ref "field V44._upper (fldOffset=0x8)" P-INDEP
;* V223 tmp202 [V223 ] ( 0, 0 ) long -> zero-ref "field V45._lower (fldOffset=0x0)" P-INDEP
;* V224 tmp203 [V224 ] ( 0, 0 ) long -> zero-ref "field V45._upper (fldOffset=0x8)" P-INDEP
;* V225 tmp204 [V225 ] ( 0, 0 ) long -> zero-ref "field V46._lower (fldOffset=0x0)" P-INDEP
;* V226 tmp205 [V226 ] ( 0, 0 ) long -> zero-ref "field V46._upper (fldOffset=0x8)" P-INDEP
;* V227 tmp206 [V227 ] ( 0, 0 ) long -> zero-ref "field V48._lower (fldOffset=0x0)" P-INDEP
;* V228 tmp207 [V228 ] ( 0, 0 ) long -> zero-ref "field V48._upper (fldOffset=0x8)" P-INDEP
;* V229 tmp208 [V229 ] ( 0, 0 ) long -> zero-ref "field V49._lower (fldOffset=0x0)" P-INDEP
;* V230 tmp209 [V230 ] ( 0, 0 ) long -> zero-ref "field V49._upper (fldOffset=0x8)" P-INDEP
;* V231 tmp210 [V231 ] ( 0, 0 ) long -> zero-ref "field V50._lower (fldOffset=0x0)" P-INDEP
;* V232 tmp211 [V232 ] ( 0, 0 ) long -> zero-ref "field V50._upper (fldOffset=0x8)" P-INDEP
;* V233 tmp212 [V233 ] ( 0, 0 ) long -> zero-ref "field V51._lower (fldOffset=0x0)" P-INDEP
;* V234 tmp213 [V234 ] ( 0, 0 ) long -> zero-ref "field V51._upper (fldOffset=0x8)" P-INDEP
;* V235 tmp214 [V235 ] ( 0, 0 ) long -> zero-ref "field V52._lower (fldOffset=0x0)" P-INDEP
;* V236 tmp215 [V236 ] ( 0, 0 ) long -> zero-ref "field V52._upper (fldOffset=0x8)" P-INDEP
;* V237 tmp216 [V237 ] ( 0, 0 ) long -> zero-ref "field V53._lower (fldOffset=0x0)" P-INDEP
;* V238 tmp217 [V238 ] ( 0, 0 ) long -> zero-ref "field V53._upper (fldOffset=0x8)" P-INDEP
; V239 tmp218 [V239,T42] ( 2, 8 ) long -> rbx "field V56._lower (fldOffset=0x0)" P-INDEP
;* V240 tmp219 [V240 ] ( 0, 0 ) long -> zero-ref "field V56._upper (fldOffset=0x8)" P-INDEP
;* V241 tmp220 [V241 ] ( 0, 0 ) long -> zero-ref "field V57._lower (fldOffset=0x0)" P-INDEP
;* V242 tmp221 [V242 ] ( 0, 0 ) long -> zero-ref "field V57._upper (fldOffset=0x8)" P-INDEP
;* V243 tmp222 [V243 ] ( 0, 0 ) long -> zero-ref "field V59._lower (fldOffset=0x0)" P-INDEP
;* V244 tmp223 [V244 ] ( 0, 0 ) long -> zero-ref "field V59._upper (fldOffset=0x8)" P-INDEP
;* V245 tmp224 [V245 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V63.Item1 (fldOffset=0x0)" P-DEP
;* V246 tmp225 [V246 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V63.Item2 (fldOffset=0x8)" P-DEP
-; V247 tmp226 [V247,T26] ( 3, 12 ) long -> rax "field V64.Item1 (fldOffset=0x0)" P-INDEP
-; V248 tmp227 [V248,T43] ( 2, 8 ) long -> rdx "field V64.Item2 (fldOffset=0x8)" P-INDEP
+; V247 tmp226 [V247,T26] ( 3, 12 ) long -> rdx "field V64.Item1 (fldOffset=0x0)" P-INDEP
+; V248 tmp227 [V248,T43] ( 2, 8 ) long -> rbx "field V64.Item2 (fldOffset=0x8)" P-INDEP
;* V249 tmp228 [V249 ] ( 0, 0 ) long -> zero-ref "field V67._lower (fldOffset=0x0)" P-INDEP
;* V250 tmp229 [V250 ] ( 0, 0 ) long -> zero-ref "field V67._upper (fldOffset=0x8)" P-INDEP
;* V251 tmp230 [V251 ] ( 0, 0 ) long -> zero-ref "field V70._lower (fldOffset=0x0)" P-INDEP
-; V252 tmp231 [V252,T44] ( 2, 8 ) long -> rax "field V70._upper (fldOffset=0x8)" P-INDEP
+; V252 tmp231 [V252,T44] ( 2, 8 ) long -> rdx "field V70._upper (fldOffset=0x8)" P-INDEP
;* V253 tmp232 [V253 ] ( 0, 0 ) long -> zero-ref "field V72._lower (fldOffset=0x0)" P-INDEP
;* V254 tmp233 [V254 ] ( 0, 0 ) long -> zero-ref "field V72._upper (fldOffset=0x8)" P-INDEP
;* V255 tmp234 [V255 ] ( 0, 0 ) long -> zero-ref "field V75._lower (fldOffset=0x0)" P-INDEP
;* V256 tmp235 [V256 ] ( 0, 0 ) long -> zero-ref "field V75._upper (fldOffset=0x8)" P-INDEP
;* V257 tmp236 [V257 ] ( 0, 0 ) long -> zero-ref "field V77._lower (fldOffset=0x0)" P-INDEP
;* V258 tmp237 [V258 ] ( 0, 0 ) long -> zero-ref "field V77._upper (fldOffset=0x8)" P-INDEP
-; V259 tmp238 [V259,T45] ( 2, 8 ) long -> rax "field V80._lower (fldOffset=0x0)" P-INDEP
+; V259 tmp238 [V259,T45] ( 2, 8 ) long -> r15 "field V80._lower (fldOffset=0x0)" P-INDEP
;* V260 tmp239 [V260 ] ( 0, 0 ) long -> zero-ref "field V80._upper (fldOffset=0x8)" P-INDEP
;* V261 tmp240 [V261 ] ( 0, 0 ) long -> zero-ref "field V81._lower (fldOffset=0x0)" P-INDEP
;* V262 tmp241 [V262 ] ( 0, 0 ) long -> zero-ref "field V81._upper (fldOffset=0x8)" P-INDEP
;* V263 tmp242 [V263 ] ( 0, 0 ) long -> zero-ref "field V83._lower (fldOffset=0x0)" P-INDEP
;* V264 tmp243 [V264 ] ( 0, 0 ) long -> zero-ref "field V83._upper (fldOffset=0x8)" P-INDEP
;* V265 tmp244 [V265 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V87.Item1 (fldOffset=0x0)" P-DEP
;* V266 tmp245 [V266 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V87.Item2 (fldOffset=0x8)" P-DEP
-; V267 tmp246 [V267,T27] ( 3, 12 ) long -> rax "field V88.Item1 (fldOffset=0x0)" P-INDEP
-; V268 tmp247 [V268,T46] ( 2, 8 ) long -> rdx "field V88.Item2 (fldOffset=0x8)" P-INDEP
+; V267 tmp246 [V267,T27] ( 3, 12 ) long -> rdx "field V88.Item1 (fldOffset=0x0)" P-INDEP
+; V268 tmp247 [V268,T46] ( 2, 8 ) long -> r15 "field V88.Item2 (fldOffset=0x8)" P-INDEP
;* V269 tmp248 [V269 ] ( 0, 0 ) long -> zero-ref "field V91._lower (fldOffset=0x0)" P-INDEP
;* V270 tmp249 [V270 ] ( 0, 0 ) long -> zero-ref "field V91._upper (fldOffset=0x8)" P-INDEP
;* V271 tmp250 [V271 ] ( 0, 0 ) long -> zero-ref "field V94._lower (fldOffset=0x0)" P-INDEP
-; V272 tmp251 [V272,T47] ( 2, 8 ) long -> rax "field V94._upper (fldOffset=0x8)" P-INDEP
+; V272 tmp251 [V272,T47] ( 2, 8 ) long -> rdx "field V94._upper (fldOffset=0x8)" P-INDEP
;* V273 tmp252 [V273 ] ( 0, 0 ) long -> zero-ref "field V96._lower (fldOffset=0x0)" P-INDEP
;* V274 tmp253 [V274 ] ( 0, 0 ) long -> zero-ref "field V96._upper (fldOffset=0x8)" P-INDEP
;* V275 tmp254 [V275 ] ( 0, 0 ) long -> zero-ref "field V99._lower (fldOffset=0x0)" P-INDEP
;* V276 tmp255 [V276 ] ( 0, 0 ) long -> zero-ref "field V99._upper (fldOffset=0x8)" P-INDEP
;* V277 tmp256 [V277 ] ( 0, 0 ) long -> zero-ref "field V101._lower (fldOffset=0x0)" P-INDEP
;* V278 tmp257 [V278 ] ( 0, 0 ) long -> zero-ref "field V101._upper (fldOffset=0x8)" P-INDEP
-; V279 tmp258 [V279,T48] ( 2, 8 ) long -> rax "field V104._lower (fldOffset=0x0)" P-INDEP
+; V279 tmp258 [V279,T48] ( 2, 8 ) long -> r15 "field V104._lower (fldOffset=0x0)" P-INDEP
;* V280 tmp259 [V280 ] ( 0, 0 ) long -> zero-ref "field V104._upper (fldOffset=0x8)" P-INDEP
;* V281 tmp260 [V281 ] ( 0, 0 ) long -> zero-ref "field V105._lower (fldOffset=0x0)" P-INDEP
;* V282 tmp261 [V282 ] ( 0, 0 ) long -> zero-ref "field V105._upper (fldOffset=0x8)" P-INDEP
;* V283 tmp262 [V283 ] ( 0, 0 ) long -> zero-ref "field V107._lower (fldOffset=0x0)" P-INDEP
;* V284 tmp263 [V284 ] ( 0, 0 ) long -> zero-ref "field V107._upper (fldOffset=0x8)" P-INDEP
;* V285 tmp264 [V285 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V111.Item1 (fldOffset=0x0)" P-DEP
;* V286 tmp265 [V286 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V111.Item2 (fldOffset=0x8)" P-DEP
-; V287 tmp266 [V287,T28] ( 3, 12 ) long -> rax "field V112.Item1 (fldOffset=0x0)" P-INDEP
-; V288 tmp267 [V288,T49] ( 2, 8 ) long -> rdx "field V112.Item2 (fldOffset=0x8)" P-INDEP
+; V287 tmp266 [V287,T28] ( 3, 12 ) long -> rdx "field V112.Item1 (fldOffset=0x0)" P-INDEP
+; V288 tmp267 [V288,T49] ( 2, 8 ) long -> r15 "field V112.Item2 (fldOffset=0x8)" P-INDEP
;* V289 tmp268 [V289 ] ( 0, 0 ) long -> zero-ref "field V115._lower (fldOffset=0x0)" P-INDEP
;* V290 tmp269 [V290 ] ( 0, 0 ) long -> zero-ref "field V115._upper (fldOffset=0x8)" P-INDEP
;* V291 tmp270 [V291 ] ( 0, 0 ) long -> zero-ref "field V118._lower (fldOffset=0x0)" P-INDEP
-; V292 tmp271 [V292,T50] ( 2, 8 ) long -> rax "field V118._upper (fldOffset=0x8)" P-INDEP
+; V292 tmp271 [V292,T50] ( 2, 8 ) long -> rdx "field V118._upper (fldOffset=0x8)" P-INDEP
;* V293 tmp272 [V293 ] ( 0, 0 ) long -> zero-ref "field V120._lower (fldOffset=0x0)" P-INDEP
;* V294 tmp273 [V294 ] ( 0, 0 ) long -> zero-ref "field V120._upper (fldOffset=0x8)" P-INDEP
;* V295 tmp274 [V295 ] ( 0, 0 ) long -> zero-ref "field V123._lower (fldOffset=0x0)" P-INDEP
;* V296 tmp275 [V296 ] ( 0, 0 ) long -> zero-ref "field V123._upper (fldOffset=0x8)" P-INDEP
;* V297 tmp276 [V297 ] ( 0, 0 ) long -> zero-ref "field V125._lower (fldOffset=0x0)" P-INDEP
;* V298 tmp277 [V298 ] ( 0, 0 ) long -> zero-ref "field V125._upper (fldOffset=0x8)" P-INDEP
-; V299 tmp278 [V299,T51] ( 2, 8 ) long -> rax "field V128._lower (fldOffset=0x0)" P-INDEP
+; V299 tmp278 [V299,T51] ( 2, 8 ) long -> r15 "field V128._lower (fldOffset=0x0)" P-INDEP
;* V300 tmp279 [V300 ] ( 0, 0 ) long -> zero-ref "field V128._upper (fldOffset=0x8)" P-INDEP
;* V301 tmp280 [V301 ] ( 0, 0 ) long -> zero-ref "field V129._lower (fldOffset=0x0)" P-INDEP
;* V302 tmp281 [V302 ] ( 0, 0 ) long -> zero-ref "field V129._upper (fldOffset=0x8)" P-INDEP
;* V303 tmp282 [V303 ] ( 0, 0 ) long -> zero-ref "field V131._lower (fldOffset=0x0)" P-INDEP
;* V304 tmp283 [V304 ] ( 0, 0 ) long -> zero-ref "field V131._upper (fldOffset=0x8)" P-INDEP
;* V305 tmp284 [V305 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V135.Item1 (fldOffset=0x0)" P-DEP
;* V306 tmp285 [V306 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V135.Item2 (fldOffset=0x8)" P-DEP
-; V307 tmp286 [V307,T29] ( 3, 12 ) long -> rax "field V136.Item1 (fldOffset=0x0)" P-INDEP
-; V308 tmp287 [V308,T52] ( 2, 8 ) long -> rdx "field V136.Item2 (fldOffset=0x8)" P-INDEP
+; V307 tmp286 [V307,T29] ( 3, 12 ) long -> rdx "field V136.Item1 (fldOffset=0x0)" P-INDEP
+; V308 tmp287 [V308,T52] ( 2, 8 ) long -> r15 "field V136.Item2 (fldOffset=0x8)" P-INDEP
;* V309 tmp288 [V309 ] ( 0, 0 ) long -> zero-ref "field V139._lower (fldOffset=0x0)" P-INDEP
;* V310 tmp289 [V310 ] ( 0, 0 ) long -> zero-ref "field V139._upper (fldOffset=0x8)" P-INDEP
;* V311 tmp290 [V311 ] ( 0, 0 ) long -> zero-ref "field V142._lower (fldOffset=0x0)" P-INDEP
-; V312 tmp291 [V312,T53] ( 2, 8 ) long -> rax "field V142._upper (fldOffset=0x8)" P-INDEP
+; V312 tmp291 [V312,T53] ( 2, 8 ) long -> rdx "field V142._upper (fldOffset=0x8)" P-INDEP
;* V313 tmp292 [V313 ] ( 0, 0 ) long -> zero-ref "field V144._lower (fldOffset=0x0)" P-INDEP
;* V314 tmp293 [V314 ] ( 0, 0 ) long -> zero-ref "field V144._upper (fldOffset=0x8)" P-INDEP
;* V315 tmp294 [V315 ] ( 0, 0 ) long -> zero-ref "field V147._lower (fldOffset=0x0)" P-INDEP
;* V316 tmp295 [V316 ] ( 0, 0 ) long -> zero-ref "field V147._upper (fldOffset=0x8)" P-INDEP
;* V317 tmp296 [V317 ] ( 0, 0 ) long -> zero-ref "field V149._lower (fldOffset=0x0)" P-INDEP
;* V318 tmp297 [V318 ] ( 0, 0 ) long -> zero-ref "field V149._upper (fldOffset=0x8)" P-INDEP
; V319 tmp298 [V319,T32] ( 4, 8 ) long -> registers "field V152._lower (fldOffset=0x0)" P-INDEP
;* V320 tmp299 [V320 ] ( 0, 0 ) long -> zero-ref "field V152._upper (fldOffset=0x8)" P-INDEP
;* V321 tmp300 [V321 ] ( 0, 0 ) long -> zero-ref "field V153._lower (fldOffset=0x0)" P-INDEP
;* V322 tmp301 [V322 ] ( 0, 0 ) long -> zero-ref "field V153._upper (fldOffset=0x8)" P-INDEP
;* V323 tmp302 [V323 ] ( 0, 0 ) long -> zero-ref "field V155._lower (fldOffset=0x0)" P-INDEP
;* V324 tmp303 [V324 ] ( 0, 0 ) long -> zero-ref "field V155._upper (fldOffset=0x8)" P-INDEP
;* V325 tmp304 [V325 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V159.Item1 (fldOffset=0x0)" P-DEP
;* V326 tmp305 [V326 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V159.Item2 (fldOffset=0x8)" P-DEP
-; V327 tmp306 [V327,T21] ( 6, 12 ) long -> rax "field V160.Item1 (fldOffset=0x0)" P-INDEP
-; V328 tmp307 [V328,T33] ( 4, 8 ) long -> rdx "field V160.Item2 (fldOffset=0x8)" P-INDEP
+; V327 tmp306 [V327,T21] ( 6, 12 ) long -> registers "field V160.Item1 (fldOffset=0x0)" P-INDEP
+; V328 tmp307 [V328,T33] ( 4, 8 ) long -> registers "field V160.Item2 (fldOffset=0x8)" P-INDEP
;* V329 tmp308 [V329 ] ( 0, 0 ) long -> zero-ref "field V163._lower (fldOffset=0x0)" P-INDEP
;* V330 tmp309 [V330 ] ( 0, 0 ) long -> zero-ref "field V163._upper (fldOffset=0x8)" P-INDEP
;* V331 tmp310 [V331 ] ( 0, 0 ) long -> zero-ref "field V166._lower (fldOffset=0x0)" P-INDEP
-; V332 tmp311 [V332,T34] ( 4, 8 ) long -> rbx "field V166._upper (fldOffset=0x8)" P-INDEP
+; V332 tmp311 [V332,T34] ( 4, 8 ) long -> r10 "field V166._upper (fldOffset=0x8)" P-INDEP
;* V333 tmp312 [V333 ] ( 0, 0 ) long -> zero-ref "field V168._lower (fldOffset=0x0)" P-INDEP
;* V334 tmp313 [V334 ] ( 0, 0 ) long -> zero-ref "field V168._upper (fldOffset=0x8)" P-INDEP
;* V335 tmp314 [V335 ] ( 0, 0 ) long -> zero-ref "field V171._lower (fldOffset=0x0)" P-INDEP
;* V336 tmp315 [V336 ] ( 0, 0 ) long -> zero-ref "field V171._upper (fldOffset=0x8)" P-INDEP
;* V337 tmp316 [V337 ] ( 0, 0 ) long -> zero-ref "field V173._lower (fldOffset=0x0)" P-INDEP
;* V338 tmp317 [V338 ] ( 0, 0 ) long -> zero-ref "field V173._upper (fldOffset=0x8)" P-INDEP
-; V339 cse0 [V339,T12] ( 4, 16 ) long -> r15 "CSE #03: moderate"
-; V340 cse1 [V340,T13] ( 4, 16 ) long -> r15 "CSE #05: moderate"
-; V341 cse2 [V341,T14] ( 4, 16 ) long -> r15 "CSE #07: moderate"
-; V342 cse3 [V342,T15] ( 4, 16 ) int -> rbx "CSE #02: moderate"
-; V343 cse4 [V343,T16] ( 4, 16 ) int -> rbx "CSE #04: moderate"
-; V344 cse5 [V344,T17] ( 4, 16 ) int -> rbx "CSE #06: moderate"
+; V339 cse0 [V339,T12] ( 4, 16 ) long -> rbx "CSE #03: moderate"
+; V340 cse1 [V340,T13] ( 4, 16 ) long -> rbx "CSE #05: moderate"
+; V341 cse2 [V341,T14] ( 4, 16 ) long -> rbx "CSE #07: moderate"
+; V342 cse3 [V342,T15] ( 4, 16 ) int -> r11 "CSE #02: moderate"
+; V343 cse4 [V343,T16] ( 4, 16 ) int -> r11 "CSE #04: moderate"
+; V344 cse5 [V344,T17] ( 4, 16 ) int -> r11 "CSE #06: moderate"
; V345 cse6 [V345,T18] ( 4, 16 ) long -> r11 "CSE #01: moderate"
; V346 cse7 [V346,T19] ( 4, 15.84) long -> rsi "CSE #08: moderate"
;
-; Lcl frame size = 16
+; Lcl frame size = 8
G_M64471_IG01:
push rbp
push r15
+ push r14
push rbx
- sub rsp, 16
+ push rax
lea rbp, [rsp+0x20]
- ;; size=13 bbWeight=1 PerfScore 3.75
+ ;; size=12 bbWeight=1 PerfScore 5.50
G_M64471_IG02:
- mov r9d, ecx
+ mov eax, ecx
+ xor r9d, r9d
xor r10d, r10d
- xor eax, eax
- mov qword ptr [rbp-0x18], rax
cmp ecx, 3
jg SHORT G_M64471_IG05
- ;; size=17 bbWeight=1 PerfScore 3.00
+ ;; size=13 bbWeight=1 PerfScore 2.00
G_M64471_IG03:
mov bword ptr [rbp-0x20], rdx
- mov rbx, qword ptr [rbp-0x18]
jmp G_M64471_IG07
align [0 bytes for IG09]
- ;; size=13 bbWeight=0.50 PerfScore 2.00
+ ;; size=9 bbWeight=0.50 PerfScore 1.50
G_M64471_IG04:
- mov qword ptr [rbp-0x18], rbx
mov rdx, bword ptr [rbp-0x20]
- ;; size=8 bbWeight=2 PerfScore 4.00
+ ;; size=4 bbWeight=2 PerfScore 2.00
G_M64471_IG05:
- cmp r10d, r9d
+ cmp r9d, eax
jae G_M64471_IG13
- mov r11d, r10d
+ mov r11d, r9d
mov bword ptr [rbp-0x20], rdx
mov rbx, qword ptr [rdx+8*r11]
- mov rax, r8
- mul rdx:rax, rbx
- mov rbx, qword ptr [rbp-0x18]
- add rbx, rax
- cmp rbx, rax
- setb al
- movzx rax, al
- add rax, rdx
- cmp r10d, esi
+ mov rdx, r8
+ mulx rbx, rdx, rbx
+ add r10, rdx
+ cmp r10, rdx
+ setb dl
+ movzx rdx, dl
+ add rdx, rbx
+ cmp r9d, esi
jae G_M64471_IG13
- mov rdx, qword ptr [rdi+8*r11]
- mov r15, rdx
- sub r15, rbx
+ mov rbx, qword ptr [rdi+8*r11]
+ mov r15, rbx
+ sub r15, r10
mov qword ptr [rdi+8*r11], r15
- cmp rdx, rbx
+ cmp rbx, r10
+ setb r10b
+ movzx r10, r10b
+ add r10, rdx
+ lea r11d, [r9+0x01]
+ cmp r11d, eax
+ jae G_M64471_IG13
+ mov ebx, r11d
+ mov rdx, bword ptr [rbp-0x20]
+ mov r15, qword ptr [rdx+8*rbx]
+ mov rdx, r8
+ mulx r15, rdx, r15
+ add r10, rdx
+ cmp r10, rdx
setb dl
movzx rdx, dl
- mov r11d, edx
- add r11, rax
- lea ebx, [r10+0x01]
- cmp ebx, r9d
+ add rdx, r15
+ cmp r11d, esi
jae G_M64471_IG13
- mov r15d, ebx
+ mov r11, qword ptr [rdi+8*rbx]
+ mov r15, r11
+ sub r15, r10
+ mov qword ptr [rdi+8*rbx], r15
+ cmp r11, r10
+ setb r10b
+ movzx r10, r10b
+ add r10, rdx
+ lea r11d, [r9+0x02]
+ cmp r11d, eax
+ jae G_M64471_IG13
+ mov ebx, r11d
mov rdx, bword ptr [rbp-0x20]
- mov rax, qword ptr [rdx+8*r15]
- mul rdx:rax, r8
- add r11, rax
- cmp r11, rax
- setb al
- movzx rax, al
- add rax, rdx
- cmp ebx, esi
- jae G_M64471_IG13
- mov rdx, qword ptr [rdi+8*r15]
- mov rbx, rdx
- sub rbx, r11
- mov qword ptr [rdi+8*r15], rbx
- cmp rdx, r11
+ mov r15, qword ptr [rdx+8*rbx]
+ mov rdx, r8
+ mulx r15, rdx, r15
+ add r10, rdx
+ cmp r10, rdx
setb dl
movzx rdx, dl
- mov r11d, edx
- add r11, rax
- lea ebx, [r10+0x02]
- cmp ebx, r9d
+ add rdx, r15
+ cmp r11d, esi
jae G_M64471_IG13
- mov r15d, ebx
- mov rdx, bword ptr [rbp-0x20]
- mov rax, qword ptr [rdx+8*r15]
- mul rdx:rax, r8
- add r11, rax
- cmp r11, rax
- setb al
- movzx rax, al
- add rax, rdx
- cmp ebx, esi
- jae G_M64471_IG13
- mov rdx, qword ptr [rdi+8*r15]
- mov rbx, rdx
- sub rbx, r11
- mov qword ptr [rdi+8*r15], rbx
- cmp rdx, r11
- ;; size=229 bbWeight=4 PerfScore 187.00
+ mov r11, qword ptr [rdi+8*rbx]
+ mov r15, r11
+ sub r15, r10
+ mov qword ptr [rdi+8*rbx], r15
+ cmp r11, r10
+ ;; size=237 bbWeight=4 PerfScore 183.00
G_M64471_IG06:
- setb dl
- movzx rdx, dl
- mov r11d, edx
- add r11, rax
- lea ebx, [r10+0x03]
- cmp ebx, r9d
+ setb r10b
+ movzx r10, r10b
+ add r10, rdx
+ lea r11d, [r9+0x03]
+ cmp r11d, eax
jae G_M64471_IG13
- mov r15d, ebx
+ mov ebx, r11d
mov rdx, bword ptr [rbp-0x20]
- mov rax, qword ptr [rdx+8*r15]
- mul rdx:rax, r8
- add r11, rax
- cmp r11, rax
- setb al
- movzx rax, al
- add rax, rdx
- cmp ebx, esi
- jae G_M64471_IG13
- mov rdx, qword ptr [rdi+8*r15]
- mov rbx, rdx
- sub rbx, r11
- mov qword ptr [rdi+8*r15], rbx
- cmp rdx, r11
+ mov r15, qword ptr [rdx+8*rbx]
+ mov rdx, r8
+ mulx r15, rdx, r15
+ add r10, rdx
+ cmp r10, rdx
setb dl
movzx rdx, dl
- mov ebx, edx
- add rbx, rax
- add r10d, 4
- lea eax, [r10+0x03]
- cmp eax, ecx
+ add rdx, r15
+ cmp r11d, esi
+ jae G_M64471_IG13
+ mov r11, qword ptr [rdi+8*rbx]
+ mov r15, r11
+ sub r15, r10
+ mov qword ptr [rdi+8*rbx], r15
+ cmp r11, r10
+ setb r10b
+ movzx r10, r10b
+ add r10, rdx
+ add r9d, 4
+ lea edx, [r9+0x03]
+ cmp edx, ecx
jl G_M64471_IG04
- ;; size=106 bbWeight=4 PerfScore 76.00
+ ;; size=111 bbWeight=4 PerfScore 75.00
G_M64471_IG07:
- cmp r10d, ecx
+ cmp r9d, ecx
jge SHORT G_M64471_IG10
;; size=5 bbWeight=0.50 PerfScore 0.62
G_M64471_IG08:
- test r10d, r10d
+ test r9d, r9d
jl SHORT G_M64471_IG12
cmp ecx, esi
jg SHORT G_M64471_IG12
;; size=9 bbWeight=0.25 PerfScore 0.62
G_M64471_IG09:
- mov esi, r10d
+ mov esi, r9d
mov rdx, bword ptr [rbp-0x20]
mov rcx, qword ptr [rdx+8*rsi]
- mov rax, r8
- mul rdx:rax, rcx
- lea r11, [rax+rbx]
- cmp r11, rax
- setb cl
- movzx rcx, cl
- mov ebx, ecx
- add rbx, rdx
- mov rcx, qword ptr [rdi+8*rsi]
- mov rax, rcx
- sub rax, r11
- mov qword ptr [rdi+8*rsi], rax
- cmp rcx, r11
- setb al
- movzx rax, al
- add rbx, rax
- inc r10d
- cmp r10d, r9d
+ mov rdx, r8
+ mulx r11, rcx, rcx
+ lea rbx, [rcx+r10]
+ cmp rbx, rcx
+ setb r10b
+ movzx r10, r10b
+ add r10, r11
+ mov r15, qword ptr [rdi+8*rsi]
+ mov rdx, r15
+ sub rdx, rbx
+ mov qword ptr [rdi+8*rsi], rdx
+ cmp r15, rbx
+ setb dl
+ movzx rdx, dl
+ add r10, rdx
+ inc r9d
+ cmp r9d, eax
jl SHORT G_M64471_IG09
- ;; size=69 bbWeight=3.96 PerfScore 58.41
+ ;; size=71 bbWeight=3.96 PerfScore 57.42
G_M64471_IG10:
- mov rax, rbx
+ mov rax, r10
;; size=3 bbWeight=1 PerfScore 0.25
G_M64471_IG11:
- add rsp, 16
+ add rsp, 8
pop rbx
+ pop r14
pop r15
pop rbp
ret
- ;; size=9 bbWeight=1 PerfScore 2.75
+ ;; size=11 bbWeight=1 PerfScore 3.25
G_M64471_IG12:
- cmp r10d, r9d
+ cmp r9d, eax
jae SHORT G_M64471_IG13
- mov eax, r10d
- mov rdx, bword ptr [rbp-0x20]
- mov rax, qword ptr [rdx+8*rax]
- mul rdx:rax, r8
- lea r11, [rax+rbx]
- cmp r11, rax
- setb al
- movzx rax, al
- mov ebx, eax
- add rbx, rdx
- cmp r10d, esi
+ mov edx, r9d
+ mov r11, bword ptr [rbp-0x20]
+ mov rdx, qword ptr [r11+8*rdx]
+ mulx rbx, rdx, r8
+ mov r15, rbx
+ lea rbx, [rdx+r10]
+ cmp rbx, rdx
+ setb r10b
+ movzx r10, r10b
+ add r10, r15
+ cmp r9d, esi
jae SHORT G_M64471_IG13
- mov eax, r10d
- mov rax, qword ptr [rdi+8*rax]
- mov edx, r10d
- mov r15, rax
- sub r15, r11
- mov qword ptr [rdi+8*rdx], r15
- cmp rax, r11
- setb al
- movzx rax, al
- add rbx, rax
- inc r10d
- cmp r10d, ecx
+ mov edx, r9d
+ mov r15, qword ptr [rdi+8*rdx]
+ mov edx, r9d
+ mov r14, r15
+ sub r14, rbx
+ mov qword ptr [rdi+8*rdx], r14
+ cmp r15, rbx
+ setb dl
+ movzx rdx, dl
+ add r10, rdx
+ inc r9d
+ cmp r9d, ecx
+ mov bword ptr [rbp-0x20], r11
jl SHORT G_M64471_IG12
jmp SHORT G_M64471_IG10
- ;; size=84 bbWeight=0.04 PerfScore 0.78
+ ;; size=93 bbWeight=0.04 PerfScore 0.82
G_M64471_IG13:
call CORINFO_HELP_RNGCHKFAIL
int3
;; size=6 bbWeight=0 PerfScore 0.00
-; Total bytes of code 571, prolog size 13, PerfScore 339.19, instruction count 178, allocated bytes for code 571 (MethodHash=b1050428) for method System.Numerics.BigIntegerCalculator:SubMul1(System.Span`1[nuint],System.ReadOnlySpan`1[nuint],nuint):nuint (FullOpts)
+; Total bytes of code 584, prolog size 12, PerfScore 331.99, instruction count 175, allocated bytes for code 584 (MethodHash=b1050428) for method System.Numerics.BigIntegerCalculator:SubMul1(System.Span`1[nuint],System.ReadOnlySpan`1[nuint],nuint):nuint (FullOpts)
; ============================================================
```
10 (1.10 % of base) - System.Number:DiyFp128Divide(byref,byref,int,byref)
```diff
; Assembly listing for method System.Number:DiyFp128Divide(byref,byref,int,byref) (FullOpts)
; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
; FullOpts code
; optimized code
; rbp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 1 single block inlinees; 3 inlinees without PGO data
; Final local variable assignments
;
; V00 arg0 [V00,T02] ( 6, 6 ) byref -> rbx single-def
; V01 arg1 [V01,T09] ( 3, 3 ) byref -> rsi single-def
; V02 arg2 [V02,T10] ( 3, 3 ) int -> r14 single-def
; V03 arg3 [V03,T03] ( 6, 6 ) byref -> r15 single-def
; V04 loc0 [V04 ] ( 8, 6.50) struct (24) [rbp-0x40] do-not-enreg[XS] addr-exposed ld-addr-op
-; V05 loc1 [V05,T01] ( 11, 8 ) long -> r13
-; V06 loc2 [V06,T14] ( 5, 3.50) long -> r12
+; V05 loc1 [V05,T01] ( 11, 8 ) long -> [rbp-0x48]
+; V06 loc2 [V06,T14] ( 5, 3.50) long -> rax
; V07 loc3 [V07,T39] ( 3, 3 ) double -> mm0
-; V08 loc4 [V08,T24] ( 3, 1.50) long -> rbx
+; V08 loc4 [V08,T24] ( 3, 1.50) long -> r9
; V09 loc5 [V09,T43] ( 2, 2 ) double -> mm2
; V10 loc6 [V10,T44] ( 2, 2 ) double -> mm3
; V11 loc7 [V11,T08] ( 7, 5.50) long -> rcx
; V12 loc8 [V12,T15] ( 5, 3.50) long -> rdi
; V13 loc9 [V13,T19] ( 2, 2 ) int -> rsi
; V14 loc10 [V14,T20] ( 2, 2 ) int -> r8
-; V15 loc11 [V15,T13] ( 6, 4 ) long -> rax
+; V15 loc11 [V15,T13] ( 6, 4 ) long -> r9
; V16 loc12 [V16,T37] ( 7, 7 ) double -> mm5
; V17 loc13 [V17,T42] ( 3, 2.50) double -> mm0
; V18 loc14 [V18,T45] ( 2, 2 ) double -> mm1
; V19 loc15 [V19,T46] ( 2, 2 ) double -> mm2
;* V20 loc16 [V20 ] ( 0, 0 ) double -> zero-ref
-; V21 loc17 [V21,T00] ( 13, 10 ) long -> r9
-; V22 loc18 [V22,T05] ( 10, 6.50) long -> [rbp-0x48]
-; V23 loc19 [V23,T04] ( 9, 7.50) long -> r11
-; V24 loc20 [V24,T18] ( 3, 2.50) long -> rbx
+; V21 loc17 [V21,T00] ( 13, 10 ) long -> r10
+; V22 loc18 [V22,T05] ( 10, 6.50) long -> registers
+; V23 loc19 [V23,T04] ( 9, 7.50) long -> rbx
+; V24 loc20 [V24,T18] ( 3, 2.50) long -> r11
; V25 loc21 [V25,T16] ( 3, 3 ) int -> rax
;* V26 loc22 [V26 ] ( 0, 0 ) long -> zero-ref
-; V27 loc23 [V27,T25] ( 3, 1.50) long -> r14
+; V27 loc23 [V27,T25] ( 3, 1.50) long -> r13
;* V28 loc24 [V28 ] ( 0, 0 ) long -> zero-ref
-; V29 loc25 [V29,T07] ( 11, 5.50) long -> r12
-; V30 loc26 [V30,T06] ( 12, 6 ) long -> rbx
-; V31 loc27 [V31,T12] ( 8, 4 ) long -> rax
-; V32 loc28 [V32,T11] ( 9, 4.50) long -> rdx
+; V29 loc25 [V29,T07] ( 11, 5.50) long -> rax
+; V30 loc26 [V30,T06] ( 12, 6 ) long -> r9
+; V31 loc27 [V31,T12] ( 8, 4 ) long -> r14
+; V32 loc28 [V32,T11] ( 9, 4.50) long -> r11
;* V33 loc29 [V33 ] ( 0, 0 ) long -> zero-ref ld-addr-op
;# V34 OutArgs [V34 ] ( 1, 1 ) struct ( 0) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V35 tmp1 [V35 ] ( 0, 0 ) struct (24) zero-ref ld-addr-op "NewObj constructor temp"
-; V36 tmp2 [V36,T29] ( 2, 1 ) long -> r10
-; V37 tmp3 [V37,T30] ( 2, 1 ) long -> rdx
+; V36 tmp2 [V36,T29] ( 2, 1 ) long -> [rbp-0x50] spill-single-def
+; V37 tmp3 [V37,T30] ( 2, 1 ) long -> r11
;* V38 tmp4 [V38 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V39 tmp5 [V39 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V40 tmp6 [V40 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V41 tmp7 [V41 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V42 tmp8 [V42 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V43 tmp9 [V43 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V44 tmp10 [V44 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V45 tmp11 [V45 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V46 tmp12 [V46 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V47 tmp13 [V47 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V48 tmp14 [V48 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V49 tmp15 [V49 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
; V50 tmp16 [V50 ] ( 3, 2.50) int -> [rbp-0x40] do-not-enreg[X] addr-exposed "field V04._sign (fldOffset=0x0)" P-DEP
; V51 tmp17 [V51 ] ( 3, 2.50) int -> [rbp-0x3C] do-not-enreg[X] addr-exposed "field V04._exponent (fldOffset=0x4)" P-DEP
; V52 tmp18 [V52 ] ( 4, 3 ) long -> [rbp-0x38] do-not-enreg[X] addr-exposed "field V04._hi (fldOffset=0x8)" P-DEP
; V53 tmp19 [V53 ] ( 4, 3 ) long -> [rbp-0x30] do-not-enreg[X] addr-exposed "field V04._lo (fldOffset=0x10)" P-DEP
;* V54 tmp20 [V54 ] ( 0, 0 ) int -> zero-ref "field V35._sign (fldOffset=0x0)" P-INDEP
; V55 tmp21 [V55,T21] ( 2, 2 ) int -> r8 "field V35._exponent (fldOffset=0x4)" P-INDEP
; V56 tmp22 [V56,T22] ( 2, 2 ) long -> rcx "field V35._hi (fldOffset=0x8)" P-INDEP
; V57 tmp23 [V57,T23] ( 2, 2 ) long -> rax "field V35._lo (fldOffset=0x10)" P-INDEP
;* V58 tmp24 [V58 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V39.Item1 (fldOffset=0x0)" P-DEP
;* V59 tmp25 [V59 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V39.Item2 (fldOffset=0x8)" P-DEP
-; V60 tmp26 [V60,T31] ( 1, 0.50) long -> rax "field V40.Item1 (fldOffset=0x0)" P-INDEP
-; V61 tmp27 [V61,T26] ( 3, 1.50) long -> [rbp-0x50] spill-single-def "field V40.Item2 (fldOffset=0x8)" P-INDEP
+; V60 tmp26 [V60,T31] ( 1, 0.50) long -> rdx "field V40.Item1 (fldOffset=0x0)" P-INDEP
+; V61 tmp27 [V61,T26] ( 3, 1.50) long -> r14 "field V40.Item2 (fldOffset=0x8)" P-INDEP
;* V62 tmp28 [V62 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V42.Item1 (fldOffset=0x0)" P-DEP
;* V63 tmp29 [V63 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V42.Item2 (fldOffset=0x8)" P-DEP
-; V64 tmp30 [V64,T32] ( 1, 0.50) long -> rax "field V43.Item1 (fldOffset=0x0)" P-INDEP
-; V65 tmp31 [V65,T27] ( 3, 1.50) long -> rdx "field V43.Item2 (fldOffset=0x8)" P-INDEP
+; V64 tmp30 [V64,T32] ( 1, 0.50) long -> r12 "field V43.Item1 (fldOffset=0x0)" P-INDEP
+; V65 tmp31 [V65,T27] ( 3, 1.50) long -> r11 "field V43.Item2 (fldOffset=0x8)" P-INDEP
;* V66 tmp32 [V66 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V45.Item1 (fldOffset=0x0)" P-DEP
;* V67 tmp33 [V67 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V45.Item2 (fldOffset=0x8)" P-DEP
; V68 tmp34 [V68,T33] ( 1, 0.50) long -> rax "field V46.Item1 (fldOffset=0x0)" P-INDEP
; V69 tmp35 [V69,T28] ( 3, 1.50) long -> rdx "field V46.Item2 (fldOffset=0x8)" P-INDEP
; V70 cse0 [V70,T40] ( 3, 3 ) double -> mm1 "CSE #01: moderate"
; V71 cse1 [V71,T41] ( 3, 3 ) double -> mm4 "CSE #02: moderate"
; V72 cse2 [V72,T17] ( 3, 3 ) int -> rax "CSE #03: moderate"
; V73 rat0 [V73,T34] ( 5, 10 ) simd16 -> mm5 "ReplaceWithLclVar is creating a new local variable"
; V74 rat1 [V74,T35] ( 5, 10 ) simd16 -> mm2 "ReplaceWithLclVar is creating a new local variable"
; V75 rat2 [V75,T36] ( 5, 10 ) simd16 -> mm1 "ReplaceWithLclVar is creating a new local variable"
; V76 rat3 [V76,T38] ( 5, 5 ) simd16 -> mm0 "ReplaceWithLclVar is creating a new local variable"
;
; Lcl frame size = 40
G_M41430_IG01:
push rbp
push r15
push r14
push r13
push r12
push rbx
sub rsp, 40
lea rbp, [rsp+0x50]
mov rbx, rdi
mov r14d, edx
mov r15, rcx
;; size=28 bbWeight=1 PerfScore 7.50
G_M41430_IG02:
vmovdqu xmm0, xmmword ptr [rsi]
vmovdqu xmmword ptr [rbp-0x40], xmm0
mov rdi, qword ptr [rsi+0x10]
mov qword ptr [rbp-0x30], rdi
- mov r13, qword ptr [rbp-0x38]
- mov r12, qword ptr [rbp-0x30]
- test r13, r13
+ mov rdx, qword ptr [rbp-0x38]
+ mov rax, qword ptr [rbp-0x30]
+ test rdx, rdx
jl SHORT G_M41430_IG04
;; size=30 bbWeight=1 PerfScore 9.25
G_M41430_IG03:
lea rdi, [rbp-0x40]
mov rax, 0xD1FFAB1E ; code for System.Number:DiyFp128Normalize(byref)
call [rax]System.Number:DiyFp128Normalize(byref)
- mov r13, qword ptr [rbp-0x38]
- mov r12, qword ptr [rbp-0x30]
+ mov rdx, qword ptr [rbp-0x38]
+ mov rax, qword ptr [rbp-0x30]
;; size=24 bbWeight=0.50 PerfScore 2.88
G_M41430_IG04:
- mov rax, r13
- shr rax, 1
+ mov rcx, rdx
+ shr rcx, 1
vxorps xmm0, xmm0, xmm0
- vcvtsi2sd xmm0, xmm0, rax
+ vcvtsi2sd xmm0, xmm0, rcx
vmovsd xmm1, qword ptr [reloc @RWD00]
vdivsd xmm0, xmm1, xmm0
- mov rax, 0xD1FFAB1E
- and rax, r13
- shr rax, 1
+ mov rcx, 0xD1FFAB1E
+ and rcx, rdx
+ shr rcx, 1
vxorps xmm2, xmm2, xmm2
- vcvtsi2sd xmm2, xmm2, rax
- mov rax, 0xD1FFAB1E
- and rax, r13
- shl rax, 15
- mov rdx, r12
- shr rdx, 49
- or rax, rdx
+ vcvtsi2sd xmm2, xmm2, rcx
+ mov rcx, 0xD1FFAB1E
+ mov qword ptr [rbp-0x48], rdx
+ and rcx, rdx
+ shl rcx, 15
+ mov rdi, rax
+ shr rdi, 49
+ or rcx, rdi
vxorps xmm3, xmm3, xmm3
- vcvtsi2sd xmm3, xmm3, rax
+ vcvtsi2sd xmm3, xmm3, rcx
vmovsd xmm4, qword ptr [reloc @RWD08]
vmulsd xmm3, xmm3, xmm4
mov rcx, qword ptr [rbx+0x08]
mov rdi, qword ptr [rbx+0x10]
mov esi, dword ptr [rbx]
xor esi, dword ptr [rbp-0x40]
mov r8d, dword ptr [rbx+0x04]
sub r8d, dword ptr [rbp-0x3C]
vmovaps xmm5, xmm0
vcmpordsd xmm6, xmm5, xmm5
vandpd xmm6, xmm6, xmm5
- mov rax, 0xD1FFAB1E
- vcvttsd2si rdx, xmm6
+ mov r9, 0xD1FFAB1E
+ vcvttsd2si r10, xmm6
vucomisd xmm5, qword ptr [reloc @RWD16]
- cmovb rax, rdx
- add rax, -0x500
- mov rdx, 0xD1FFAB1E
- and rax, rdx
+ cmovb r9, r10
+ add r9, -0x500
+ mov r10, 0xD1FFAB1E
+ and r9, r10
vxorps xmm5, xmm5, xmm5
- vcvtsi2sd xmm5, xmm5, rax
+ vcvtsi2sd xmm5, xmm5, r9
vmulsd xmm2, xmm2, xmm5
vsubsd xmm1, xmm1, xmm2
vmulsd xmm2, xmm3, xmm5
vsubsd xmm1, xmm1, xmm2
vmulsd xmm0, xmm0, qword ptr [reloc @RWD24]
vmulsd xmm0, xmm1, xmm0
- mov rdx, rcx
- shr rdx, 11
- shl rdx, 10
+ mov r10, rcx
+ shr r10, 11
+ shl r10, 10
vxorps xmm1, xmm1, xmm1
- vcvtsi2sd xmm1, xmm1, rdx
- mov rdx, 0xD1FFAB1E
- and rdx, rcx
- shr rdx, 1
+ vcvtsi2sd xmm1, xmm1, r10
+ mov r10, 0xD1FFAB1E
+ and r10, rcx
+ shr r10, 1
vxorps xmm2, xmm2, xmm2
- vcvtsi2sd xmm2, xmm2, rdx
+ vcvtsi2sd xmm2, xmm2, r10
vmulsd xmm5, xmm5, qword ptr [reloc @RWD32]
vmulsd xmm2, xmm2, xmm5
vmulsd xmm2, xmm2, qword ptr [reloc @RWD40]
vcmpordsd xmm3, xmm2, xmm2
vandpd xmm3, xmm3, xmm2
- mov r9, 0xD1FFAB1E
- vcvttsd2si rdx, xmm3
- ;; size=306 bbWeight=1 PerfScore 130.67
+ mov r10, 0xD1FFAB1E
+ ;; size=306 bbWeight=1 PerfScore 125.67
G_M41430_IG05:
+ vcvttsd2si r11, xmm3
vucomisd xmm2, qword ptr [reloc @RWD16]
- cmovb r9, rdx
- mov rdx, 0xD1FFAB1E
- and rdx, rcx
- shl rdx, 15
- mov r10, rdi
- shr r10, 49
- or rdx, r10
+ cmovb r10, r11
+ mov r11, 0xD1FFAB1E
+ and r11, rcx
+ shl r11, 15
+ mov rbx, rdi
+ shr rbx, 49
+ or r11, rbx
vxorps xmm2, xmm2, xmm2
- vcvtsi2sd xmm2, xmm2, rdx
+ vcvtsi2sd xmm2, xmm2, r11
vmulsd xmm2, xmm2, xmm4
vmulsd xmm2, xmm2, xmm5
vmulsd xmm1, xmm1, xmm0
vaddsd xmm1, xmm2, xmm1
vcmpordsd xmm2, xmm1, xmm1
vandpd xmm2, xmm2, xmm1
- mov r10, 0xD1FFAB1E
- vcvttsd2si rdx, xmm2
+ mov r11, 0xD1FFAB1E
+ vcvttsd2si rbx, xmm2
vucomisd xmm1, qword ptr [reloc @RWD16]
- cmovb r10, rdx
- mov r11, r9
- shr r11, 62
- lea r9, [r10+4*r9]
- cmp r9, r10
- setb dl
- movzx rdx, dl
- add r11, rdx
- xor ebx, ebx
+ cmovb r11, rbx
+ mov rbx, r10
+ shr rbx, 62
+ lea r10, [r11+4*r10]
+ cmp r10, r11
+ setb r11b
+ movzx r11, r11b
+ add rbx, r11
+ xor r11d, r11d
cmp r14d, 1
je G_M41430_IG08
- ;; size=135 bbWeight=1 PerfScore 42.92
+ ;; size=143 bbWeight=1 PerfScore 48.92
G_M41430_IG06:
vmulsd xmm0, xmm0, qword ptr [reloc @RWD48]
vcmpordsd xmm1, xmm0, xmm0
vandpd xmm1, xmm1, xmm0
- mov rdx, 0xD1FFAB1E
- vcvttsd2si r10, xmm1
+ mov r11, 0xD1FFAB1E
+ vcvttsd2si r14, xmm1
vucomisd xmm0, qword ptr [reloc @RWD16]
- cmovb rdx, r10
- lea rax, [rdx+4*rax]
- mov r10, -1
- test rax, rax
- cmovne r10, rax
- mov rbx, r11
- neg rbx
- mov rax, r9
- mul rdx:rax, r12
- mov qword ptr [rbp-0x50], rdx
- mov r14, r9
- imul r14, r13
- mov rax, r9
- mul rdx:rax, r13
- and r12, rbx
- and rbx, r13
- mov rax, qword ptr [rbp-0x50]
- add r12, rax
- cmp r12, rax
- setb al
- movzx rax, al
- add r12, r14
- cmp r12, r14
- setb r14b
- movzx r14, r14b
+ cmovb r11, r14
+ lea r9, [r11+4*r9]
+ mov r11, -1
+ test r9, r9
+ cmovne r11, r9
+ mov qword ptr [rbp-0x50], r11
+ mov r9, rbx
+ neg r9
+ mov rdx, r10
+ mulx r14, rdx, rax
+ mov rdx, qword ptr [rbp-0x48]
+ mov r13, r10
+ imul r13, rdx
+ mulx r11, r12, r10
+ and rax, r9
+ and r9, rdx
add rax, r14
- add rbx, rdx
- cmp rbx, rdx
- setb dl
- movzx rdx, dl
- add rbx, rax
- cmp rbx, rax
- setb al
- movzx rax, al
- add rdx, rax
- neg rdx
- cmp rdi, r12
- setb al
- movzx rax, al
- mov r14, rdi
- sub r14, r12
- mov r12, r14
- cmp rcx, rbx
+ cmp rax, r14
setb r14b
movzx r14, r14b
- sub rdx, r14
- mov r14, rcx
- sub r14, rbx
- mov rbx, r14
- cmp rbx, rax
+ add rax, r13
+ cmp rax, r13
+ setb r13b
+ movzx r13, r13b
+ add r14, r13
+ add r9, r11
+ cmp r9, r11
+ setb r11b
+ movzx r11, r11b
+ add r9, r14
+ cmp r9, r14
setb r14b
movzx r14, r14b
- sub rdx, r14
- sub rbx, rax
- setne al
- movzx rax, al
- or rax, rdx
- mov qword ptr [rbp-0x48], rax
- test rax, rax
- cmove rdx, r13
- xor rdx, r13
- mov rbx, r12
- sub rbx, rdx
- mov rax, rbx
- mul rdx:rax, r10
+ add r11, r14
+ neg r11
+ cmp rdi, rax
+ setb r14b
+ movzx r14, r14b
+ mov r13, rdi
+ sub r13, rax
+ mov rax, r13
+ cmp rcx, r9
+ setb r13b
+ movzx r13, r13b
+ sub r11, r13
+ mov r13, rcx
+ sub r13, r9
+ mov r9, r13
+ cmp r9, r14
+ setb r13b
+ movzx r13, r13b
+ sub r11, r13
+ sub r9, r14
+ setne r9b
+ movzx r9, r9b
+ or r9, r11
+ cmove r11, rdx
+ xor rdx, r11
+ sub rax, rdx
+ mov rdx, rax
+ mulx rdx, rax, qword ptr [rbp-0x50]
mov rax, rdx
shr rax, 63
- mov r10d, eax
- add r10, qword ptr [rbp-0x48]
+ mov r11d, eax
+ add r9, r11
or rcx, rdi
setne al
movzx rax, al
- lea rbx, [rax+2*rdx]
- add r9, r10
- mov rax, r10
- ;; size=289 bbWeight=0.50 PerfScore 27.04
-G_M41430_IG07:
+ lea r11, [rax+2*rdx]
+ add r10, r9
+ mov rax, r9
sar rax, 63
- add rax, r11
- cmp r9, r10
- setb r11b
- movzx r11, r11b
- add r11, rax
- ;; size=21 bbWeight=0.50 PerfScore 1.00
+ add rax, rbx
+ cmp r10, r9
+ ;; size=302 bbWeight=0.50 PerfScore 27.29
+G_M41430_IG07:
+ setb cl
+ movzx rcx, cl
+ mov ebx, ecx
+ add rbx, rax
+ ;; size=11 bbWeight=0.50 PerfScore 0.62
G_M41430_IG08:
- mov eax, r11d
+ mov eax, ebx
add r8d, eax
and eax, 63
- shrx rcx, r9, rax
- mov rdx, r11
+ shrx rcx, r10, rax
+ mov rdx, rbx
shl rdx, 63
or rcx, rdx
- mov rdx, r9
- and rdx, r11
+ mov rdx, r10
+ and rdx, rbx
shl rdx, 63
- shrx rax, rbx, rax
+ shrx rax, r11, rax
or rax, rdx
mov dword ptr [r15], esi
mov dword ptr [r15+0x04], r8d
mov qword ptr [r15+0x08], rcx
mov qword ptr [r15+0x10], rax
- ;; size=57 bbWeight=1 PerfScore 8.00
+ ;; size=56 bbWeight=1 PerfScore 8.00
G_M41430_IG09:
add rsp, 40
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
ret
;; size=15 bbWeight=1 PerfScore 4.25
RWD00 dq 47B0000000000000h ; 2.12676479e+37
RWD08 dq 3EF0000000000000h ; 1.52587891e-05
RWD16 dq 43E0000000000000h
RWD24 dq 3470000000000000h ; 4.07831529e-56
RWD32 dq 3C30000000000000h ; 8.67361738e-19
RWD40 dq 3FD0000000000000h ; 0.25
RWD48 dq 43D0000000000000h ; 4.61168602e+18
-; Total bytes of code 905, prolog size 19, PerfScore 233.50, instruction count 227, allocated bytes for code 905 (MethodHash=b0c35e29) for method System.Number:DiyFp128Divide(byref,byref,int,byref) (FullOpts)
+; Total bytes of code 915, prolog size 19, PerfScore 234.38, instruction count 225, allocated bytes for code 915 (MethodHash=b0c35e29) for method System.Number:DiyFp128Divide(byref,byref,int,byref) (FullOpts)
; ============================================================
```
10 (1.18 % of base) - System.Number:DiyFp128ReduceFractionNegative(System.UInt128,int,System.Span`1[ulong])
```diff
; Assembly listing for method System.Number:DiyFp128ReduceFractionNegative(System.UInt128,int,System.Span`1[ulong]) (FullOpts)
; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
; FullOpts code
; optimized code
; rbp based frame
; fully interruptible
; No PGO data
; 0 inlinees with PGO data; 43 single block inlinees; 9 inlinees without PGO data
; Final local variable assignments
;
;* V00 arg0 [V00 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SFA] multireg-arg single-def
; V01 arg1 [V01,T40] ( 3, 3 ) int -> rdx single-def
; V02 arg2 [V02,T41] ( 3, 3 ) struct (16) [rbp-0x40] do-not-enreg[SFA] multireg-arg ld-addr-op single-def
; V03 loc0 [V03,T26] ( 8, 27 ) int -> r13
;* V04 loc1 [V04 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op
; V05 loc2 [V05,T18] ( 7, 32 ) int -> [rbp-0x44] ptr
; V06 loc3 [V06,T38] ( 2, 9 ) long -> [rbp-0x50] spill-single-def
; V07 loc4 [V07,T37] ( 3, 10 ) long -> r15
; V08 loc5 [V08,T28] ( 2, 17 ) int -> rcx
; V09 loc6 [V09,T34] ( 4, 11 ) int -> r8
;* V10 loc7 [V10 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op
;* V11 loc8 [V11 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op
; V12 loc9 [V12,T58] ( 5, 1.16) int -> rax
;* V13 loc10 [V13 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op
; V14 loc11 [V14,T31] ( 3, 16 ) int -> [rbp-0x54] spill-single-def ptr
; V15 loc12 [V15,T16] ( 5, 36 ) long -> [rbp-0x60] spill-single-def
-; V16 loc13 [V16,T17] ( 5, 36 ) long -> rdx
+; V16 loc13 [V16,T17] ( 5, 36 ) long -> registers
;* V17 loc14 [V17 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op
; V18 loc15 [V18,T42] ( 6, 4.80) int -> [rbp-0x64] ptr
;* V19 loc16 [V19 ] ( 0, 0 ) long -> zero-ref
;* V20 loc17 [V20,T59] ( 0, 0 ) int -> zero-ref
;* V21 loc18 [V21 ] ( 0, 0 ) struct (16) zero-ref
-; V22 loc19 [V22,T27] ( 4, 26 ) long -> r11
-; V23 loc20 [V23,T00] ( 6, 82 ) int -> r14
-; V24 loc21 [V24,T04] ( 4, 64 ) int -> rax
+; V22 loc19 [V22,T27] ( 4, 26 ) long -> r10
+; V23 loc20 [V23,T00] ( 6, 82 ) int -> r11
+; V24 loc21 [V24,T04] ( 4, 64 ) int -> r14
;* V25 loc22 [V25 ] ( 0, 0 ) long -> zero-ref
; V26 OutArgs [V26 ] ( 1, 1 ) struct (16) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V27 tmp1 [V27 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
; V28 tmp2 [V28,T30] ( 4, 16 ) byref -> r10 "impAppendStmt"
;* V29 tmp3 [V29 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V30 tmp4 [V30 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V31 tmp5 [V31 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V32 tmp6 [V32 ] ( 0, 0 ) struct (16) zero-ref "dup spill"
;* V33 tmp7 [V33 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V34 tmp8 [V34 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V35 tmp9 [V35 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V36 tmp10 [V36 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V37 tmp11 [V37 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V38 tmp12 [V38 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V39 tmp13 [V39 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
; V40 tmp14 [V40,T55] ( 2, 2 ) int -> rcx
;* V41 tmp15 [V41 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V42 tmp16 [V42 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
; V43 tmp17 [V43,T21] ( 3, 32 ) long -> rbx
;* V44 tmp18 [V44 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V45 tmp19 [V45 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V46 tmp20 [V46 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V47 tmp21 [V47 ] ( 0, 0 ) struct (16) zero-ref "dup spill"
;* V48 tmp22 [V48 ] ( 0, 0 ) struct (16) zero-ref
;* V49 tmp23 [V49 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V50 tmp24 [V50 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
; V51 tmp25 [V51,T44] ( 2, 4 ) long -> r12 "Inlining Arg"
;* V52 tmp26 [V52 ] ( 0, 0 ) struct (16) zero-ref "ReadOnlySpan for CreateSpan"
; V53 tmp27 [V53,T39] ( 3, 8 ) int -> r9 "Inline return value spill temp"
;* V54 tmp28 [V54 ] ( 0, 0 ) struct (16) zero-ref "ReadOnlySpan for CreateSpan"
;* V55 tmp29 [V55 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V56 tmp30 [V56 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V57 tmp31 [V57 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V58 tmp32 [V58 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V59 tmp33 [V59 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V60 tmp34 [V60 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V61 tmp35 [V61 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V62 tmp36 [V62 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V63 tmp37 [V63 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V64 tmp38 [V64 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op "NewObj constructor temp"
;* V65 tmp39 [V65 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V66 tmp40 [V66 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V67 tmp41 [V67 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op "NewObj constructor temp"
; V68 tmp42 [V68,T05] ( 4, 64 ) struct (32) [rbp-0x88] do-not-enreg[DAS] defined-via-address "location for address-of(RValue)"
;* V69 tmp43 [V69 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V70 tmp44 [V70 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V71 tmp45 [V71 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V72 tmp46 [V72 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V73 tmp47 [V73 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V74 tmp48 [V74 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V75 tmp49 [V75 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V76 tmp50 [V76 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V77 tmp51 [V77 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V78 tmp52 [V78 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V79 tmp53 [V79 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
-; V80 tmp54 [V80,T19] ( 4, 32 ) long -> rdx "Inline stloc first use temp"
+; V80 tmp54 [V80,T19] ( 4, 32 ) long -> r10 "Inline stloc first use temp"
;* V81 tmp55 [V81 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V82 tmp56 [V82 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V83 tmp57 [V83 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V84 tmp58 [V84 ] ( 0, 0 ) struct (16) zero-ref "Inline return value spill temp"
;* V85 tmp59 [V85 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V86 tmp60 [V86 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V87 tmp61 [V87 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V88 tmp62 [V88 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V89 tmp63 [V89 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V90 tmp64 [V90 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
; V91 tmp65 [V91,T45] ( 2, 4 ) long -> rdi "Inlining Arg"
; V92 tmp66 [V92,T46] ( 2, 4 ) long -> rdx "Inlining Arg"
;* V93 tmp67 [V93 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V94 tmp68 [V94 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V95 tmp69 [V95 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V96 tmp70 [V96 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V97 tmp71 [V97 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V98 tmp72 [V98 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V99 tmp73 [V99 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V100 tmp74 [V100 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V101 tmp75 [V101 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V102 tmp76 [V102 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V103 tmp77 [V103 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V104 tmp78 [V104 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V105 tmp79 [V105 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
-; V106 tmp80 [V106,T14] ( 3, 48 ) long -> rax "Inline stloc first use temp"
-; V107 tmp81 [V107,T22] ( 2, 32 ) long -> rbx "Inline stloc first use temp"
+; V106 tmp80 [V106,T14] ( 3, 48 ) long -> rdx "Inline stloc first use temp"
+; V107 tmp81 [V107,T22] ( 2, 32 ) long -> r14 "Inline stloc first use temp"
;* V108 tmp82 [V108 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V109 tmp83 [V109 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
-; V110 tmp84 [V110,T12] ( 2, 32 ) ubyte -> r9 "Inline return value spill temp"
+; V110 tmp84 [V110,T12] ( 2, 32 ) ubyte -> rax "Inline return value spill temp"
;* V111 tmp85 [V111 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V112 tmp86 [V112 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op "NewObj constructor temp"
;* V113 tmp87 [V113 ] ( 0, 0 ) byref -> zero-ref single-def "Inlining Arg"
;* V114 tmp88 [V114 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V115 tmp89 [V115 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V116 tmp90 [V116 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op "NewObj constructor temp"
;* V117 tmp91 [V117 ] ( 0, 0 ) byref -> zero-ref single-def "Inlining Arg"
;* V118 tmp92 [V118 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
; V119 tmp93 [V119,T08] ( 8, 53 ) byref -> r12 single-def "field V04._reference (fldOffset=0x0)" P-INDEP
;* V120 tmp94 [V120,T60] ( 0, 0 ) int -> zero-ref "field V04._length (fldOffset=0x8)" P-INDEP
; V121 tmp95 [V121,T35] ( 3, 10 ) byref -> [rbp-0xB0] spill-single-def ptr "field V10._reference (fldOffset=0x0)" P-INDEP
;* V122 tmp96 [V122,T61] ( 0, 0 ) int -> zero-ref "field V10._length (fldOffset=0x8)" P-INDEP
; V123 tmp97 [V123,T36] ( 3, 10 ) byref -> [rbp-0xB8] spill-single-def ptr "field V11._reference (fldOffset=0x0)" P-INDEP
;* V124 tmp98 [V124,T62] ( 0, 0 ) int -> zero-ref "field V11._length (fldOffset=0x8)" P-INDEP
;* V125 tmp99 [V125 ] ( 0, 0 ) byref -> zero-ref "field V13._reference (fldOffset=0x0)" P-INDEP
;* V126 tmp100 [V126 ] ( 0, 0 ) int -> zero-ref "field V13._length (fldOffset=0x8)" P-INDEP
;* V127 tmp101 [V127 ] ( 0, 0 ) byref -> zero-ref "field V17._reference (fldOffset=0x0)" P-INDEP
;* V128 tmp102 [V128 ] ( 0, 0 ) int -> zero-ref "field V17._length (fldOffset=0x8)" P-INDEP
-; V129 tmp103 [V129,T06] ( 5, 58 ) long -> r9 "field V21._lower (fldOffset=0x0)" P-INDEP
-; V130 tmp104 [V130,T02] ( 6, 66 ) long -> r10 "field V21._upper (fldOffset=0x8)" P-INDEP
+; V129 tmp103 [V129,T06] ( 5, 58 ) long -> rax "field V21._lower (fldOffset=0x0)" P-INDEP
+; V130 tmp104 [V130,T02] ( 6, 66 ) long -> r9 "field V21._upper (fldOffset=0x8)" P-INDEP
; V131 tmp105 [V131,T52] ( 2, 2 ) byref -> r12 single-def "field V27._reference (fldOffset=0x0)" P-INDEP
;* V132 tmp106 [V132 ] ( 0, 0 ) int -> zero-ref "field V27._length (fldOffset=0x8)" P-INDEP
;* V133 tmp107 [V133 ] ( 0, 0 ) long -> zero-ref "field V29._lower (fldOffset=0x0)" P-INDEP
;* V134 tmp108 [V134 ] ( 0, 0 ) long -> zero-ref "field V29._upper (fldOffset=0x8)" P-INDEP
;* V135 tmp109 [V135 ] ( 0, 0 ) long -> zero-ref "field V30._lower (fldOffset=0x0)" P-INDEP
;* V136 tmp110 [V136 ] ( 0, 0 ) long -> zero-ref "field V30._upper (fldOffset=0x8)" P-INDEP
;* V137 tmp111 [V137 ] ( 0, 0 ) long -> zero-ref "field V31._lower (fldOffset=0x0)" P-INDEP
;* V138 tmp112 [V138 ] ( 0, 0 ) long -> zero-ref "field V31._upper (fldOffset=0x8)" P-INDEP
;* V139 tmp113 [V139 ] ( 0, 0 ) long -> zero-ref "field V32._lower (fldOffset=0x0)" P-INDEP
;* V140 tmp114 [V140 ] ( 0, 0 ) long -> zero-ref "field V32._upper (fldOffset=0x8)" P-INDEP
;* V141 tmp115 [V141 ] ( 0, 0 ) long -> zero-ref "field V33._lower (fldOffset=0x0)" P-INDEP
;* V142 tmp116 [V142 ] ( 0, 0 ) long -> zero-ref "field V33._upper (fldOffset=0x8)" P-INDEP
; V143 tmp117 [V143,T10] ( 6, 48 ) long -> r15 "field V34._lower (fldOffset=0x0)" P-INDEP
;* V144 tmp118 [V144 ] ( 0, 0 ) long -> zero-ref "field V34._upper (fldOffset=0x8)" P-INDEP
;* V145 tmp119 [V145 ] ( 0, 0 ) long -> zero-ref "field V35._lower (fldOffset=0x0)" P-INDEP
;* V146 tmp120 [V146 ] ( 0, 0 ) long -> zero-ref "field V35._upper (fldOffset=0x8)" P-INDEP
;* V147 tmp121 [V147 ] ( 0, 0 ) long -> zero-ref "field V36._lower (fldOffset=0x0)" P-INDEP
;* V148 tmp122 [V148 ] ( 0, 0 ) long -> zero-ref "field V36._upper (fldOffset=0x8)" P-INDEP
;* V149 tmp123 [V149 ] ( 0, 0 ) long -> zero-ref "field V37._lower (fldOffset=0x0)" P-INDEP
;* V150 tmp124 [V150 ] ( 0, 0 ) long -> zero-ref "field V37._upper (fldOffset=0x8)" P-INDEP
;* V151 tmp125 [V151 ] ( 0, 0 ) long -> zero-ref "field V38._lower (fldOffset=0x0)" P-INDEP
;* V152 tmp126 [V152 ] ( 0, 0 ) long -> zero-ref "field V38._upper (fldOffset=0x8)" P-INDEP
;* V153 tmp127 [V153 ] ( 0, 0 ) long -> zero-ref "field V39._lower (fldOffset=0x0)" P-INDEP
;* V154 tmp128 [V154 ] ( 0, 0 ) long -> zero-ref "field V39._upper (fldOffset=0x8)" P-INDEP
; V155 tmp129 [V155,T53] ( 2, 2 ) byref -> rdi single-def "field V41._reference (fldOffset=0x0)" P-INDEP
;* V156 tmp130 [V156 ] ( 0, 0 ) int -> zero-ref "field V41._length (fldOffset=0x8)" P-INDEP
; V157 tmp131 [V157,T54] ( 2, 2 ) byref -> rdx single-def "field V42._reference (fldOffset=0x0)" P-INDEP
;* V158 tmp132 [V158 ] ( 0, 0 ) int -> zero-ref "field V42._length (fldOffset=0x8)" P-INDEP
;* V159 tmp133 [V159 ] ( 0, 0 ) long -> zero-ref "field V44._lower (fldOffset=0x0)" P-INDEP
;* V160 tmp134 [V160 ] ( 0, 0 ) long -> zero-ref "field V44._upper (fldOffset=0x8)" P-INDEP
;* V161 tmp135 [V161 ] ( 0, 0 ) long -> zero-ref "field V45._lower (fldOffset=0x0)" P-INDEP
;* V162 tmp136 [V162 ] ( 0, 0 ) long -> zero-ref "field V45._upper (fldOffset=0x8)" P-INDEP
;* V163 tmp137 [V163 ] ( 0, 0 ) long -> zero-ref "field V46._lower (fldOffset=0x0)" P-INDEP
;* V164 tmp138 [V164 ] ( 0, 0 ) long -> zero-ref "field V46._upper (fldOffset=0x8)" P-INDEP
;* V165 tmp139 [V165 ] ( 0, 0 ) long -> zero-ref "field V47._lower (fldOffset=0x0)" P-INDEP
;* V166 tmp140 [V166 ] ( 0, 0 ) long -> zero-ref "field V47._upper (fldOffset=0x8)" P-INDEP
;* V167 tmp141 [V167 ] ( 0, 0 ) long -> zero-ref "field V48._lower (fldOffset=0x0)" P-INDEP
;* V168 tmp142 [V168 ] ( 0, 0 ) long -> zero-ref "field V48._upper (fldOffset=0x8)" P-INDEP
;* V169 tmp143 [V169 ] ( 0, 0 ) byref -> zero-ref single-def "field V49._reference (fldOffset=0x0)" P-INDEP
;* V170 tmp144 [V170 ] ( 0, 0 ) int -> zero-ref "field V49._length (fldOffset=0x8)" P-INDEP
;* V171 tmp145 [V171 ] ( 0, 0 ) byref -> zero-ref "field V50._reference (fldOffset=0x0)" P-INDEP
;* V172 tmp146 [V172 ] ( 0, 0 ) int -> zero-ref "field V50._length (fldOffset=0x8)" P-INDEP
;* V173 tmp147 [V173 ] ( 0, 0 ) byref -> zero-ref "field V52._reference (fldOffset=0x0)" P-INDEP
;* V174 tmp148 [V174 ] ( 0, 0 ) int -> zero-ref "field V52._length (fldOffset=0x8)" P-INDEP
;* V175 tmp149 [V175 ] ( 0, 0 ) byref -> zero-ref "field V54._reference (fldOffset=0x0)" P-INDEP
;* V176 tmp150 [V176 ] ( 0, 0 ) int -> zero-ref "field V54._length (fldOffset=0x8)" P-INDEP
;* V177 tmp151 [V177 ] ( 0, 0 ) long -> zero-ref "field V55._lower (fldOffset=0x0)" P-INDEP
;* V178 tmp152 [V178 ] ( 0, 0 ) long -> zero-ref "field V55._upper (fldOffset=0x8)" P-INDEP
;* V179 tmp153 [V179 ] ( 0, 0 ) long -> zero-ref "field V58._lower (fldOffset=0x0)" P-INDEP
;* V180 tmp154 [V180 ] ( 0, 0 ) long -> zero-ref "field V58._upper (fldOffset=0x8)" P-INDEP
;* V181 tmp155 [V181 ] ( 0, 0 ) long -> zero-ref "field V59._lower (fldOffset=0x0)" P-INDEP
;* V182 tmp156 [V182 ] ( 0, 0 ) long -> zero-ref "field V59._upper (fldOffset=0x8)" P-INDEP
; V183 tmp157 [V183,T11] ( 6, 48 ) long -> [rbp-0x90] "field V63._lower (fldOffset=0x0)" P-INDEP
;* V184 tmp158 [V184 ] ( 0, 0 ) long -> zero-ref "field V63._upper (fldOffset=0x8)" P-INDEP
;* V185 tmp159 [V185 ] ( 0, 0 ) long -> zero-ref "field V64._lower (fldOffset=0x0)" P-INDEP
;* V186 tmp160 [V186 ] ( 0, 0 ) long -> zero-ref "field V64._upper (fldOffset=0x8)" P-INDEP
;* V187 tmp161 [V187 ] ( 0, 0 ) long -> zero-ref "field V67._lower (fldOffset=0x0)" P-INDEP
;* V188 tmp162 [V188 ] ( 0, 0 ) long -> zero-ref "field V67._upper (fldOffset=0x8)" P-INDEP
;* V189 tmp163 [V189 ] ( 0, 0 ) long -> zero-ref "field V69._lower (fldOffset=0x0)" P-INDEP
;* V190 tmp164 [V190 ] ( 0, 0 ) long -> zero-ref "field V69._upper (fldOffset=0x8)" P-INDEP
;* V191 tmp165 [V191 ] ( 0, 0 ) long -> zero-ref "field V70._lower (fldOffset=0x0)" P-INDEP
;* V192 tmp166 [V192 ] ( 0, 0 ) long -> zero-ref "field V70._upper (fldOffset=0x8)" P-INDEP
;* V193 tmp167 [V193 ] ( 0, 0 ) long -> zero-ref "field V72._lower (fldOffset=0x0)" P-INDEP
;* V194 tmp168 [V194 ] ( 0, 0 ) long -> zero-ref "field V72._upper (fldOffset=0x8)" P-INDEP
;* V195 tmp169 [V195 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V76.Item1 (fldOffset=0x0)" P-DEP
;* V196 tmp170 [V196 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V76.Item2 (fldOffset=0x8)" P-DEP
; V197 tmp171 [V197,T20] ( 4, 32 ) long -> rax "field V77.Item1 (fldOffset=0x0)" P-INDEP
-; V198 tmp172 [V198,T32] ( 2, 16 ) long -> rdx "field V77.Item2 (fldOffset=0x8)" P-INDEP
+; V198 tmp172 [V198,T32] ( 2, 16 ) long -> r9 "field V77.Item2 (fldOffset=0x8)" P-INDEP
;* V199 tmp173 [V199 ] ( 0, 0 ) long -> zero-ref "field V82._lower (fldOffset=0x0)" P-INDEP
;* V200 tmp174 [V200 ] ( 0, 0 ) long -> zero-ref "field V82._upper (fldOffset=0x8)" P-INDEP
;* V201 tmp175 [V201 ] ( 0, 0 ) long -> zero-ref "field V84._lower (fldOffset=0x0)" P-INDEP
;* V202 tmp176 [V202 ] ( 0, 0 ) long -> zero-ref "field V84._upper (fldOffset=0x8)" P-INDEP
;* V203 tmp177 [V203 ] ( 0, 0 ) long -> zero-ref "field V87._lower (fldOffset=0x0)" P-INDEP
;* V204 tmp178 [V204 ] ( 0, 0 ) long -> zero-ref "field V87._upper (fldOffset=0x8)" P-INDEP
;* V205 tmp179 [V205 ] ( 0, 0 ) long -> zero-ref "field V89._lower (fldOffset=0x0)" P-INDEP
;* V206 tmp180 [V206 ] ( 0, 0 ) long -> zero-ref "field V89._upper (fldOffset=0x8)" P-INDEP
;* V207 tmp181 [V207 ] ( 0, 0 ) long -> zero-ref "field V93._lower (fldOffset=0x0)" P-INDEP
;* V208 tmp182 [V208 ] ( 0, 0 ) long -> zero-ref "field V93._upper (fldOffset=0x8)" P-INDEP
;* V209 tmp183 [V209 ] ( 0, 0 ) long -> zero-ref "field V94._lower (fldOffset=0x0)" P-INDEP
;* V210 tmp184 [V210 ] ( 0, 0 ) long -> zero-ref "field V94._upper (fldOffset=0x8)" P-INDEP
-; V211 tmp185 [V211,T23] ( 2, 32 ) long -> rax "field V96._lower (fldOffset=0x0)" P-INDEP
+; V211 tmp185 [V211,T23] ( 2, 32 ) long -> r14 "field V96._lower (fldOffset=0x0)" P-INDEP
;* V212 tmp186 [V212 ] ( 0, 0 ) long -> zero-ref "field V96._upper (fldOffset=0x8)" P-INDEP
;* V213 tmp187 [V213 ] ( 0, 0 ) long -> zero-ref "field V98._lower (fldOffset=0x0)" P-INDEP
;* V214 tmp188 [V214 ] ( 0, 0 ) long -> zero-ref "field V98._upper (fldOffset=0x8)" P-INDEP
;* V215 tmp189 [V215 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V102.Item1 (fldOffset=0x0)" P-DEP
;* V216 tmp190 [V216 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V102.Item2 (fldOffset=0x8)" P-DEP
-; V217 tmp191 [V217,T24] ( 2, 32 ) long -> rax "field V103.Item1 (fldOffset=0x0)" P-INDEP
-; V218 tmp192 [V218,T25] ( 2, 32 ) long -> rdx "field V103.Item2 (fldOffset=0x8)" P-INDEP
+; V217 tmp191 [V217,T24] ( 2, 32 ) long -> rdx "field V103.Item1 (fldOffset=0x0)" P-INDEP
+; V218 tmp192 [V218,T25] ( 2, 32 ) long -> rbx "field V103.Item2 (fldOffset=0x8)" P-INDEP
;* V219 tmp193 [V219 ] ( 0, 0 ) long -> zero-ref "field V108._lower (fldOffset=0x0)" P-INDEP
-; V220 tmp194 [V220,T07] ( 4, 56 ) long -> rdx "field V108._upper (fldOffset=0x8)" P-INDEP
+; V220 tmp194 [V220,T07] ( 4, 56 ) long -> rbx "field V108._upper (fldOffset=0x8)" P-INDEP
;* V221 tmp195 [V221 ] ( 0, 0 ) byref -> zero-ref single-def "field V111._reference (fldOffset=0x0)" P-INDEP
;* V222 tmp196 [V222 ] ( 0, 0 ) int -> zero-ref "field V111._length (fldOffset=0x8)" P-INDEP
;* V223 tmp197 [V223 ] ( 0, 0 ) byref -> zero-ref single-def "field V112._reference (fldOffset=0x0)" P-INDEP
;* V224 tmp198 [V224 ] ( 0, 0 ) int -> zero-ref "field V112._length (fldOffset=0x8)" P-INDEP
;* V225 tmp199 [V225 ] ( 0, 0 ) byref -> zero-ref single-def "field V115._reference (fldOffset=0x0)" P-INDEP
;* V226 tmp200 [V226 ] ( 0, 0 ) int -> zero-ref "field V115._length (fldOffset=0x8)" P-INDEP
;* V227 tmp201 [V227 ] ( 0, 0 ) byref -> zero-ref single-def "field V116._reference (fldOffset=0x0)" P-INDEP
;* V228 tmp202 [V228 ] ( 0, 0 ) int -> zero-ref "field V116._length (fldOffset=0x8)" P-INDEP
; V229 tmp203 [V229,T56] ( 2, 2 ) long -> rbx "V00.[000..008)"
; V230 tmp204 [V230,T57] ( 2, 2 ) long -> [rbp-0x98] spill-single-def "V00.[008..016)"
; V231 tmp205 [V231,T48] ( 3, 3 ) int -> r14 "V02.[008..012)"
-; V232 tmp206 [V232,T13] ( 3, 48 ) byref -> rax "BlockOp address local"
-; V233 cse0 [V233,T15] ( 3, 48 ) int -> r9 "CSE #08: moderate"
+; V232 tmp206 [V232,T13] ( 3, 48 ) byref -> r11 "BlockOp address local"
+; V233 cse0 [V233,T15] ( 3, 48 ) int -> rax "CSE #08: moderate"
;* V234 cse1 [V234,T47] ( 0, 0 ) long -> zero-ref "CSE #02: conservative"
; V235 cse2 [V235,T63] ( 3, 0.12) long -> rcx "CSE #05: conservative"
; V236 cse3 [V236,T43] ( 4, 4.54) byref -> r9 hoist multi-def "CSE #03: conservative"
; V237 rat0 [V237,T29] ( 5, 16.34) long -> rsi "Strength reduced derived IV"
; V238 rat1 [V238,T33] ( 4, 12.38) int -> rcx "Trip count IV"
; V239 rat2 [V239,T03] ( 5, 65.36) long -> [rbp-0xA0] ptr "Strength reduced derived IV"
; V240 rat3 [V240,T09] ( 4, 49.52) int -> [rbp-0xA4] "Trip count IV"
; V241 rat4 [V241,T01] ( 9, 66 ) long -> rsi "Widened IV V20"
; V242 rat5 [V242 ] ( 1, 1 ) long -> [rbp-0x30] do-not-enreg[X] addr-exposed "GSSecurityCookie"
; V243 rat6 [V243,T49] ( 3, 3 ) long -> rdi "V00.rdi"
; V244 rat7 [V244,T50] ( 3, 3 ) long -> rsi "V00.rsi"
; V245 rat8 [V245,T51] ( 3, 3 ) long -> r8 "V02.r8"
;
; Lcl frame size = 168
G_M21395_IG01:
push rbp
push r15
push r14
push r13
push r12
push rbx
sub rsp, 168
lea rbp, [rsp+0xD0]
mov rax, 0xD1FFAB1E
mov qword ptr [rbp-0x30], rax
mov bword ptr [rbp-0x40], rcx
mov qword ptr [rbp-0x38], r8
;; size=47 bbWeight=1 PerfScore 10.00
G_M21395_IG02:
mov rbx, rdi
mov qword ptr [rbp-0x98], rsi
mov r14d, r8d
lea r13d, [r14+0x08]
test dword ptr [rsp], esp
sub rsp, 128
lea r12, [rsp+0x10]
xor eax, eax
test r13d, r13d
jle SHORT G_M21395_IG05
;; size=39 bbWeight=1 PerfScore 6.25
G_M21395_IG03:
cmp r13d, 16
- jg G_M21395_IG31
+ jg G_M21395_IG32
mov r9, 0xD1FFAB1E ; static handle
xor esi, esi
mov ecx, r13d
align [1 bytes for IG04]
;; size=26 bbWeight=0.50 PerfScore 1.12
G_M21395_IG04:
lea r10, bword ptr [r12+rsi]
mov r8, qword ptr [r9+rsi]
mov qword ptr [r10], r8
add rsi, 8
dec ecx
jne SHORT G_M21395_IG04
;; size=19 bbWeight=3.96 PerfScore 19.80
G_M21395_IG05:
mov eax, edx
test eax, eax
- jle G_M21395_IG14
- ;; size=10 bbWeight=1 PerfScore 1.50
+ jle SHORT G_M21395_IG12
+ ;; size=6 bbWeight=1 PerfScore 1.50
G_M21395_IG06:
cmp eax, 19
jg SHORT G_M21395_IG08
;; size=5 bbWeight=4 PerfScore 5.00
G_M21395_IG07:
mov dword ptr [rbp-0x44], eax
mov r9d, eax
mov eax, dword ptr [rbp-0x44]
jmp SHORT G_M21395_IG09
;; size=11 bbWeight=2 PerfScore 8.50
G_M21395_IG08:
mov r9d, 19
;; size=6 bbWeight=2 PerfScore 0.50
G_M21395_IG09:
mov dword ptr [rbp-0x54], r9d
mov esi, r9d
mov rdx, 0xD1FFAB1E ; static handle
mov r10, qword ptr [rdx+8*rsi]
mov qword ptr [rbp-0x60], r10
xor edx, edx
xor r11d, r11d
test r13d, r13d
- jg SHORT G_M21395_IG11
- ;; size=35 bbWeight=4 PerfScore 25.00
+ jg G_M21395_IG17
+ ;; size=39 bbWeight=4 PerfScore 25.00
G_M21395_IG10:
mov dword ptr [rbp-0x44], eax
- jmp G_M21395_IG13
- ;; size=8 bbWeight=2 PerfScore 6.00
+ ;; size=3 bbWeight=2 PerfScore 2.00
G_M21395_IG11:
- cmp r13d, 16
- jg G_M21395_IG19
- xor r11d, r11d
- mov dword ptr [rbp-0xA4], r13d
- mov dword ptr [rbp-0x44], eax
- ;; size=23 bbWeight=2 PerfScore 7.00
-G_M21395_IG12:
- mov qword ptr [rbp-0xA0], r11
- mov r8, qword ptr [r12+r11]
- mov qword ptr [rbp-0x90], r8
- mov rsi, r8
- mov rcx, r10
- xor r8d, r8d
- lea rdi, [rbp-0x88]
- mov r15, 0xD1FFAB1E ; code for System.UInt128:DivRem(System.UInt128,System.UInt128):System.ValueTuple`2[System.UInt128,System.UInt128]
- call [r15]System.UInt128:DivRem(System.UInt128,System.UInt128):System.ValueTuple`2[System.UInt128,System.UInt128]
- mov r15, qword ptr [rbp-0x88]
- mov r9, qword ptr [rbp-0x60]
- mov rax, r15
- mul rdx:rax, r9
- mov rdx, qword ptr [rbp-0x90]
- sub rdx, rax
- mov rsi, qword ptr [rbp-0xA0]
- mov qword ptr [r12+rsi], r15
- add rsi, 8
- mov r15d, dword ptr [rbp-0xA4]
- dec r15d
- mov dword ptr [rbp-0xA4], r15d
- mov r10, r9
- mov r11, rsi
- jne SHORT G_M21395_IG12
- ;; size=114 bbWeight=15.84 PerfScore 332.64
-G_M21395_IG13:
mov r15d, dword ptr [rbp-0x44]
sub r15d, dword ptr [rbp-0x54]
test r15d, r15d
mov eax, r15d
- jg G_M21395_IG06
- ;; size=20 bbWeight=8 PerfScore 28.00
-G_M21395_IG14:
+ jg SHORT G_M21395_IG06
+ ;; size=16 bbWeight=8 PerfScore 28.00
+G_M21395_IG12:
mov qword ptr [rbp-0x50], rbx
mov r15, qword ptr [rbp-0x98]
mov ecx, 2
- mov eax, 1
+ mov edx, 1
test r15, r15
- cmove ecx, eax
+ cmove ecx, edx
lea r8d, [r14+0x02]
test dword ptr [rsp], esp
sub rsp, 160
lea rdi, [rsp+0x10]
mov bword ptr [rbp-0xB0], rdi
test dword ptr [rsp], esp
sub rsp, 80
lea rdx, [rsp+0x10]
mov bword ptr [rbp-0xB8], rdx
xor esi, esi
cmp esi, r8d
- jl G_M21395_IG28
+ jl G_M21395_IG29
;; size=83 bbWeight=1 PerfScore 12.75
-G_M21395_IG15:
+G_M21395_IG13:
mov rdx, bword ptr [rbp-0xB8]
;; size=7 bbWeight=0.50 PerfScore 0.50
-G_M21395_IG16:
+G_M21395_IG14:
lea rdi, [rsp]
lea rsi, [rbp-0x40]
mov rcx, bword ptr [rsi]
mov bword ptr [rsp], rcx
add rsi, 8
add rdi, 8
movsq
mov ecx, 10
mov rdi, bword ptr [rbp-0xB0]
mov esi, 10
mov rax, 0xD1FFAB1E ; code for System.Number:DiyFp128ReducePropagate(System.ReadOnlySpan`1[System.UInt128],System.ReadOnlySpan`1[ulong],int,System.Span`1[ulong])
call [rax]System.Number:DiyFp128ReducePropagate(System.ReadOnlySpan`1[System.UInt128],System.ReadOnlySpan`1[ulong],int,System.Span`1[ulong])
mov r9, 0xD1FFAB1E
cmp qword ptr [rbp-0x30], r9
- je SHORT G_M21395_IG17
+ je SHORT G_M21395_IG15
call CORINFO_HELP_FAIL_FAST
;; size=75 bbWeight=1 PerfScore 13.50
-G_M21395_IG17:
+G_M21395_IG15:
nop
;; size=1 bbWeight=1 PerfScore 0.25
-G_M21395_IG18:
+G_M21395_IG16:
lea rsp, [rbp-0x28]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
ret
;; size=15 bbWeight=1 PerfScore 4.50
+G_M21395_IG17:
+ cmp r13d, 16
+ jg G_M21395_IG20
+ xor r11d, r11d
+ mov dword ptr [rbp-0xA4], r13d
+ mov dword ptr [rbp-0x44], eax
+ ;; size=23 bbWeight=2 PerfScore 7.00
+G_M21395_IG18:
+ mov qword ptr [rbp-0xA0], r11
+ mov r8, qword ptr [r12+r11]
+ mov qword ptr [rbp-0x90], r8
+ mov rsi, r8
+ mov rcx, r10
+ xor r8d, r8d
+ lea rdi, [rbp-0x88]
+ mov r15, 0xD1FFAB1E ; code for System.UInt128:DivRem(System.UInt128,System.UInt128):System.ValueTuple`2[System.UInt128,System.UInt128]
+ call [r15]System.UInt128:DivRem(System.UInt128,System.UInt128):System.ValueTuple`2[System.UInt128,System.UInt128]
+ mov r15, qword ptr [rbp-0x88]
+ mov rdx, qword ptr [rbp-0x60]
+ mulx r9, rax, r15
+ mov r10, qword ptr [rbp-0x90]
+ sub r10, rax
+ mov rsi, qword ptr [rbp-0xA0]
+ mov qword ptr [r12+rsi], r15
+ add rsi, 8
+ mov r15d, dword ptr [rbp-0xA4]
+ dec r15d
+ mov dword ptr [rbp-0xA4], r15d
+ mov r11, rsi
+ je G_M21395_IG11
+ ;; size=114 bbWeight=15.84 PerfScore 324.72
G_M21395_IG19:
+ mov rax, rdx
+ mov rdx, r10
+ mov r10, rax
+ jmp SHORT G_M21395_IG18
+ ;; size=11 bbWeight=7.92 PerfScore 21.78
+G_M21395_IG20:
cmp r11d, 16
- jae G_M21395_IG32
+ jae G_M21395_IG33
mov dword ptr [rbp-0x64], r11d
mov esi, r11d
mov rsi, qword ptr [r12+8*rsi]
mov rbx, rsi
mov rcx, r10
xor r8d, r8d
lea rdi, [rbp-0x88]
mov rax, 0xD1FFAB1E ; code for System.UInt128:DivRem(System.UInt128,System.UInt128):System.ValueTuple`2[System.UInt128,System.UInt128]
call [rax]System.UInt128:DivRem(System.UInt128,System.UInt128):System.ValueTuple`2[System.UInt128,System.UInt128]
mov r15, qword ptr [rbp-0x88]
- mov r14, qword ptr [rbp-0x60]
- mov rax, r15
- mul rdx:rax, r14
- mov rdx, rbx
- sub rdx, rax
- mov r13d, dword ptr [rbp-0x64]
- mov eax, r13d
- mov qword ptr [r12+8*rax], r15
- inc r13d
- mov r10, r14
- mov r11d, r13d
- jmp SHORT G_M21395_IG19
- align [0 bytes for IG20]
- ;; size=94 bbWeight=0.16 PerfScore 3.16
-G_M21395_IG20:
+ mov rdx, qword ptr [rbp-0x60]
+ mulx r9, rax, r15
+ mov r10, rbx
+ sub r10, rax
+ mov r14d, dword ptr [rbp-0x64]
+ mov ecx, r14d
+ mov qword ptr [r12+8*rcx], r15
+ inc r14d
+ mov r11d, r14d
+ mov rax, rdx
+ mov rdx, r10
+ mov r10, rax
+ jmp SHORT G_M21395_IG20
+ align [0 bytes for IG21]
+ ;; size=99 bbWeight=0.16 PerfScore 3.20
+G_M21395_IG21:
mov rbx, r15
;; size=3 bbWeight=8 PerfScore 2.00
-G_M21395_IG21:
- cmp eax, 16
- jae G_M21395_IG32
- mov eax, eax
- mov rax, qword ptr [r12+8*rax]
- mul rdx:rax, rbx
- add rax, r9
- cmp rax, r9
- setb r9b
- movzx r9, r9b
- mov ebx, r9d
- add rdx, r10
- add rdx, rbx
- cmp rdx, r10
- jb SHORT G_M21395_IG24
- ;; size=46 bbWeight=16 PerfScore 156.00
G_M21395_IG22:
- cmp rdx, r10
- jne SHORT G_M21395_IG25
- ;; size=5 bbWeight=8 PerfScore 10.00
+ cmp r14d, 16
+ jae G_M21395_IG33
+ mov r14d, r14d
+ mov r14, qword ptr [r12+8*r14]
+ mov rdx, rbx
+ mulx rbx, rdx, r14
+ add rdx, rax
+ cmp rdx, rax
+ setb al
+ movzx rax, al
+ mov r14d, eax
+ add rbx, r9
+ add rbx, r14
+ cmp rbx, r9
+ jb SHORT G_M21395_IG25
+ ;; size=51 bbWeight=16 PerfScore 160.00
G_M21395_IG23:
- test r9d, r9d
- je SHORT G_M21395_IG25
- ;; size=5 bbWeight=16 PerfScore 20.00
+ cmp rbx, r9
+ jne SHORT G_M21395_IG26
+ ;; size=5 bbWeight=8 PerfScore 10.00
G_M21395_IG24:
- inc r11
- ;; size=3 bbWeight=8 PerfScore 2.00
+ test eax, eax
+ je SHORT G_M21395_IG26
+ ;; size=4 bbWeight=16 PerfScore 20.00
G_M21395_IG25:
- mov r9, rax
- mov r10, rdx
- inc r14d
- cmp r14d, ecx
- mov rbx, qword ptr [rbp-0x50]
- jl SHORT G_M21395_IG29
- ;; size=18 bbWeight=16 PerfScore 48.00
+ inc r10
+ ;; size=3 bbWeight=8 PerfScore 2.00
G_M21395_IG26:
+ mov rax, rdx
+ mov r9, rbx
+ inc r11d
+ cmp r11d, ecx
+ mov rbx, qword ptr [rbp-0x50]
+ jl SHORT G_M21395_IG30
+ ;; size=18 bbWeight=16 PerfScore 48.00
+G_M21395_IG27:
cmp esi, 10
- jae SHORT G_M21395_IG32
- mov rax, rsi
- shl rax, 4
- add rax, rdi
- mov qword ptr [rax], r9
- mov qword ptr [rax+0x08], r10
+ jae SHORT G_M21395_IG33
+ mov r11, rsi
+ shl r11, 4
+ add r11, rdi
+ mov qword ptr [r11], rax
+ mov qword ptr [r11+0x08], r9
mov rdx, bword ptr [rbp-0xB8]
- mov qword ptr [rdx+8*rsi], r11
+ mov qword ptr [rdx+8*rsi], r10
inc esi
cmp esi, r8d
- jge G_M21395_IG16
+ jge G_M21395_IG14
;; size=44 bbWeight=8 PerfScore 62.00
-G_M21395_IG27:
+G_M21395_IG28:
mov rdi, bword ptr [rbp-0xB0]
;; size=7 bbWeight=4 PerfScore 4.00
-G_M21395_IG28:
+G_M21395_IG29:
+ xor eax, eax
xor r9d, r9d
xor r10d, r10d
xor r11d, r11d
- xor r14d, r14d
- ;; size=12 bbWeight=2 PerfScore 2.00
-G_M21395_IG29:
- lea eax, [r14+rsi]
- cmp eax, r13d
- jge SHORT G_M21395_IG26
- test r14d, r14d
- jne G_M21395_IG20
- ;; size=18 bbWeight=16 PerfScore 48.00
+ ;; size=11 bbWeight=2 PerfScore 2.00
G_M21395_IG30:
- jmp G_M21395_IG21
- ;; size=5 bbWeight=8 PerfScore 16.00
+ lea r14d, [r11+rsi]
+ cmp r14d, r13d
+ jge SHORT G_M21395_IG27
+ test r11d, r11d
+ jne G_M21395_IG21
+ ;; size=18 bbWeight=16 PerfScore 48.00
G_M21395_IG31:
+ jmp G_M21395_IG22
+ ;; size=5 bbWeight=8 PerfScore 16.00
+G_M21395_IG32:
cmp eax, 16
- jae SHORT G_M21395_IG32
+ jae SHORT G_M21395_IG33
mov ecx, eax
shl rcx, 3
lea r10, bword ptr [r12+rcx]
mov r9, 0xD1FFAB1E ; static handle
mov rcx, qword ptr [r9+rcx]
mov qword ptr [r10], rcx
inc eax
- jmp SHORT G_M21395_IG31
+ jmp SHORT G_M21395_IG32
;; size=36 bbWeight=0.04 PerfScore 0.32
-G_M21395_IG32:
+G_M21395_IG33:
call CORINFO_HELP_RNGCHKFAIL
int3
;; size=6 bbWeight=0 PerfScore 0.00
-; Total bytes of code 846, prolog size 47, PerfScore 856.30, instruction count 219, allocated bytes for code 846 (MethodHash=7388ac6c) for method System.Number:DiyFp128ReduceFractionNegative(System.UInt128,int,System.Span`1[ulong]) (FullOpts)
+; Total bytes of code 856, prolog size 47, PerfScore 870.20, instruction count 222, allocated bytes for code 856 (MethodHash=7388ac6c) for method System.Number:DiyFp128ReduceFractionNegative(System.UInt128,int,System.Span`1[ulong]) (FullOpts)
; ============================================================
```
9 (1.66 % of base) - System.Decimal+DecCalc:VarDecMul(byref,byref)
```diff
; Assembly listing for method System.Decimal+DecCalc:VarDecMul(byref,byref) (FullOpts)
; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
; FullOpts code
; optimized code
; rbp based frame
; fully interruptible
; No PGO data
; 0 inlinees with PGO data; 101 single block inlinees; 14 inlinees without PGO data
; Final local variable assignments
;
; V00 arg0 [V00,T01] ( 19, 12 ) byref -> rbx single-def
; V01 arg1 [V01,T02] ( 16, 9.50) byref -> r15 single-def
; V02 loc0 [V02,T04] ( 11, 6 ) int -> [rbp-0x14]
-; V03 loc1 [V03,T05] ( 9, 4.50) long -> rdi ld-addr-op
+; V03 loc1 [V03,T05] ( 9, 4.50) long -> registers ld-addr-op
; V04 loc2 [V04,T06] ( 9, 4.50) int -> rsi
; V05 loc3 [V05 ] ( 14, 10.50) struct (24) [rbp-0x30] do-not-enreg[XSF] addr-exposed ld-addr-op
;* V06 loc4 [V06 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op
; V07 loc5 [V07,T08] ( 6, 3 ) long -> registers
; V08 loc6 [V08,T07] ( 7, 3.50) long -> rdi
;* V09 loc7 [V09 ] ( 0, 0 ) long -> zero-ref
;* V10 loc8 [V10 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op
;* V11 loc9 [V11 ] ( 0, 0 ) long -> zero-ref ld-addr-op
;* V12 loc10 [V12 ] ( 0, 0 ) long -> zero-ref ld-addr-op
-; V13 loc11 [V13,T09] ( 6, 3 ) long -> [rbp-0x38]
-; V14 loc12 [V14,T03] ( 12, 6 ) long -> rdi
+; V13 loc11 [V13,T09] ( 6, 3 ) long -> rdi
+; V14 loc12 [V14,T03] ( 12, 6 ) long -> rax
;# V15 OutArgs [V15 ] ( 1, 1 ) struct ( 0) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V16 tmp1 [V16 ] ( 0, 0 ) int -> zero-ref "impAppendStmt"
;* V17 tmp2 [V17 ] ( 0, 0 ) int -> zero-ref "impAppendStmt"
;* V18 tmp3 [V18 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V19 tmp4 [V19 ] ( 0, 0 ) int -> zero-ref "impAppendStmt"
;* V20 tmp5 [V20 ] ( 0, 0 ) int -> zero-ref "impAppendStmt"
;* V21 tmp6 [V21 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V22 tmp7 [V22 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V23 tmp8 [V23 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V24 tmp9 [V24 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V25 tmp10 [V25 ] ( 0, 0 ) int -> zero-ref "impAppendStmt"
;* V26 tmp11 [V26 ] ( 0, 0 ) int -> zero-ref "impAppendStmt"
;* V27 tmp12 [V27 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V28 tmp13 [V28 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V29 tmp14 [V29 ] ( 0, 0 ) int -> zero-ref "impAppendStmt"
;* V30 tmp15 [V30 ] ( 0, 0 ) int -> zero-ref "impAppendStmt"
;* V31 tmp16 [V31 ] ( 0, 0 ) struct (16) zero-ref "dup spill"
;* V32 tmp17 [V32 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V33 tmp18 [V33 ] ( 0, 0 ) struct (16) zero-ref "ReadOnlySpan for CreateSpan"
; V34 tmp19 [V34,T10] ( 5, 2.50) long -> rax "Inline stloc first use temp"
;* V35 tmp20 [V35 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V36 tmp21 [V36 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V37 tmp22 [V37 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V38 tmp23 [V38 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V39 tmp24 [V39 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V40 tmp25 [V40 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V41 tmp26 [V41 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inline stloc first use temp"
;* V42 tmp27 [V42 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V43 tmp28 [V43 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V44 tmp29 [V44 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V45 tmp30 [V45 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V46 tmp31 [V46 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V47 tmp32 [V47 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V48 tmp33 [V48 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V49 tmp34 [V49 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V50 tmp35 [V50 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V51 tmp36 [V51 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V52 tmp37 [V52 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V53 tmp38 [V53 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inline stloc first use temp"
;* V54 tmp39 [V54 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V55 tmp40 [V55 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V56 tmp41 [V56 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V57 tmp42 [V57 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V58 tmp43 [V58 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V59 tmp44 [V59 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V60 tmp45 [V60 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V61 tmp46 [V61 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V62 tmp47 [V62 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V63 tmp48 [V63 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V64 tmp49 [V64 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V65 tmp50 [V65 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V66 tmp51 [V66 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V67 tmp52 [V67 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V68 tmp53 [V68 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V69 tmp54 [V69 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inline stloc first use temp"
;* V70 tmp55 [V70 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V71 tmp56 [V71 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V72 tmp57 [V72 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V73 tmp58 [V73 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V74 tmp59 [V74 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V75 tmp60 [V75 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V76 tmp61 [V76 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V77 tmp62 [V77 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V78 tmp63 [V78 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V79 tmp64 [V79 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V80 tmp65 [V80 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V81 tmp66 [V81 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inline stloc first use temp"
;* V82 tmp67 [V82 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V83 tmp68 [V83 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V84 tmp69 [V84 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V85 tmp70 [V85 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V86 tmp71 [V86 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V87 tmp72 [V87 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V88 tmp73 [V88 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V89 tmp74 [V89 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V90 tmp75 [V90 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V91 tmp76 [V91 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V92 tmp77 [V92 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V93 tmp78 [V93 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V94 tmp79 [V94 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V95 tmp80 [V95 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V96 tmp81 [V96 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V97 tmp82 [V97 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inline stloc first use temp"
;* V98 tmp83 [V98 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V99 tmp84 [V99 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V100 tmp85 [V100 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V101 tmp86 [V101 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V102 tmp87 [V102 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V103 tmp88 [V103 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V104 tmp89 [V104 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V105 tmp90 [V105 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V106 tmp91 [V106 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V107 tmp92 [V107 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V108 tmp93 [V108 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V109 tmp94 [V109 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V110 tmp95 [V110 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V111 tmp96 [V111 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V112 tmp97 [V112 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V113 tmp98 [V113 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V114 tmp99 [V114 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V115 tmp100 [V115 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V116 tmp101 [V116 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V117 tmp102 [V117 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inline stloc first use temp"
;* V118 tmp103 [V118 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V119 tmp104 [V119 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V120 tmp105 [V120 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V121 tmp106 [V121 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V122 tmp107 [V122 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V123 tmp108 [V123 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V124 tmp109 [V124 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V125 tmp110 [V125 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V126 tmp111 [V126 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V127 tmp112 [V127 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inline stloc first use temp"
;* V128 tmp113 [V128 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V129 tmp114 [V129 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V130 tmp115 [V130 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V131 tmp116 [V131 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V132 tmp117 [V132 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V133 tmp118 [V133 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V134 tmp119 [V134 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V135 tmp120 [V135 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V136 tmp121 [V136 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V137 tmp122 [V137 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inline stloc first use temp"
;* V138 tmp123 [V138 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V139 tmp124 [V139 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V140 tmp125 [V140 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V141 tmp126 [V141 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V142 tmp127 [V142 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V143 tmp128 [V143 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V144 tmp129 [V144 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V145 tmp130 [V145 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V146 tmp131 [V146 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V147 tmp132 [V147 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V148 tmp133 [V148 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inline stloc first use temp"
;* V149 tmp134 [V149 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V150 tmp135 [V150 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V151 tmp136 [V151 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V152 tmp137 [V152 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V153 tmp138 [V153 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V154 tmp139 [V154 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V155 tmp140 [V155 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V156 tmp141 [V156 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V157 tmp142 [V157 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V158 tmp143 [V158 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V159 tmp144 [V159 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V160 tmp145 [V160,T28] ( 0, 0 ) byref -> zero-ref single-def "field V06._reference (fldOffset=0x0)" P-INDEP
;* V161 tmp146 [V161,T39] ( 0, 0 ) int -> zero-ref "field V06._length (fldOffset=0x8)" P-INDEP
;* V162 tmp147 [V162 ] ( 0, 0 ) byref -> zero-ref single-def "field V10._reference (fldOffset=0x0)" P-INDEP
;* V163 tmp148 [V163 ] ( 0, 0 ) int -> zero-ref "field V10._length (fldOffset=0x8)" P-INDEP
;* V164 tmp149 [V164 ] ( 0, 0 ) long -> zero-ref "field V31.Item1 (fldOffset=0x0)" P-INDEP
;* V165 tmp150 [V165 ] ( 0, 0 ) long -> zero-ref "field V31.Item2 (fldOffset=0x8)" P-INDEP
;* V166 tmp151 [V166 ] ( 0, 0 ) byref -> zero-ref single-def "field V33._reference (fldOffset=0x0)" P-INDEP
;* V167 tmp152 [V167 ] ( 0, 0 ) int -> zero-ref "field V33._length (fldOffset=0x8)" P-INDEP
;* V168 tmp153 [V168 ] ( 0, 0 ) long -> zero-ref "field V35.Item1 (fldOffset=0x0)" P-INDEP
; V169 tmp154 [V169,T11] ( 3, 1.50) long -> rcx "field V35.Item2 (fldOffset=0x8)" P-INDEP
;* V170 tmp155 [V170 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V39.Item1 (fldOffset=0x0)" P-DEP
;* V171 tmp156 [V171 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V39.Item2 (fldOffset=0x8)" P-DEP
-; V172 tmp157 [V172,T23] ( 2, 1 ) long -> rax "field V40.Item1 (fldOffset=0x0)" P-INDEP
-; V173 tmp158 [V173,T12] ( 3, 1.50) long -> rdx "field V40.Item2 (fldOffset=0x8)" P-INDEP
+; V172 tmp157 [V172,T23] ( 2, 1 ) long -> rdi "field V40.Item1 (fldOffset=0x0)" P-INDEP
+; V173 tmp158 [V173,T12] ( 3, 1.50) long -> rsi "field V40.Item2 (fldOffset=0x8)" P-INDEP
;* V174 tmp159 [V174 ] ( 0, 0 ) byref -> zero-ref single-def "field V41._reference (fldOffset=0x0)" P-INDEP
;* V175 tmp160 [V175 ] ( 0, 0 ) int -> zero-ref "field V41._length (fldOffset=0x8)" P-INDEP
;* V176 tmp161 [V176 ] ( 0, 0 ) byref -> zero-ref "field V43._reference (fldOffset=0x0)" P-INDEP
;* V177 tmp162 [V177 ] ( 0, 0 ) int -> zero-ref "field V43._length (fldOffset=0x8)" P-INDEP
;* V178 tmp163 [V178,T29] ( 0, 0 ) byref -> zero-ref single-def "field V44._reference (fldOffset=0x0)" P-INDEP
;* V179 tmp164 [V179 ] ( 0, 0 ) int -> zero-ref "field V44._length (fldOffset=0x8)" P-INDEP
;* V180 tmp165 [V180 ] ( 0, 0 ) byref -> zero-ref single-def "field V47._reference (fldOffset=0x0)" P-INDEP
;* V181 tmp166 [V181 ] ( 0, 0 ) int -> zero-ref "field V47._length (fldOffset=0x8)" P-INDEP
;* V182 tmp167 [V182 ] ( 0, 0 ) byref -> zero-ref single-def "field V50._reference (fldOffset=0x0)" P-INDEP
;* V183 tmp168 [V183 ] ( 0, 0 ) int -> zero-ref "field V50._length (fldOffset=0x8)" P-INDEP
;* V184 tmp169 [V184 ] ( 0, 0 ) byref -> zero-ref single-def "field V53._reference (fldOffset=0x0)" P-INDEP
;* V185 tmp170 [V185 ] ( 0, 0 ) int -> zero-ref "field V53._length (fldOffset=0x8)" P-INDEP
;* V186 tmp171 [V186 ] ( 0, 0 ) byref -> zero-ref "field V55._reference (fldOffset=0x0)" P-INDEP
;* V187 tmp172 [V187 ] ( 0, 0 ) int -> zero-ref "field V55._length (fldOffset=0x8)" P-INDEP
;* V188 tmp173 [V188,T30] ( 0, 0 ) byref -> zero-ref single-def "field V56._reference (fldOffset=0x0)" P-INDEP
;* V189 tmp174 [V189 ] ( 0, 0 ) int -> zero-ref "field V56._length (fldOffset=0x8)" P-INDEP
;* V190 tmp175 [V190 ] ( 0, 0 ) byref -> zero-ref single-def "field V59._reference (fldOffset=0x0)" P-INDEP
;* V191 tmp176 [V191 ] ( 0, 0 ) int -> zero-ref "field V59._length (fldOffset=0x8)" P-INDEP
;* V192 tmp177 [V192 ] ( 0, 0 ) byref -> zero-ref single-def "field V62._reference (fldOffset=0x0)" P-INDEP
;* V193 tmp178 [V193 ] ( 0, 0 ) int -> zero-ref "field V62._length (fldOffset=0x8)" P-INDEP
;* V194 tmp179 [V194 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V67.Item1 (fldOffset=0x0)" P-DEP
;* V195 tmp180 [V195 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V67.Item2 (fldOffset=0x8)" P-DEP
-; V196 tmp181 [V196,T24] ( 2, 1 ) long -> rax "field V68.Item1 (fldOffset=0x0)" P-INDEP
-; V197 tmp182 [V197,T13] ( 3, 1.50) long -> rdx "field V68.Item2 (fldOffset=0x8)" P-INDEP
+; V196 tmp181 [V196,T24] ( 2, 1 ) long -> rdx "field V68.Item1 (fldOffset=0x0)" P-INDEP
+; V197 tmp182 [V197,T13] ( 3, 1.50) long -> rdi "field V68.Item2 (fldOffset=0x8)" P-INDEP
;* V198 tmp183 [V198 ] ( 0, 0 ) byref -> zero-ref single-def "field V69._reference (fldOffset=0x0)" P-INDEP
;* V199 tmp184 [V199 ] ( 0, 0 ) int -> zero-ref "field V69._length (fldOffset=0x8)" P-INDEP
;* V200 tmp185 [V200 ] ( 0, 0 ) byref -> zero-ref "field V71._reference (fldOffset=0x0)" P-INDEP
;* V201 tmp186 [V201 ] ( 0, 0 ) int -> zero-ref "field V71._length (fldOffset=0x8)" P-INDEP
;* V202 tmp187 [V202,T31] ( 0, 0 ) byref -> zero-ref single-def "field V72._reference (fldOffset=0x0)" P-INDEP
;* V203 tmp188 [V203 ] ( 0, 0 ) int -> zero-ref "field V72._length (fldOffset=0x8)" P-INDEP
;* V204 tmp189 [V204 ] ( 0, 0 ) byref -> zero-ref single-def "field V75._reference (fldOffset=0x0)" P-INDEP
;* V205 tmp190 [V205 ] ( 0, 0 ) int -> zero-ref "field V75._length (fldOffset=0x8)" P-INDEP
;* V206 tmp191 [V206 ] ( 0, 0 ) byref -> zero-ref single-def "field V78._reference (fldOffset=0x0)" P-INDEP
;* V207 tmp192 [V207 ] ( 0, 0 ) int -> zero-ref "field V78._length (fldOffset=0x8)" P-INDEP
;* V208 tmp193 [V208 ] ( 0, 0 ) byref -> zero-ref single-def "field V81._reference (fldOffset=0x0)" P-INDEP
;* V209 tmp194 [V209 ] ( 0, 0 ) int -> zero-ref "field V81._length (fldOffset=0x8)" P-INDEP
;* V210 tmp195 [V210 ] ( 0, 0 ) byref -> zero-ref "field V83._reference (fldOffset=0x0)" P-INDEP
;* V211 tmp196 [V211 ] ( 0, 0 ) int -> zero-ref "field V83._length (fldOffset=0x8)" P-INDEP
;* V212 tmp197 [V212,T32] ( 0, 0 ) byref -> zero-ref single-def "field V84._reference (fldOffset=0x0)" P-INDEP
;* V213 tmp198 [V213 ] ( 0, 0 ) int -> zero-ref "field V84._length (fldOffset=0x8)" P-INDEP
;* V214 tmp199 [V214 ] ( 0, 0 ) byref -> zero-ref single-def "field V87._reference (fldOffset=0x0)" P-INDEP
;* V215 tmp200 [V215 ] ( 0, 0 ) int -> zero-ref "field V87._length (fldOffset=0x8)" P-INDEP
;* V216 tmp201 [V216 ] ( 0, 0 ) byref -> zero-ref single-def "field V90._reference (fldOffset=0x0)" P-INDEP
;* V217 tmp202 [V217 ] ( 0, 0 ) int -> zero-ref "field V90._length (fldOffset=0x8)" P-INDEP
;* V218 tmp203 [V218 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V95.Item1 (fldOffset=0x0)" P-DEP
;* V219 tmp204 [V219 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V95.Item2 (fldOffset=0x8)" P-DEP
-; V220 tmp205 [V220,T25] ( 2, 1 ) long -> rax "field V96.Item1 (fldOffset=0x0)" P-INDEP
-; V221 tmp206 [V221,T14] ( 3, 1.50) long -> [rbp-0x40] spill-single-def "field V96.Item2 (fldOffset=0x8)" P-INDEP
+; V220 tmp205 [V220,T25] ( 2, 1 ) long -> rdx "field V96.Item1 (fldOffset=0x0)" P-INDEP
+; V221 tmp206 [V221,T14] ( 3, 1.50) long -> rdi "field V96.Item2 (fldOffset=0x8)" P-INDEP
;* V222 tmp207 [V222 ] ( 0, 0 ) byref -> zero-ref single-def "field V97._reference (fldOffset=0x0)" P-INDEP
;* V223 tmp208 [V223 ] ( 0, 0 ) int -> zero-ref "field V97._length (fldOffset=0x8)" P-INDEP
;* V224 tmp209 [V224 ] ( 0, 0 ) byref -> zero-ref "field V99._reference (fldOffset=0x0)" P-INDEP
;* V225 tmp210 [V225 ] ( 0, 0 ) int -> zero-ref "field V99._length (fldOffset=0x8)" P-INDEP
;* V226 tmp211 [V226,T33] ( 0, 0 ) byref -> zero-ref single-def "field V100._reference (fldOffset=0x0)" P-INDEP
;* V227 tmp212 [V227 ] ( 0, 0 ) int -> zero-ref "field V100._length (fldOffset=0x8)" P-INDEP
;* V228 tmp213 [V228 ] ( 0, 0 ) byref -> zero-ref single-def "field V103._reference (fldOffset=0x0)" P-INDEP
;* V229 tmp214 [V229 ] ( 0, 0 ) int -> zero-ref "field V103._length (fldOffset=0x8)" P-INDEP
;* V230 tmp215 [V230 ] ( 0, 0 ) byref -> zero-ref single-def "field V106._reference (fldOffset=0x0)" P-INDEP
;* V231 tmp216 [V231 ] ( 0, 0 ) int -> zero-ref "field V106._length (fldOffset=0x8)" P-INDEP
;* V232 tmp217 [V232 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V111.Item1 (fldOffset=0x0)" P-DEP
;* V233 tmp218 [V233 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V111.Item2 (fldOffset=0x8)" P-DEP
-; V234 tmp219 [V234,T15] ( 3, 1.50) long -> rax "field V112.Item1 (fldOffset=0x0)" P-INDEP
-; V235 tmp220 [V235,T26] ( 2, 1 ) long -> rdx "field V112.Item2 (fldOffset=0x8)" P-INDEP
+; V234 tmp219 [V234,T15] ( 3, 1.50) long -> rdx "field V112.Item1 (fldOffset=0x0)" P-INDEP
+; V235 tmp220 [V235,T26] ( 2, 1 ) long -> rsi "field V112.Item2 (fldOffset=0x8)" P-INDEP
;* V236 tmp221 [V236 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V115.Item1 (fldOffset=0x0)" P-DEP
;* V237 tmp222 [V237 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V115.Item2 (fldOffset=0x8)" P-DEP
-; V238 tmp223 [V238,T16] ( 3, 1.50) long -> rax "field V116.Item1 (fldOffset=0x0)" P-INDEP
-; V239 tmp224 [V239,T27] ( 2, 1 ) long -> rdx "field V116.Item2 (fldOffset=0x8)" P-INDEP
+; V238 tmp223 [V238,T16] ( 3, 1.50) long -> rdx "field V116.Item1 (fldOffset=0x0)" P-INDEP
+; V239 tmp224 [V239,T27] ( 2, 1 ) long -> rsi "field V116.Item2 (fldOffset=0x8)" P-INDEP
;* V240 tmp225 [V240 ] ( 0, 0 ) byref -> zero-ref single-def "field V117._reference (fldOffset=0x0)" P-INDEP
;* V241 tmp226 [V241 ] ( 0, 0 ) int -> zero-ref "field V117._length (fldOffset=0x8)" P-INDEP
;* V242 tmp227 [V242 ] ( 0, 0 ) byref -> zero-ref "field V118._reference (fldOffset=0x0)" P-INDEP
;* V243 tmp228 [V243 ] ( 0, 0 ) int -> zero-ref "field V118._length (fldOffset=0x8)" P-INDEP
;* V244 tmp229 [V244,T34] ( 0, 0 ) byref -> zero-ref single-def "field V119._reference (fldOffset=0x0)" P-INDEP
;* V245 tmp230 [V245 ] ( 0, 0 ) int -> zero-ref "field V119._length (fldOffset=0x8)" P-INDEP
;* V246 tmp231 [V246 ] ( 0, 0 ) byref -> zero-ref single-def "field V122._reference (fldOffset=0x0)" P-INDEP
;* V247 tmp232 [V247 ] ( 0, 0 ) int -> zero-ref "field V122._length (fldOffset=0x8)" P-INDEP
;* V248 tmp233 [V248 ] ( 0, 0 ) byref -> zero-ref single-def "field V125._reference (fldOffset=0x0)" P-INDEP
;* V249 tmp234 [V249 ] ( 0, 0 ) int -> zero-ref "field V125._length (fldOffset=0x8)" P-INDEP
;* V250 tmp235 [V250 ] ( 0, 0 ) byref -> zero-ref single-def "field V127._reference (fldOffset=0x0)" P-INDEP
;* V251 tmp236 [V251 ] ( 0, 0 ) int -> zero-ref "field V127._length (fldOffset=0x8)" P-INDEP
;* V252 tmp237 [V252 ] ( 0, 0 ) byref -> zero-ref "field V128._reference (fldOffset=0x0)" P-INDEP
;* V253 tmp238 [V253 ] ( 0, 0 ) int -> zero-ref "field V128._length (fldOffset=0x8)" P-INDEP
;* V254 tmp239 [V254,T35] ( 0, 0 ) byref -> zero-ref single-def "field V129._reference (fldOffset=0x0)" P-INDEP
;* V255 tmp240 [V255 ] ( 0, 0 ) int -> zero-ref "field V129._length (fldOffset=0x8)" P-INDEP
;* V256 tmp241 [V256 ] ( 0, 0 ) byref -> zero-ref single-def "field V132._reference (fldOffset=0x0)" P-INDEP
;* V257 tmp242 [V257 ] ( 0, 0 ) int -> zero-ref "field V132._length (fldOffset=0x8)" P-INDEP
;* V258 tmp243 [V258 ] ( 0, 0 ) byref -> zero-ref single-def "field V135._reference (fldOffset=0x0)" P-INDEP
;* V259 tmp244 [V259 ] ( 0, 0 ) int -> zero-ref "field V135._length (fldOffset=0x8)" P-INDEP
;* V260 tmp245 [V260 ] ( 0, 0 ) byref -> zero-ref single-def "field V137._reference (fldOffset=0x0)" P-INDEP
;* V261 tmp246 [V261 ] ( 0, 0 ) int -> zero-ref "field V137._length (fldOffset=0x8)" P-INDEP
;* V262 tmp247 [V262 ] ( 0, 0 ) byref -> zero-ref "field V138._reference (fldOffset=0x0)" P-INDEP
;* V263 tmp248 [V263 ] ( 0, 0 ) int -> zero-ref "field V138._length (fldOffset=0x8)" P-INDEP
;* V264 tmp249 [V264,T36] ( 0, 0 ) byref -> zero-ref single-def "field V139._reference (fldOffset=0x0)" P-INDEP
;* V265 tmp250 [V265 ] ( 0, 0 ) int -> zero-ref "field V139._length (fldOffset=0x8)" P-INDEP
;* V266 tmp251 [V266 ] ( 0, 0 ) byref -> zero-ref single-def "field V142._reference (fldOffset=0x0)" P-INDEP
;* V267 tmp252 [V267 ] ( 0, 0 ) int -> zero-ref "field V142._length (fldOffset=0x8)" P-INDEP
;* V268 tmp253 [V268 ] ( 0, 0 ) byref -> zero-ref single-def "field V145._reference (fldOffset=0x0)" P-INDEP
;* V269 tmp254 [V269 ] ( 0, 0 ) int -> zero-ref "field V145._length (fldOffset=0x8)" P-INDEP
;* V270 tmp255 [V270,T37] ( 0, 0 ) byref -> zero-ref single-def "field V147._reference (fldOffset=0x0)" P-INDEP
;* V271 tmp256 [V271 ] ( 0, 0 ) int -> zero-ref "field V147._length (fldOffset=0x8)" P-INDEP
;* V272 tmp257 [V272 ] ( 0, 0 ) byref -> zero-ref single-def "field V148._reference (fldOffset=0x0)" P-INDEP
;* V273 tmp258 [V273 ] ( 0, 0 ) int -> zero-ref "field V148._length (fldOffset=0x8)" P-INDEP
;* V274 tmp259 [V274 ] ( 0, 0 ) byref -> zero-ref "field V149._reference (fldOffset=0x0)" P-INDEP
;* V275 tmp260 [V275 ] ( 0, 0 ) int -> zero-ref "field V149._length (fldOffset=0x8)" P-INDEP
;* V276 tmp261 [V276,T38] ( 0, 0 ) byref -> zero-ref single-def "field V150._reference (fldOffset=0x0)" P-INDEP
;* V277 tmp262 [V277 ] ( 0, 0 ) int -> zero-ref "field V150._length (fldOffset=0x8)" P-INDEP
;* V278 tmp263 [V278 ] ( 0, 0 ) byref -> zero-ref single-def "field V153._reference (fldOffset=0x0)" P-INDEP
;* V279 tmp264 [V279 ] ( 0, 0 ) int -> zero-ref "field V153._length (fldOffset=0x8)" P-INDEP
;* V280 tmp265 [V280 ] ( 0, 0 ) byref -> zero-ref single-def "field V156._reference (fldOffset=0x0)" P-INDEP
;* V281 tmp266 [V281 ] ( 0, 0 ) int -> zero-ref "field V156._length (fldOffset=0x8)" P-INDEP
; V282 cse0 [V282,T17] ( 3, 1.50) long -> rsi "CSE #14: moderate"
-; V283 cse1 [V283,T18] ( 3, 1.50) long -> [rbp-0x48] spill-single-def "CSE #15: moderate"
-; V284 cse2 [V284,T19] ( 3, 1.50) int -> rax "CSE #12: moderate"
-; V285 cse3 [V285,T20] ( 3, 1.50) int -> rdi "CSE #13: moderate"
-; V286 cse4 [V286,T21] ( 3, 1.50) int -> rsi "CSE #03: moderate"
-; V287 cse5 [V287,T22] ( 3, 1.50) int -> rax "CSE #09: moderate"
+; V283 cse1 [V283,T18] ( 3, 1.50) long -> [rbp-0x38] spill-single-def "CSE #15: moderate"
+; V284 cse2 [V284,T19] ( 3, 1.50) int -> rdx "CSE #12: moderate"
+; V285 cse3 [V285,T20] ( 3, 1.50) int -> rsi "CSE #13: moderate"
+; V286 cse4 [V286,T21] ( 3, 1.50) int -> rdi "CSE #03: moderate"
+; V287 cse5 [V287,T22] ( 3, 1.50) int -> rdx "CSE #09: moderate"
; V288 rat0 [V288,T00] ( 6, 17 ) long -> rsi "Widened IV V04"
;
-; Lcl frame size = 64
+; Lcl frame size = 48
G_M55226_IG01:
push rbp
push r15
push rbx
- sub rsp, 64
- lea rbp, [rsp+0x50]
+ sub rsp, 48
+ lea rbp, [rsp+0x40]
mov rbx, rdi
mov r15, rsi
;; size=19 bbWeight=1 PerfScore 4.25
G_M55226_IG02:
- mov eax, dword ptr [rbx]
- add eax, dword ptr [r15]
- shr eax, 16
- movzx rdx, al
+ mov edx, dword ptr [rbx]
+ add edx, dword ptr [r15]
+ shr edx, 16
+ movzx rdx, dl
mov dword ptr [rbp-0x14], edx
- mov eax, dword ptr [rbx+0x04]
- or eax, dword ptr [rbx+0x0C]
- je G_M55226_IG06
+ mov edi, dword ptr [rbx+0x04]
+ or edi, dword ptr [rbx+0x0C]
+ je G_M55226_IG10
;; size=26 bbWeight=1 PerfScore 10.75
G_M55226_IG03:
- mov eax, dword ptr [r15+0x04]
- or eax, dword ptr [r15+0x0C]
- je G_M55226_IG05
- mov rax, qword ptr [rbx+0x08]
- mul rdx:rax, qword ptr [r15+0x08]
- mov qword ptr [rbp-0x40], rdx
- mov qword ptr [rbp-0x30], rax
- mov eax, dword ptr [rbx+0x04]
mov edi, dword ptr [r15+0x04]
- mov esi, eax
- or esi, edi
- jne SHORT G_M55226_IG04
- mov qword ptr [rbp-0x28], rdx
- mov esi, 3
- jmp G_M55226_IG08
- align [0 bytes for IG09]
- ;; size=57 bbWeight=0.50 PerfScore 11.88
-G_M55226_IG04:
- mov eax, eax
- mov qword ptr [rbp-0x48], rax
- mov esi, edi
- mov rdi, rax
- imul rdi, rsi
- mov rax, rsi
- mul rdx:rax, qword ptr [rbx+0x08]
- add rdi, rdx
- mov rdx, qword ptr [rbp-0x40]
- add rdx, rax
- lea rsi, [rdi+0x01]
- mov qword ptr [rbp-0x38], rdx
- cmp rdx, rax
- cmovb rdi, rsi
- mov rax, qword ptr [rbp-0x48]
- mul rdx:rax, qword ptr [r15+0x08]
- add rdi, rdx
- mov rdx, qword ptr [rbp-0x38]
- add rdx, rax
- lea rsi, [rdi+0x01]
- cmp rdx, rax
- cmovb rdi, rsi
- mov qword ptr [rbp-0x28], rdx
- mov qword ptr [rbp-0x20], rdi
- mov esi, 5
- jmp SHORT G_M55226_IG08
- ;; size=91 bbWeight=0.50 PerfScore 13.88
-G_M55226_IG05:
- mov rax, qword ptr [rbx+0x08]
- mov esi, dword ptr [r15+0x08]
- mul rdx:rax, rsi
- mov rdi, rdx
- mov qword ptr [rbp-0x30], rax
- mov eax, dword ptr [rbx+0x04]
- test eax, eax
- je SHORT G_M55226_IG07
- mov edi, dword ptr [r15+0x08]
- imul rdi, rax
- add rdi, rdx
- mov rax, rdi
- shr rax, 32
- je SHORT G_M55226_IG07
- mov qword ptr [rbp-0x28], rdi
- jmp SHORT G_M55226_IG14
- ;; size=51 bbWeight=0.50 PerfScore 10.25
-G_M55226_IG06:
- mov eax, dword ptr [r15+0x04]
- or eax, dword ptr [r15+0x0C]
- je G_M55226_IG17
- mov eax, dword ptr [rbx+0x08]
- mul rdx:rax, qword ptr [r15+0x08]
- mov rdi, rdx
- mov qword ptr [rbp-0x30], rax
+ or edi, dword ptr [r15+0x0C]
+ je G_M55226_IG05
+ mov rdx, qword ptr [rbx+0x08]
+ mulx rdi, rdx, qword ptr [r15+0x08]
+ mov qword ptr [rbp-0x30], rdx
+ mov edx, dword ptr [rbx+0x04]
mov esi, dword ptr [r15+0x04]
- test esi, esi
- je SHORT G_M55226_IG07
- mov edi, dword ptr [rbx+0x08]
- imul rdi, rsi
+ mov eax, edx
+ or eax, esi
+ jne SHORT G_M55226_IG04
+ mov qword ptr [rbp-0x28], rdi
+ mov esi, 3
+ jmp G_M55226_IG12
+ ;; size=55 bbWeight=0.50 PerfScore 11.38
+G_M55226_IG04:
+ mov edx, edx
+ mov qword ptr [rbp-0x38], rdx
+ mov esi, esi
+ mov rax, rdx
+ imul rax, rsi
+ mov rdx, rsi
+ mulx rsi, rdx, qword ptr [rbx+0x08]
+ add rax, rsi
add rdi, rdx
+ lea rsi, [rax+0x01]
+ cmp rdi, rdx
+ cmovb rax, rsi
+ mov rdx, qword ptr [rbp-0x38]
+ mulx rsi, rdx, qword ptr [r15+0x08]
+ add rax, rsi
+ add rdi, rdx
+ lea rsi, [rax+0x01]
+ cmp rdi, rdx
+ cmovb rax, rsi
+ mov qword ptr [rbp-0x28], rdi
+ mov qword ptr [rbp-0x20], rax
+ mov esi, 5
+ jmp G_M55226_IG12
+ ;; size=86 bbWeight=0.50 PerfScore 12.38
+G_M55226_IG05:
+ mov rdx, qword ptr [rbx+0x08]
+ mov esi, dword ptr [r15+0x08]
+ mulx rdi, rdx, rsi
mov rsi, rdi
- shr rsi, 32
- jne SHORT G_M55226_IG13
- ;; size=55 bbWeight=0.50 PerfScore 11.75
+ mov qword ptr [rbp-0x30], rdx
+ mov edx, dword ptr [rbx+0x04]
+ test edx, edx
+ jne SHORT G_M55226_IG07
+ ;; size=27 bbWeight=0.50 PerfScore 5.75
+G_M55226_IG06:
+ mov rdx, rsi
+ jmp SHORT G_M55226_IG11
+ align [0 bytes for IG13]
+ ;; size=5 bbWeight=0.25 PerfScore 0.56
G_M55226_IG07:
- mov dword ptr [rbp-0x28], edi
+ mov esi, dword ptr [r15+0x08]
+ mov edx, edx
+ imul rsi, rdx
+ add rsi, rdi
+ mov rdx, rsi
+ shr rdx, 32
+ jne SHORT G_M55226_IG09
+ ;; size=22 bbWeight=0.50 PerfScore 3.12
+G_M55226_IG08:
+ mov rdx, rsi
+ jmp SHORT G_M55226_IG11
+ ;; size=5 bbWeight=0.25 PerfScore 0.56
+G_M55226_IG09:
+ mov qword ptr [rbp-0x28], rsi
+ jmp SHORT G_M55226_IG18
+ ;; size=6 bbWeight=0.50 PerfScore 1.50
+G_M55226_IG10:
+ mov esi, dword ptr [r15+0x04]
+ or esi, dword ptr [r15+0x0C]
+ je G_M55226_IG21
+ mov edx, dword ptr [rbx+0x08]
+ mulx rsi, rdi, qword ptr [r15+0x08]
+ mov rdx, rsi
+ mov qword ptr [rbp-0x30], rdi
+ mov edi, dword ptr [r15+0x04]
+ test edi, edi
+ je SHORT G_M55226_IG11
+ mov edx, dword ptr [rbx+0x08]
+ imul rdx, rdi
+ add rdx, rsi
+ mov rdi, rdx
+ shr rdi, 32
+ jne SHORT G_M55226_IG17
+ ;; size=57 bbWeight=0.50 PerfScore 11.75
+G_M55226_IG11:
+ mov dword ptr [rbp-0x28], edx
mov esi, 2
;; size=8 bbWeight=0.50 PerfScore 0.62
-G_M55226_IG08:
- lea rdi, bword ptr [rbp-0x30]
- mov edx, esi
- cmp dword ptr [rdi+4*rdx], 0
- jne SHORT G_M55226_IG10
+G_M55226_IG12:
+ lea rdx, bword ptr [rbp-0x30]
+ mov edi, esi
+ cmp dword ptr [rdx+4*rdi], 0
+ jne SHORT G_M55226_IG14
mov esi, esi
;; size=14 bbWeight=0.50 PerfScore 2.00
-G_M55226_IG09:
+G_M55226_IG13:
test esi, esi
- je SHORT G_M55226_IG18
+ je SHORT G_M55226_IG22
dec esi
lea rdi, bword ptr [rbp-0x30]
cmp dword ptr [rdi+4*rsi], 0
- je SHORT G_M55226_IG09
+ je SHORT G_M55226_IG13
;; size=16 bbWeight=4 PerfScore 20.00
-G_M55226_IG10:
+G_M55226_IG14:
cmp esi, 2
- jle SHORT G_M55226_IG12
+ jle SHORT G_M55226_IG16
;; size=5 bbWeight=0.50 PerfScore 0.62
-G_M55226_IG11:
+G_M55226_IG15:
mov edx, dword ptr [rbp-0x14]
- jmp SHORT G_M55226_IG15
+ jmp SHORT G_M55226_IG19
;; size=5 bbWeight=0.25 PerfScore 0.75
-G_M55226_IG12:
+G_M55226_IG16:
mov edx, dword ptr [rbp-0x14]
cmp edx, 28
- jle SHORT G_M55226_IG16
- jmp SHORT G_M55226_IG15
+ jle SHORT G_M55226_IG20
+ jmp SHORT G_M55226_IG19
;; size=10 bbWeight=0.50 PerfScore 2.12
-G_M55226_IG13:
- mov qword ptr [rbp-0x28], rdi
+G_M55226_IG17:
+ mov qword ptr [rbp-0x28], rdx
;; size=4 bbWeight=0.50 PerfScore 0.50
-G_M55226_IG14:
+G_M55226_IG18:
mov esi, 3
mov edx, dword ptr [rbp-0x14]
;; size=8 bbWeight=0.50 PerfScore 0.62
-G_M55226_IG15:
+G_M55226_IG19:
lea rdi, [rbp-0x30]
mov rax, 0xD1FFAB1E ; code for System.Decimal+DecCalc:ScaleResult(byref,int,int):int
call [rax]System.Decimal+DecCalc:ScaleResult(byref,int,int):int
mov edx, eax
;; size=18 bbWeight=0.50 PerfScore 2.00
-G_M55226_IG16:
+G_M55226_IG20:
mov rax, qword ptr [rbp-0x30]
mov qword ptr [rbx+0x08], rax
mov eax, dword ptr [rbp-0x28]
mov dword ptr [rbx+0x04], eax
- jmp SHORT G_M55226_IG23
+ jmp SHORT G_M55226_IG27
;; size=16 bbWeight=0.50 PerfScore 3.00
-G_M55226_IG17:
+G_M55226_IG21:
mov ecx, dword ptr [rbx+0x08]
mov edi, dword ptr [r15+0x08]
imul rcx, rdi
mov edx, dword ptr [rbp-0x14]
cmp edx, 28
- jle SHORT G_M55226_IG22
+ jle SHORT G_M55226_IG26
cmp edx, 47
mov dword ptr [rbp-0x14], edx
- jle SHORT G_M55226_IG19
+ jle SHORT G_M55226_IG23
;; size=27 bbWeight=0.50 PerfScore 5.25
-G_M55226_IG18:
+G_M55226_IG22:
vxorps xmm0, xmm0, xmm0
vmovups xmmword ptr [rbx], xmm0
- jmp SHORT G_M55226_IG24
+ jmp SHORT G_M55226_IG28
;; size=10 bbWeight=0.50 PerfScore 1.67
-G_M55226_IG19:
+G_M55226_IG23:
mov edx, dword ptr [rbp-0x14]
add edx, -29
mov eax, edx
mov rdx, 0xD1FFAB1E ; static handle
mov rdi, qword ptr [rdx+8*rax]
mov rax, rcx
xor edx, edx
div rdx:rax, rdi
mov rdx, rax
imul rdx, rdi
sub rcx, rdx
mov rdx, rax
shr rdi, 1
cmp rcx, rdi
- jb SHORT G_M55226_IG21
- ja SHORT G_M55226_IG20
+ jb SHORT G_M55226_IG25
+ ja SHORT G_M55226_IG24
test al, 1
- je SHORT G_M55226_IG21
+ je SHORT G_M55226_IG25
;; size=57 bbWeight=0.50 PerfScore 36.00
-G_M55226_IG20:
+G_M55226_IG24:
lea rdx, [rax+0x01]
;; size=4 bbWeight=0.50 PerfScore 0.25
-G_M55226_IG21:
+G_M55226_IG25:
mov eax, 28
mov rcx, rdx
mov edx, eax
;; size=10 bbWeight=0.50 PerfScore 0.38
-G_M55226_IG22:
+G_M55226_IG26:
mov qword ptr [rbx+0x08], rcx
;; size=4 bbWeight=0.50 PerfScore 0.50
-G_M55226_IG23:
+G_M55226_IG27:
mov eax, dword ptr [r15]
xor eax, dword ptr [rbx]
and eax, 0xD1FFAB1E
mov ecx, edx
shl ecx, 16
or eax, ecx
mov dword ptr [rbx], eax
;; size=19 bbWeight=0.50 PerfScore 3.12
-G_M55226_IG24:
- add rsp, 64
+G_M55226_IG28:
+ add rsp, 48
pop rbx
pop r15
pop rbp
ret
;; size=9 bbWeight=1 PerfScore 2.75
-; Total bytes of code 543, prolog size 19, PerfScore 144.92, instruction count 169, allocated bytes for code 543 (MethodHash=34b92845) for method System.Decimal+DecCalc:VarDecMul(byref,byref) (FullOpts)
+; Total bytes of code 552, prolog size 19, PerfScore 144.17, instruction count 170, allocated bytes for code 552 (MethodHash=34b92845) for method System.Decimal+DecCalc:VarDecMul(byref,byref) (FullOpts)
; ============================================================
```
9 (3.96 % of base) - System.Numerics.BigIntegerCalculator+InvariantDivisor:.ctor(nuint):this
```diff
; Assembly listing for method System.Numerics.BigIntegerCalculator+InvariantDivisor:.ctor(nuint):this (FullOpts)
; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
; FullOpts code
; optimized code
; rbp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 20 single block inlinees; 2 inlinees without PGO data
; Final local variable assignments
;
; V00 this [V00,T02] ( 6, 5 ) byref -> r15 this single-def
; V01 arg1 [V01,T00] ( 8, 7.50) long -> rbx single-def
; V02 loc0 [V02,T04] ( 5, 4 ) int -> r14
-; V03 loc1 [V03,T03] ( 6, 4.50) long -> rdi
+; V03 loc1 [V03,T03] ( 6, 4.50) long -> rax
;* V04 loc2 [V04 ] ( 0, 0 ) long -> zero-ref
-; V05 loc3 [V05,T11] ( 3, 1.50) long -> rax
+; V05 loc3 [V05,T11] ( 3, 1.50) long -> rcx
;# V06 OutArgs [V06 ] ( 1, 1 ) struct ( 0) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V07 tmp1 [V07 ] ( 0, 0 ) long -> zero-ref "dup spill"
;* V08 tmp2 [V08 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V09 tmp3 [V09 ] ( 0, 0 ) struct (16) zero-ref "dup spill"
;* V10 tmp4 [V10 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V11 tmp5 [V11 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V12 tmp6 [V12 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V13 tmp7 [V13 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V14 tmp8 [V14 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V15 tmp9 [V15 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V16 tmp10 [V16 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V17 tmp11 [V17 ] ( 0, 0 ) struct (16) zero-ref multireg-arg "Inline return value spill temp"
; V18 tmp12 [V18,T01] ( 6, 8 ) int -> rsi "Inlining Arg"
;* V19 tmp13 [V19 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V20 tmp14 [V20 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V21 tmp15 [V21 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V22 tmp16 [V22 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V23 tmp17 [V23 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V24 tmp18 [V24 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op "NewObj constructor temp"
; V25 tmp19 [V25,T05] ( 2, 4 ) struct (32) [rbp-0x40] do-not-enreg[DAS] defined-via-address "location for address-of(RValue)"
;* V26 tmp20 [V26 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V27 tmp21 [V27 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V28 tmp22 [V28 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V29 tmp23 [V29 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V30 tmp24 [V30 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V31 tmp25 [V31 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V32 tmp26 [V32 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V33 tmp27 [V33 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V34 tmp28 [V34 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V35 tmp29 [V35 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V36 tmp30 [V36 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
; V37 tmp31 [V37,T07] ( 4, 3 ) long -> r13 "Inline stloc first use temp"
;* V38 tmp32 [V38 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V39 tmp33 [V39 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V40 tmp34 [V40 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V41 tmp35 [V41 ] ( 0, 0 ) long -> zero-ref "field V08._lower (fldOffset=0x0)" P-INDEP
;* V42 tmp36 [V42 ] ( 0, 0 ) long -> zero-ref "field V08._upper (fldOffset=0x8)" P-INDEP
;* V43 tmp37 [V43 ] ( 0, 0 ) long -> zero-ref "field V09._lower (fldOffset=0x0)" P-INDEP
;* V44 tmp38 [V44 ] ( 0, 0 ) long -> zero-ref "field V09._upper (fldOffset=0x8)" P-INDEP
;* V45 tmp39 [V45 ] ( 0, 0 ) long -> zero-ref "field V10._lower (fldOffset=0x0)" P-INDEP
;* V46 tmp40 [V46 ] ( 0, 0 ) long -> zero-ref "field V10._upper (fldOffset=0x8)" P-INDEP
-; V47 tmp41 [V47,T09] ( 3, 2.50) long -> rcx "field V11._lower (fldOffset=0x0)" P-INDEP
+; V47 tmp41 [V47,T09] ( 3, 2.50) long -> [rbp-0x48] spill-single-def "field V11._lower (fldOffset=0x0)" P-INDEP
;* V48 tmp42 [V48 ] ( 0, 0 ) long -> zero-ref "field V11._upper (fldOffset=0x8)" P-INDEP
;* V49 tmp43 [V49 ] ( 0, 0 ) long -> zero-ref "field V12._lower (fldOffset=0x0)" P-INDEP
;* V50 tmp44 [V50 ] ( 0, 0 ) long -> zero-ref "field V12._upper (fldOffset=0x8)" P-INDEP
;* V51 tmp45 [V51 ] ( 0, 0 ) long -> zero-ref "field V13._lower (fldOffset=0x0)" P-INDEP
;* V52 tmp46 [V52 ] ( 0, 0 ) long -> zero-ref "field V13._upper (fldOffset=0x8)" P-INDEP
;* V53 tmp47 [V53 ] ( 0, 0 ) long -> zero-ref "field V14._lower (fldOffset=0x0)" P-INDEP
;* V54 tmp48 [V54 ] ( 0, 0 ) long -> zero-ref "field V14._upper (fldOffset=0x8)" P-INDEP
;* V55 tmp49 [V55 ] ( 0, 0 ) long -> zero-ref "field V15._lower (fldOffset=0x0)" P-INDEP
;* V56 tmp50 [V56 ] ( 0, 0 ) long -> zero-ref "field V15._upper (fldOffset=0x8)" P-INDEP
;* V57 tmp51 [V57 ] ( 0, 0 ) long -> zero-ref "field V16._lower (fldOffset=0x0)" P-INDEP
;* V58 tmp52 [V58 ] ( 0, 0 ) long -> zero-ref "field V16._upper (fldOffset=0x8)" P-INDEP
; V59 tmp53 [V59,T06] ( 5, 3.50) long -> r13 "field V17._lower (fldOffset=0x0)" P-INDEP
; V60 tmp54 [V60,T08] ( 4, 2.50) long -> rdx "field V17._upper (fldOffset=0x8)" P-INDEP
; V61 tmp55 [V61,T12] ( 2, 1 ) long -> r13 "field V20._lower (fldOffset=0x0)" P-INDEP
; V62 tmp56 [V62,T13] ( 2, 1 ) long -> rdx "field V20._upper (fldOffset=0x8)" P-INDEP
;* V63 tmp57 [V63 ] ( 0, 0 ) long -> zero-ref "field V21._lower (fldOffset=0x0)" P-INDEP
; V64 tmp58 [V64,T14] ( 2, 1 ) long -> rdx "field V21._upper (fldOffset=0x8)" P-INDEP
;* V65 tmp59 [V65 ] ( 0, 0 ) long -> zero-ref "field V24._lower (fldOffset=0x0)" P-INDEP
;* V66 tmp60 [V66 ] ( 0, 0 ) long -> zero-ref "field V24._upper (fldOffset=0x8)" P-INDEP
;* V67 tmp61 [V67 ] ( 0, 0 ) long -> zero-ref "field V26._lower (fldOffset=0x0)" P-INDEP
;* V68 tmp62 [V68 ] ( 0, 0 ) long -> zero-ref "field V26._upper (fldOffset=0x8)" P-INDEP
;* V69 tmp63 [V69 ] ( 0, 0 ) long -> zero-ref "field V27._lower (fldOffset=0x0)" P-INDEP
;* V70 tmp64 [V70 ] ( 0, 0 ) long -> zero-ref "field V27._upper (fldOffset=0x8)" P-INDEP
;* V71 tmp65 [V71 ] ( 0, 0 ) long -> zero-ref "field V29._lower (fldOffset=0x0)" P-INDEP
;* V72 tmp66 [V72 ] ( 0, 0 ) long -> zero-ref "field V29._upper (fldOffset=0x8)" P-INDEP
;* V73 tmp67 [V73 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V33.Item1 (fldOffset=0x0)" P-DEP
;* V74 tmp68 [V74 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V33.Item2 (fldOffset=0x8)" P-DEP
-; V75 tmp69 [V75,T10] ( 2, 2 ) long -> rax "field V34.Item1 (fldOffset=0x0)" P-INDEP
+; V75 tmp69 [V75,T10] ( 2, 2 ) long -> rcx "field V34.Item1 (fldOffset=0x0)" P-INDEP
; V76 tmp70 [V76,T15] ( 1, 1 ) long -> rdx "field V34.Item2 (fldOffset=0x8)" P-INDEP
;* V77 tmp71 [V77 ] ( 0, 0 ) long -> zero-ref "field V39._lower (fldOffset=0x0)" P-INDEP
;* V78 tmp72 [V78 ] ( 0, 0 ) long -> zero-ref "field V39._upper (fldOffset=0x8)" P-INDEP
;
-; Lcl frame size = 32
+; Lcl frame size = 48
G_M16125_IG01:
push rbp
push r15
push r14
push r13
push rbx
- sub rsp, 32
- lea rbp, [rsp+0x40]
+ sub rsp, 48
+ lea rbp, [rsp+0x50]
mov r15, rdi
mov rbx, rsi
;; size=23 bbWeight=1 PerfScore 6.25
G_M16125_IG02:
mov qword ptr [r15], rbx
xor esi, esi
lzcnt rsi, rbx
mov r14d, esi
neg r14d
add r14d, 63
lea esi, [r14+0x40]
and esi, 127
test sil, 64
jne SHORT G_M16125_IG05
;; size=33 bbWeight=1 PerfScore 6.00
G_M16125_IG03:
test esi, esi
jne SHORT G_M16125_IG04
mov r13d, 1
xor edx, edx
jmp SHORT G_M16125_IG06
;; size=14 bbWeight=0.50 PerfScore 1.88
G_M16125_IG04:
mov edx, 1
shlx r13, rdx, rsi
neg esi
add esi, 64
shrx rdx, rdx, rsi
jmp SHORT G_M16125_IG06
;; size=22 bbWeight=0.50 PerfScore 1.88
G_M16125_IG05:
mov edx, 1
shlx rdx, rdx, rsi
xor r13d, r13d
;; size=13 bbWeight=0.50 PerfScore 0.50
G_M16125_IG06:
mov rsi, r13
mov rcx, rbx
xor r8d, r8d
lea rdi, [rbp-0x40]
mov rax, 0xD1FFAB1E ; code for System.UInt128:DivRem(System.UInt128,System.UInt128):System.ValueTuple`2[System.UInt128,System.UInt128]
call [rax]System.UInt128:DivRem(System.UInt128,System.UInt128):System.ValueTuple`2[System.UInt128,System.UInt128]
- mov rcx, qword ptr [rbp-0x40]
- mov rdi, rcx
- mov rax, rbx
- mul rdx:rax, rdi
- sub r13, rax
- mov rax, rbx
- sub rax, r13
+ mov rdx, qword ptr [rbp-0x40]
+ mov qword ptr [rbp-0x48], rdx
+ mov rax, rdx
+ mov rdx, rbx
+ mulx rdx, rcx, rax
+ sub r13, rcx
+ mov rcx, rbx
+ sub rcx, r13
mov edx, 1
shlx rdx, rdx, r14
- cmp rax, rdx
+ cmp rcx, rdx
jb SHORT G_M16125_IG10
- ;; size=62 bbWeight=1 PerfScore 11.75
+ ;; size=68 bbWeight=1 PerfScore 12.75
G_M16125_IG07:
- lea rdi, [rcx+rcx]
- lea rax, [r13+r13]
- cmp rax, rbx
+ mov rdx, qword ptr [rbp-0x48]
+ lea rax, [rdx+rdx]
+ lea rcx, [r13+r13]
+ cmp rcx, rbx
jae SHORT G_M16125_IG08
- cmp rax, r13
+ cmp rcx, r13
jae SHORT G_M16125_IG09
- ;; size=19 bbWeight=0.50 PerfScore 2.50
+ ;; size=23 bbWeight=0.50 PerfScore 3.00
G_M16125_IG08:
- inc rdi
+ inc rax
;; size=3 bbWeight=0.50 PerfScore 0.12
G_M16125_IG09:
or r14d, 128
mov byte ptr [r15+0x10], r14b
jmp SHORT G_M16125_IG11
;; size=13 bbWeight=0.50 PerfScore 1.62
G_M16125_IG10:
mov byte ptr [r15+0x10], r14b
;; size=4 bbWeight=0.50 PerfScore 0.50
G_M16125_IG11:
- lea rax, [rdi+0x01]
+ inc rax
mov qword ptr [r15+0x08], rax
- ;; size=8 bbWeight=1 PerfScore 1.50
+ ;; size=7 bbWeight=1 PerfScore 1.25
G_M16125_IG12:
- add rsp, 32
+ add rsp, 48
pop rbx
pop r13
pop r14
pop r15
pop rbp
ret
;; size=13 bbWeight=1 PerfScore 3.75
-; Total bytes of code 227, prolog size 17, PerfScore 38.25, instruction count 70, allocated bytes for code 227 (MethodHash=a116c102) for method System.Numerics.BigIntegerCalculator+InvariantDivisor:.ctor(nuint):this (FullOpts)
+; Total bytes of code 236, prolog size 17, PerfScore 39.50, instruction count 72, allocated bytes for code 236 (MethodHash=a116c102) for method System.Numerics.BigIntegerCalculator+InvariantDivisor:.ctor(nuint):this (FullOpts)
; ============================================================
```
7 (0.97 % of base) - System.Numerics.BigIntegerCalculator:DivideInvariant(System.ReadOnlySpan`1[nuint],System.Numerics.BigIntegerCalculator+InvariantDivisor,int,System.Span`1[nuint],byref)
```diff
; Assembly listing for method System.Numerics.BigIntegerCalculator:DivideInvariant(System.ReadOnlySpan`1[nuint],System.Numerics.BigIntegerCalculator+InvariantDivisor,int,System.Span`1[nuint],byref) (FullOpts)
; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
; FullOpts code
; optimized code
; rbp based frame
; fully interruptible
; No PGO data
; 0 inlinees with PGO data; 8 single block inlinees; 10 inlinees without PGO data
; Final local variable assignments
;
;* V00 arg0 [V00 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op single-def
; V01 arg1 [V01,T25] ( 3, 3 ) struct (24) [rbp+0x10] do-not-enreg[SF] ld-addr-op single-def
; V02 arg2 [V02,T06] ( 8, 10 ) int -> [rbp-0x2C] single-def
;* V03 arg3 [V03 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op single-def
; V04 arg4 [V04,T01] ( 14, 22 ) byref -> r9 single-def
-; V05 loc0 [V05,T20] ( 3, 5 ) ubyte -> r10
+; V05 loc0 [V05,T20] ( 3, 5 ) ubyte -> rax
; V06 loc1 [V06,T26] ( 3, 3 ) long -> [rbp-0x38] spill-single-def
-; V07 loc2 [V07,T02] ( 17, 23.02) int -> r15
+; V07 loc2 [V07,T02] ( 17, 23.02) int -> r10
;* V08 loc3 [V08 ] ( 0, 0 ) long -> zero-ref
; V09 loc4 [V09,T00] ( 16, 28 ) long -> r11
;* V10 loc5 [V10 ] ( 0, 0 ) long -> zero-ref
;* V11 loc6 [V11 ] ( 0, 0 ) long -> zero-ref
;* V12 loc7 [V12 ] ( 0, 0 ) long -> zero-ref
;* V13 loc8 [V13 ] ( 0, 0 ) long -> zero-ref
;* V14 loc9 [V14 ] ( 0, 0 ) long -> zero-ref
;# V15 OutArgs [V15 ] ( 1, 1 ) struct ( 0) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V16 tmp1 [V16 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
-; V17 tmp2 [V17,T03] ( 14, 20 ) long -> [rbp-0x40] "Inline stloc first use temp"
+; V17 tmp2 [V17,T03] ( 14, 20 ) long -> registers "Inline stloc first use temp"
; V18 tmp3 [V18,T17] ( 6, 6 ) long -> registers
;* V19 tmp4 [V19 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
-; V20 tmp5 [V20,T04] ( 12, 20 ) long -> [rbp-0x48] "Inline stloc first use temp"
+; V20 tmp5 [V20,T04] ( 12, 20 ) long -> registers "Inline stloc first use temp"
;* V21 tmp6 [V21 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V22 tmp7 [V22 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V23 tmp8 [V23 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V24 tmp9 [V24 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V25 tmp10 [V25 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V26 tmp11 [V26,T05] ( 12, 20 ) long -> rax "Inline stloc first use temp"
+; V26 tmp11 [V26,T05] ( 12, 20 ) long -> registers "Inline stloc first use temp"
;* V27 tmp12 [V27 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V28 tmp13 [V28 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V29 tmp14 [V29 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V30 tmp15 [V30 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V31 tmp16 [V31 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V32 tmp17 [V32 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V33 tmp18 [V33 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V34 tmp19 [V34 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V35 tmp20 [V35 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V36 tmp21 [V36 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V37 tmp22 [V37 ] ( 0, 0 ) struct (16) zero-ref "Inline stloc first use temp"
;* V38 tmp23 [V38 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V39 tmp24 [V39 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V40 tmp25 [V40 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V41 tmp26 [V41 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V42 tmp27 [V42 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V43 tmp28 [V43 ] ( 0, 0 ) struct (16) zero-ref "Inline stloc first use temp"
; V44 tmp29 [V44,T28] ( 3, 2 ) long -> rax "Inline return value spill temp"
; V45 tmp30 [V45,T22] ( 3, 4 ) long -> rax "Inlining Arg"
;* V46 tmp31 [V46 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
; V47 tmp32 [V47,T11] ( 6, 7.50) byref -> rdi single-def "field V00._reference (fldOffset=0x0)" P-INDEP
; V48 tmp33 [V48,T15] ( 7, 6.98) int -> rsi single-def "field V00._length (fldOffset=0x8)" P-INDEP
-; V49 tmp34 [V49,T19] ( 3, 3 ) byref -> [rbp-0x58] single-def "field V03._reference (fldOffset=0x0)" P-INDEP
-; V50 tmp35 [V50,T21] ( 4, 2.52) int -> r8 single-def "field V03._length (fldOffset=0x8)" P-INDEP
+; V49 tmp34 [V49,T19] ( 3, 3 ) byref -> [rbp-0x50] single-def "field V03._reference (fldOffset=0x0)" P-INDEP
+; V50 tmp35 [V50,T21] ( 4, 2.52) int -> [rbp-0x3C] single-def "field V03._length (fldOffset=0x8)" P-INDEP
;* V51 tmp36 [V51 ] ( 0, 0 ) byref -> zero-ref "field V16._reference (fldOffset=0x0)" P-INDEP
;* V52 tmp37 [V52 ] ( 0, 0 ) int -> zero-ref "field V16._length (fldOffset=0x8)" P-INDEP
;* V53 tmp38 [V53 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V24.Item1 (fldOffset=0x0)" P-DEP
;* V54 tmp39 [V54 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V24.Item2 (fldOffset=0x8)" P-DEP
-; V55 tmp40 [V55,T23] ( 2, 4 ) long -> rax "field V25.Item1 (fldOffset=0x0)" P-INDEP
+; V55 tmp40 [V55,T23] ( 2, 4 ) long -> registers "field V25.Item1 (fldOffset=0x0)" P-INDEP
; V56 tmp41 [V56,T07] ( 8, 12 ) long -> rdx "field V25.Item2 (fldOffset=0x8)" P-INDEP
;* V57 tmp42 [V57 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V30.Item1 (fldOffset=0x0)" P-DEP
;* V58 tmp43 [V58 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V30.Item2 (fldOffset=0x8)" P-DEP
-; V59 tmp44 [V59,T24] ( 2, 4 ) long -> rax "field V31.Item1 (fldOffset=0x0)" P-INDEP
-; V60 tmp45 [V60,T08] ( 8, 12 ) long -> rdx "field V31.Item2 (fldOffset=0x8)" P-INDEP
+; V59 tmp44 [V59,T24] ( 2, 4 ) long -> r8 "field V31.Item1 (fldOffset=0x0)" P-INDEP
+; V60 tmp45 [V60,T08] ( 8, 12 ) long -> registers "field V31.Item2 (fldOffset=0x8)" P-INDEP
;* V61 tmp46 [V61 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V36.Item1 (fldOffset=0x0)" P-DEP
;* V62 tmp47 [V62 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V36.Item2 (fldOffset=0x8)" P-DEP
;* V63 tmp48 [V63 ] ( 0, 0 ) long -> zero-ref "field V37.Item1 (fldOffset=0x0)" P-INDEP
;* V64 tmp49 [V64 ] ( 0, 0 ) long -> zero-ref "field V37.Item2 (fldOffset=0x8)" P-INDEP
;* V65 tmp50 [V65 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V42.Item1 (fldOffset=0x0)" P-DEP
;* V66 tmp51 [V66 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V42.Item2 (fldOffset=0x8)" P-DEP
;* V67 tmp52 [V67 ] ( 0, 0 ) long -> zero-ref "field V43.Item1 (fldOffset=0x0)" P-INDEP
;* V68 tmp53 [V68 ] ( 0, 0 ) long -> zero-ref "field V43.Item2 (fldOffset=0x8)" P-INDEP
;* V69 tmp54 [V69 ] ( 0, 0 ) byref -> zero-ref single-def "field V46._reference (fldOffset=0x0)" P-INDEP
;* V70 tmp55 [V70 ] ( 0, 0 ) int -> zero-ref "field V46._length (fldOffset=0x8)" P-INDEP
-; V71 tmp56 [V71,T12] ( 5, 9 ) long -> r14 "V01.[000..008)"
-; V72 tmp57 [V72,T13] ( 5, 9 ) long -> r13 "V01.[008..016)"
-; V73 tmp58 [V73,T14] ( 5, 9 ) ubyte -> r12 "V01.[016..017)"
-; V74 cse0 [V74,T09] ( 6, 12 ) int -> rcx multi-def "CSE #04: moderate"
-; V75 cse1 [V75,T10] ( 6, 12 ) int -> [rbp-0x4C] multi-def "CSE #05: moderate"
-; V76 cse2 [V76,T16] ( 4, 7.92) int -> rax "CSE #03: moderate"
-; V77 cse3 [V77,T18] ( 6, 5 ) int -> [rbp-0x50] spill-single-def "CSE #02: moderate"
-; V78 cse4 [V78,T27] ( 3, 3 ) long -> rax "CSE #01: moderate"
+; V71 tmp56 [V71,T12] ( 5, 9 ) long -> r15 "V01.[000..008)"
+; V72 tmp57 [V72,T13] ( 5, 9 ) long -> r14 "V01.[008..016)"
+; V73 tmp58 [V73,T14] ( 5, 9 ) ubyte -> r13 "V01.[016..017)"
+; V74 cse0 [V74,T09] ( 6, 12 ) int -> registers multi-def "CSE #04: moderate"
+; V75 cse1 [V75,T10] ( 6, 12 ) int -> [rbp-0x40] multi-def "CSE #05: moderate"
+; V76 cse2 [V76,T16] ( 4, 7.92) int -> r12 "CSE #03: moderate"
+; V77 cse3 [V77,T18] ( 6, 5 ) int -> [rbp-0x44] spill-single-def "CSE #02: moderate"
+; V78 cse4 [V78,T27] ( 3, 3 ) long -> r10 "CSE #01: moderate"
; V79 cse5 [V79,T29] ( 3, 0.06) int -> rcx "CSE #07: conservative"
-; TEMP_01 long -> [rbp-0x60]
+; TEMP_01 long -> [rbp-0x58]
;
; Lcl frame size = 56
G_M28442_IG01:
push rbp
push r15
push r14
push r13
push r12
push rbx
sub rsp, 56
lea rbp, [rsp+0x60]
- mov bword ptr [rbp-0x58], rcx
+ mov bword ptr [rbp-0x50], rcx
;; size=23 bbWeight=1 PerfScore 7.75
G_M28442_IG02:
test r8d, r8d
- setne r10b
- movzx r10, r10b
- mov rax, qword ptr [r9]
- mov r11, rax
+ setne al
+ movzx rax, al
+ mov r10, qword ptr [r9]
+ mov r11, r10
mov qword ptr [rbp-0x38], r11
mov ebx, edx
and ebx, 63
- mov dword ptr [rbp-0x50], ebx
- shrx rax, rax, rbx
- mov qword ptr [r9], rax
- lea r15d, [rsi-0x01]
- mov r14, qword ptr [rbp+0x10]
- mov r13, qword ptr [rbp+0x18]
- movzx r12, byte ptr [rbp+0x20]
- test r15d, r15d
+ mov dword ptr [rbp-0x44], ebx
+ shrx r10, r10, rbx
+ mov qword ptr [r9], r10
+ lea r10d, [rsi-0x01]
+ mov r15, qword ptr [rbp+0x10]
+ mov r14, qword ptr [rbp+0x18]
+ movzx r13, byte ptr [rbp+0x20]
+ test r10d, r10d
jge SHORT G_M28442_IG06
- ;; size=59 bbWeight=1 PerfScore 12.00
+ ;; size=57 bbWeight=1 PerfScore 12.00
G_M28442_IG03:
mov dword ptr [rbp-0x2C], edx
;; size=3 bbWeight=0.50 PerfScore 0.50
G_M28442_IG04:
mov rax, qword ptr [r9]
cmp dword ptr [rbp-0x2C], 0
je G_M28442_IG35
;; size=13 bbWeight=1 PerfScore 4.00
G_M28442_IG05:
- mov ebx, dword ptr [rbp-0x50]
+ mov ebx, dword ptr [rbp-0x44]
shlx rax, rax, rbx
test esi, esi
je G_M28442_IG37
and ebx, 63
bzhi rcx, qword ptr [rdi], rbx
or rax, rcx
jmp G_M28442_IG35
;; size=32 bbWeight=0.50 PerfScore 4.12
G_M28442_IG06:
- cmp r15d, esi
+ cmp r10d, esi
jge G_M28442_IG33
- cmp r15d, r8d
+ mov dword ptr [rbp-0x3C], r8d
+ cmp r10d, r8d
+ mov r8d, dword ptr [rbp-0x3C]
jge G_M28442_IG33
jmp G_M28442_IG19
- ;; size=23 bbWeight=0.50 PerfScore 2.25
+ ;; size=31 bbWeight=0.50 PerfScore 3.25
G_M28442_IG07:
shrx r8, r8, rbx
- lea eax, [r15+0x01]
- cmp eax, esi
+ lea r12d, [r10+0x01]
+ cmp r12d, esi
jge SHORT G_M28442_IG08
- cmp eax, esi
+ cmp r12d, esi
jae G_M28442_IG37
- mov rax, qword ptr [rdi+8*rax]
+ mov r12, qword ptr [rdi+8*r12]
jmp SHORT G_M28442_IG09
- ;; size=27 bbWeight=1.98 PerfScore 14.85
+ ;; size=29 bbWeight=1.98 PerfScore 14.85
G_M28442_IG08:
- mov rax, r11
+ mov r12, r11
;; size=3 bbWeight=1.98 PerfScore 0.49
G_M28442_IG09:
mov dword ptr [rbp-0x2C], edx
mov r11d, edx
neg r11d
add r11d, 64
- shlx rax, rax, r11
- or r8, rax
- mov ebx, dword ptr [rbp-0x50]
+ shlx r11, r12, r11
+ or r8, r11
+ mov ebx, dword ptr [rbp-0x44]
;; size=24 bbWeight=1.98 PerfScore 6.93
G_M28442_IG10:
- mov rax, qword ptr [r9]
- shl rax, 32
+ mov r12, qword ptr [r9]
+ shl r12, 32
mov r11, r8
shr r11, 32
- or r11, rax
- mov rax, r11
- mul rdx:rax, r13
- mov rax, rdx
- mov ecx, r12d
+ or r11, r12
+ mov rdx, r11
+ mulx rdx, r12, r14
+ mov r12, rdx
+ mov ecx, r13d
and ecx, 128
jne SHORT G_M28442_IG12
- ;; size=37 bbWeight=3.96 PerfScore 33.66
+ ;; size=39 bbWeight=3.96 PerfScore 33.66
G_M28442_IG11:
jmp SHORT G_M28442_IG13
;; size=2 bbWeight=1.98 PerfScore 3.96
G_M28442_IG12:
- mov rax, r11
- sub rax, rdx
- shr rax, 1
- add rax, rdx
+ mov r12, r11
+ sub r12, rdx
+ shr r12, 1
+ add r12, rdx
;; size=12 bbWeight=1.98 PerfScore 2.48
G_M28442_IG13:
- mov edx, r12d
+ mov edx, r13d
and edx, 63
- mov dword ptr [rbp-0x4C], edx
- shrx rax, rax, rdx
- mov qword ptr [rbp-0x48], rax
- mov rbx, rax
- imul rbx, r14
+ mov dword ptr [rbp-0x40], edx
+ shrx r12, r12, rdx
+ mov rbx, r12
+ imul rbx, r15
sub r11, rbx
mov qword ptr [r9], r11
mov r11, qword ptr [r9]
shl r11, 32
mov r8d, r8d
or r11, r8
- mov rax, r11
- mul rdx:rax, r13
- mov rax, rdx
+ mov rdx, r11
+ mulx rbx, r8, r14
+ mov rdx, rbx
test ecx, ecx
je SHORT G_M28442_IG15
- ;; size=57 bbWeight=3.96 PerfScore 56.43
+ ;; size=55 bbWeight=3.96 PerfScore 52.47
G_M28442_IG14:
- mov rax, r11
- sub rax, rdx
- shr rax, 1
- add rax, rdx
+ mov rdx, r11
+ sub rdx, rbx
+ shr rdx, 1
+ add rdx, rbx
;; size=12 bbWeight=1.98 PerfScore 2.48
G_M28442_IG15:
- mov edx, dword ptr [rbp-0x4C]
- shrx rax, rax, rdx
- mov rdx, rax
- imul rdx, r14
- sub r11, rdx
+ mov r8d, dword ptr [rbp-0x40]
+ shrx rdx, rdx, r8
+ mov rcx, rdx
+ imul rcx, r15
+ sub r11, rcx
mov qword ptr [r9], r11
- test r10d, r10d
+ test eax, eax
je SHORT G_M28442_IG17
;; size=26 bbWeight=3.96 PerfScore 24.75
G_M28442_IG16:
- mov edx, r15d
- mov rcx, qword ptr [rbp-0x48]
- shl rcx, 32
- or rax, rcx
- mov rcx, bword ptr [rbp-0x58]
- mov qword ptr [rcx+8*rdx], rax
- ;; size=22 bbWeight=1.98 PerfScore 7.92
+ mov r8d, r10d
+ shl r12, 32
+ or rdx, r12
+ mov rcx, bword ptr [rbp-0x50]
+ mov qword ptr [rcx+8*r8], rdx
+ ;; size=18 bbWeight=1.98 PerfScore 5.94
G_M28442_IG17:
- dec r15d
+ dec r10d
mov r11, qword ptr [rbp-0x38]
js G_M28442_IG04
;; size=13 bbWeight=3.96 PerfScore 8.91
G_M28442_IG18:
mov edx, dword ptr [rbp-0x2C]
- mov ebx, dword ptr [rbp-0x50]
+ mov ebx, dword ptr [rbp-0x44]
;; size=6 bbWeight=1.98 PerfScore 3.96
G_M28442_IG19:
- mov eax, r15d
- mov r8, qword ptr [rdi+8*rax]
+ mov r8d, r10d
+ mov r8, qword ptr [rdi+8*r8]
test edx, edx
jne G_M28442_IG07
;; size=15 bbWeight=3.96 PerfScore 13.86
G_M28442_IG20:
mov dword ptr [rbp-0x2C], edx
jmp G_M28442_IG10
;; size=8 bbWeight=1.98 PerfScore 5.94
G_M28442_IG21:
- shrx rax, rax, rbx
- lea ecx, [r15+0x01]
+ shrx r12, r12, rbx
+ lea ecx, [r10+0x01]
cmp ecx, esi
jge SHORT G_M28442_IG22
mov rcx, qword ptr [rdi+8*rcx]
jmp SHORT G_M28442_IG23
;; size=19 bbWeight=0.02 PerfScore 0.13
G_M28442_IG22:
mov rcx, r11
;; size=3 bbWeight=0.02 PerfScore 0.01
G_M28442_IG23:
mov dword ptr [rbp-0x2C], edx
mov r11d, edx
neg r11d
add r11d, 64
shlx rcx, rcx, r11
- or rcx, rax
- mov rax, rcx
- mov ebx, dword ptr [rbp-0x50]
- ;; size=27 bbWeight=0.02 PerfScore 0.08
+ or rcx, r12
+ mov r12, rcx
+ ;; size=24 bbWeight=0.02 PerfScore 0.06
G_M28442_IG24:
mov r11, qword ptr [r9]
shl r11, 32
- mov qword ptr [rbp-0x60], r11
- mov qword ptr [rbp-0x40], rax
- mov r11, rax
+ mov qword ptr [rbp-0x58], r11
+ mov r11, r12
shr r11, 32
- or r11, qword ptr [rbp-0x60]
- mov rax, r11
- mul rdx:rax, r13
- mov rax, rdx
- mov ecx, r12d
- and ecx, 128
+ or r11, qword ptr [rbp-0x58]
+ mov rdx, r11
+ mulx rcx, rdx, r14
+ mov rdx, rcx
+ mov ebx, r13d
+ and ebx, 128
jne SHORT G_M28442_IG26
- ;; size=46 bbWeight=0.04 PerfScore 0.45
+ ;; size=44 bbWeight=0.04 PerfScore 0.41
G_M28442_IG25:
+ mov dword ptr [rbp-0x3C], r8d
jmp SHORT G_M28442_IG27
- ;; size=2 bbWeight=0.02 PerfScore 0.04
+ ;; size=6 bbWeight=0.02 PerfScore 0.06
G_M28442_IG26:
- mov rax, r11
- sub rax, rdx
- shr rax, 1
- add rax, rdx
- ;; size=12 bbWeight=0.02 PerfScore 0.03
+ mov rcx, r11
+ sub rcx, rdx
+ shr rcx, 1
+ add rcx, rdx
+ mov dword ptr [rbp-0x3C], r8d
+ ;; size=16 bbWeight=0.02 PerfScore 0.05
G_M28442_IG27:
- mov edx, r12d
+ mov edx, r13d
and edx, 63
- mov dword ptr [rbp-0x4C], edx
- shrx rax, rax, rdx
- mov qword ptr [rbp-0x48], rax
- mov rbx, rax
- imul rbx, r14
- sub r11, rbx
+ mov dword ptr [rbp-0x40], edx
+ shrx rcx, rcx, rdx
+ mov r8, rcx
+ imul r8, r15
+ sub r11, r8
mov qword ptr [r9], r11
mov r11, qword ptr [r9]
shl r11, 32
- mov ebx, dword ptr [rbp-0x40]
- or r11, rbx
- mov rax, r11
- mul rdx:rax, r13
- mov rax, rdx
- test ecx, ecx
+ mov r8d, r12d
+ or r11, r8
+ mov rdx, r11
+ mulx rdx, r8, r14
+ mov r8, rdx
+ test ebx, ebx
je SHORT G_M28442_IG29
- ;; size=57 bbWeight=0.04 PerfScore 0.60
+ ;; size=55 bbWeight=0.04 PerfScore 0.53
G_M28442_IG28:
- mov rax, r11
- sub rax, rdx
- shr rax, 1
- add rax, rdx
+ mov r8, r11
+ sub r8, rdx
+ shr r8, 1
+ add r8, rdx
;; size=12 bbWeight=0.02 PerfScore 0.03
G_M28442_IG29:
- mov edx, dword ptr [rbp-0x4C]
- shrx rax, rax, rdx
- mov rcx, rax
- imul rcx, r14
- mov rdx, r11
- sub rdx, rcx
- mov qword ptr [r9], rdx
- test r10d, r10d
+ mov edx, dword ptr [rbp-0x40]
+ shrx r8, r8, rdx
+ mov rdx, r8
+ imul rdx, r15
+ sub r11, rdx
+ mov qword ptr [r9], r11
+ test eax, eax
je SHORT G_M28442_IG31
- ;; size=29 bbWeight=0.04 PerfScore 0.26
+ ;; size=25 bbWeight=0.04 PerfScore 0.25
G_M28442_IG30:
- cmp r15d, r8d
+ mov edx, dword ptr [rbp-0x3C]
+ cmp r10d, edx
jae SHORT G_M28442_IG37
- mov ecx, r15d
- mov rdx, qword ptr [rbp-0x48]
- shl rdx, 32
- or rdx, rax
- mov rax, bword ptr [rbp-0x58]
- mov qword ptr [rax+8*rcx], rdx
- mov bword ptr [rbp-0x58], rax
- ;; size=31 bbWeight=0.02 PerfScore 0.13
+ mov r11d, r10d
+ shl rcx, 32
+ or rcx, r8
+ mov r8, bword ptr [rbp-0x50]
+ mov qword ptr [r8+8*r11], rcx
+ mov bword ptr [rbp-0x50], r8
+ mov dword ptr [rbp-0x3C], edx
+ ;; size=33 bbWeight=0.02 PerfScore 0.15
G_M28442_IG31:
- dec r15d
+ dec r10d
+ mov r8d, dword ptr [rbp-0x3C]
mov r11, qword ptr [rbp-0x38]
js G_M28442_IG04
- ;; size=13 bbWeight=0.04 PerfScore 0.09
+ ;; size=17 bbWeight=0.04 PerfScore 0.13
G_M28442_IG32:
mov edx, dword ptr [rbp-0x2C]
- mov ebx, dword ptr [rbp-0x50]
+ mov ebx, dword ptr [rbp-0x44]
;; size=6 bbWeight=0.02 PerfScore 0.04
G_M28442_IG33:
- mov eax, r15d
- mov rax, qword ptr [rdi+8*rax]
+ mov r12d, r10d
+ mov r12, qword ptr [rdi+8*r12]
test edx, edx
jne G_M28442_IG21
;; size=15 bbWeight=0.04 PerfScore 0.14
G_M28442_IG34:
mov dword ptr [rbp-0x2C], edx
jmp G_M28442_IG24
;; size=8 bbWeight=0.02 PerfScore 0.06
G_M28442_IG35:
mov qword ptr [r9], rax
;; size=3 bbWeight=1 PerfScore 1.00
G_M28442_IG36:
add rsp, 56
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
ret
;; size=15 bbWeight=1 PerfScore 4.25
G_M28442_IG37:
call CORINFO_HELP_RNGCHKFAIL
int3
;; size=6 bbWeight=0 PerfScore 0.00
-; Total bytes of code 721, prolog size 23, PerfScore 224.55, instruction count 217, allocated bytes for code 721 (MethodHash=33d590e5) for method System.Numerics.BigIntegerCalculator:DivideInvariant(System.ReadOnlySpan`1[nuint],System.Numerics.BigIntegerCalculator+InvariantDivisor,int,System.Span`1[nuint],byref) (FullOpts)
+; Total bytes of code 728, prolog size 23, PerfScore 219.57, instruction count 217, allocated bytes for code 728 (MethodHash=33d590e5) for method System.Numerics.BigIntegerCalculator:DivideInvariant(System.ReadOnlySpan`1[nuint],System.Numerics.BigIntegerCalculator+InvariantDivisor,int,System.Span`1[nuint],byref) (FullOpts)
; ============================================================
```
6 (0.29 % of base) - System.Number:DiyFp128Pow(System.Number+DiyFp128,System.Number+DiyFp128):System.Number+DiyFp128
```diff
; Assembly listing for method System.Number:DiyFp128Pow(System.Number+DiyFp128,System.Number+DiyFp128):System.Number+DiyFp128 (FullOpts)
; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
; FullOpts code
; optimized code
; rbp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 22 single block inlinees; 2 inlinees without PGO data
; Final local variable assignments
;
; V00 RetBuf [V00,T01] ( 7, 5 ) long -> rbx single-def
; V01 arg0 [V01 ] ( 4, 4 ) struct (24) [rbp+0x10] do-not-enreg[XSF] addr-exposed ld-addr-op single-def
; V02 arg1 [V02,T08] ( 5, 3.50) struct (24) [rbp+0x28] do-not-enreg[SF] single-def
;* V03 loc0 [V03 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op
; V04 loc1 [V04 ] ( 15, 9 ) struct (24) [rbp-0x40] do-not-enreg[XS] addr-exposed ld-addr-op
;* V05 loc2 [V05 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op
; V06 loc3 [V06,T00] ( 20, 15.50) long -> r15
; V07 loc4 [V07 ] ( 2, 2 ) struct (24) [rbp-0x58] do-not-enreg[XDAS] addr-exposed defined-via-address ld-addr-op
; V08 loc5 [V08 ] ( 3, 2.50) struct (24) [rbp-0x70] do-not-enreg[XS] addr-exposed ld-addr-op
; V09 loc6 [V09 ] ( 15, 10 ) struct (24) [rbp-0x88] do-not-enreg[XS] addr-exposed ld-addr-op
; V10 loc7 [V10,T04] ( 8, 5 ) long -> r12
; V11 loc8 [V11,T06] ( 8, 4.50) long -> [rbp-0x90]
; V12 loc9 [V12,T03] ( 9, 5 ) int -> [rbp-0x94]
; V13 loc10 [V13 ] ( 3, 3 ) struct (24) [rbp-0xB0] do-not-enreg[XS] addr-exposed ld-addr-op
; V14 loc11 [V14 ] ( 10, 8.50) struct (24) [rbp-0xC8] do-not-enreg[XS] addr-exposed ld-addr-op
; V15 loc12 [V15 ] ( 2, 2 ) struct (24) [rbp-0xE0] do-not-enreg[XS] addr-exposed ld-addr-op
; V16 loc13 [V16,T14] ( 4, 2.50) long -> rcx
; V17 loc14 [V17,T15] ( 3, 2.50) long -> rdx
; V18 loc15 [V18,T11] ( 5, 2.50) long -> [rbp-0xE8]
; V19 loc16 [V19,T07] ( 7, 3.50) int -> [rbp-0xEC]
; V20 loc17 [V20 ] ( 3, 1.50) struct (24) [rbp-0x108] do-not-enreg[XS] addr-exposed ld-addr-op
; V21 loc18 [V21 ] ( 2, 1 ) struct (24) [rbp-0x120] do-not-enreg[XS] addr-exposed ld-addr-op
; V22 loc19 [V22 ] ( 2, 1 ) struct (24) [rbp-0x138] do-not-enreg[XS] addr-exposed ld-addr-op
; V23 loc20 [V23 ] ( 8, 4 ) struct (24) [rbp-0x150] do-not-enreg[XS] addr-exposed ld-addr-op
; V24 loc21 [V24 ] ( 3, 1.50) struct (24) [rbp-0x168] do-not-enreg[XS] addr-exposed ld-addr-op
; V25 loc22 [V25 ] ( 4, 2 ) struct (24) [rbp-0x180] do-not-enreg[XS] addr-exposed ld-addr-op
; V26 loc23 [V26,T33] ( 2, 1 ) long -> rcx
; V27 loc24 [V27 ] ( 30, 20 ) struct (72) [rbp-0x1C8] do-not-enreg[XS] addr-exposed ld-addr-op
; V28 loc25 [V28 ] ( 4, 4 ) struct (48) [rbp-0x1F8] do-not-enreg[XS] addr-exposed ld-addr-op
; V29 loc26 [V29 ] ( 2, 2 ) struct (24) [rbp-0x210] do-not-enreg[XDAS] addr-exposed defined-via-address ld-addr-op
; V30 loc27 [V30,T27] ( 3, 1.50) long -> rsi
; V31 loc28 [V31,T34] ( 2, 1 ) int -> rsi
; V32 loc29 [V32,T16] ( 4, 2 ) long -> rcx
;* V33 loc30 [V33 ] ( 0, 0 ) long -> zero-ref
;* V34 loc31 [V34 ] ( 0, 0 ) long -> zero-ref ld-addr-op
; V35 loc32 [V35 ] ( 5, 2.50) struct (24) [rbp-0x228] do-not-enreg[XS] addr-exposed ld-addr-op
; V36 loc33 [V36 ] ( 2, 1 ) struct (24) [rbp-0x240] do-not-enreg[XS] addr-exposed ld-addr-op
; V37 loc34 [V37 ] ( 2, 1 ) struct (24) [rbp-0x258] do-not-enreg[XS] addr-exposed ld-addr-op
; V38 loc35 [V38 ] ( 2, 1 ) struct (24) [rbp-0x270] do-not-enreg[XDAS] addr-exposed defined-via-address ld-addr-op
; V39 loc36 [V39,T12] ( 5, 2.50) int -> rdx
;* V40 loc37 [V40 ] ( 0, 0 ) long -> zero-ref
;* V41 loc38 [V41 ] ( 0, 0 ) int -> zero-ref
-; V42 loc39 [V42,T13] ( 5, 2.50) long -> r8
-; V43 loc40 [V43,T28] ( 3, 1.50) long -> rdi
+; V42 loc39 [V42,T13] ( 5, 2.50) long -> rdi
+; V43 loc40 [V43,T28] ( 3, 1.50) long -> rsi
;* V44 loc41 [V44 ] ( 0, 0 ) long -> zero-ref ld-addr-op
;# V45 OutArgs [V45 ] ( 1, 1 ) struct ( 0) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
; V46 tmp1 [V46,T19] ( 2, 2 ) byref -> [rbp-0x290] spill-single-def "impAppendStmt"
; V47 tmp2 [V47,T35] ( 2, 1 ) struct (24) [rbp-0x288] do-not-enreg[DAS] defined-via-address "stack copy for value returned via return buffer"
; V48 tmp3 [V48,T36] ( 2, 1 ) long -> rsi
;* V49 tmp4 [V49 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op "NewObj constructor temp"
;* V50 tmp5 [V50 ] ( 0, 0 ) struct (24) zero-ref ld-addr-op "NewObj constructor temp"
;* V51 tmp6 [V51 ] ( 0, 0 ) byref -> zero-ref single-def "impAppendStmt"
;* V52 tmp7 [V52 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op "NewObj constructor temp"
;* V53 tmp8 [V53 ] ( 0, 0 ) byref -> zero-ref single-def "impAppendStmt"
; V54 tmp9 [V54,T17] ( 4, 2 ) long -> rax
; V55 tmp10 [V55,T37] ( 2, 1 ) long -> rcx
;* V56 tmp11 [V56 ] ( 0, 0 ) struct (24) zero-ref ld-addr-op "NewObj constructor temp"
; V57 tmp12 [V57,T05] ( 5, 5 ) byref -> r8 single-def "impAppendStmt"
;* V58 tmp13 [V58 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op "NewObj constructor temp"
; V59 tmp14 [V59,T20] ( 2, 2 ) byref -> rsi single-def "impAppendStmt"
;* V60 tmp15 [V60 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op "NewObj constructor temp"
;* V61 tmp16 [V61 ] ( 0, 0 ) byref -> zero-ref single-def "impAppendStmt"
; V62 tmp17 [V62,T38] ( 2, 1 ) int -> rax
;* V63 tmp18 [V63 ] ( 0, 0 ) struct (24) zero-ref ld-addr-op "NewObj constructor temp"
; V64 tmp19 [V64,T29] ( 3, 1.50) long -> rsi
; V65 tmp20 [V65,T18] ( 4, 2 ) long -> rcx
; V66 tmp21 [V66,T39] ( 2, 1 ) long -> rsi
;* V67 tmp22 [V67 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op "NewObj constructor temp"
; V68 tmp23 [V68,T21] ( 2, 2 ) byref -> rdi single-def "impAppendStmt"
;* V69 tmp24 [V69 ] ( 0, 0 ) byref -> zero-ref single-def "impAppendStmt"
;* V70 tmp25 [V70 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op "NewObj constructor temp"
;* V71 tmp26 [V71 ] ( 0, 0 ) byref -> zero-ref single-def "impAppendStmt"
; V72 tmp27 [V72,T22] ( 2, 2 ) byref -> rsi single-def "impAppendStmt"
;* V73 tmp28 [V73 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op "NewObj constructor temp"
;* V74 tmp29 [V74 ] ( 0, 0 ) byref -> zero-ref single-def "impAppendStmt"
; V75 tmp30 [V75,T23] ( 2, 2 ) byref -> rsi single-def "impAppendStmt"
;* V76 tmp31 [V76 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V77 tmp32 [V77 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op "NewObj constructor temp"
;* V78 tmp33 [V78 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V79 tmp34 [V79 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V80 tmp35 [V80 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
-; V81 tmp36 [V81,T24] ( 2, 2 ) int -> rcx "Inlining Arg"
-; V82 tmp37 [V82,T25] ( 2, 2 ) int -> rsi "Inlining Arg"
+; V81 tmp36 [V81,T24] ( 2, 2 ) int -> rdx "Inlining Arg"
+; V82 tmp37 [V82,T25] ( 2, 2 ) int -> rdi "Inlining Arg"
;* V83 tmp38 [V83 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V84 tmp39 [V84 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V85 tmp40 [V85 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V86 tmp41 [V86 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V87 tmp42 [V87 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V88 tmp43 [V88 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V89 tmp44 [V89 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V90 tmp45 [V90 ] ( 0, 0 ) byref -> zero-ref single-def "field V03._reference (fldOffset=0x0)" P-INDEP
;* V91 tmp46 [V91 ] ( 0, 0 ) int -> zero-ref "field V03._length (fldOffset=0x8)" P-INDEP
;* V92 tmp47 [V92 ] ( 0, 0 ) byref -> zero-ref single-def "field V05._reference (fldOffset=0x0)" P-INDEP
;* V93 tmp48 [V93 ] ( 0, 0 ) int -> zero-ref "field V05._length (fldOffset=0x8)" P-INDEP
; V94 tmp49 [V94 ] ( 9, 6.50) int -> [rbp-0x88] do-not-enreg[X] addr-exposed "field V09._sign (fldOffset=0x0)" P-DEP
; V95 tmp50 [V95 ] ( 9, 6.50) int -> [rbp-0x84] do-not-enreg[X] addr-exposed "field V09._exponent (fldOffset=0x4)" P-DEP
; V96 tmp51 [V96 ] ( 8, 6.50) long -> [rbp-0x80] do-not-enreg[X] addr-exposed "field V09._hi (fldOffset=0x8)" P-DEP
; V97 tmp52 [V97 ] ( 7, 5.50) long -> [rbp-0x78] do-not-enreg[X] addr-exposed "field V09._lo (fldOffset=0x10)" P-DEP
; V98 tmp53 [V98 ] ( 7, 6 ) int -> [rbp-0xC8] do-not-enreg[X] addr-exposed "field V14._sign (fldOffset=0x0)" P-DEP
; V99 tmp54 [V99 ] ( 7, 6.50) int -> [rbp-0xC4] do-not-enreg[X] addr-exposed "field V14._exponent (fldOffset=0x4)" P-DEP
; V100 tmp55 [V100 ] ( 8, 7 ) long -> [rbp-0xC0] do-not-enreg[X] addr-exposed "field V14._hi (fldOffset=0x8)" P-DEP
; V101 tmp56 [V101 ] ( 6, 5.50) long -> [rbp-0xB8] do-not-enreg[X] addr-exposed "field V14._lo (fldOffset=0x10)" P-DEP
; V102 tmp57 [V102 ] ( 2, 1 ) int -> [rbp-0x180] do-not-enreg[X] addr-exposed "field V25._sign (fldOffset=0x0)" P-DEP
; V103 tmp58 [V103 ] ( 4, 2 ) int -> [rbp-0x17C] do-not-enreg[X] addr-exposed "field V25._exponent (fldOffset=0x4)" P-DEP
; V104 tmp59 [V104 ] ( 2, 1 ) long -> [rbp-0x178] do-not-enreg[X] addr-exposed "field V25._hi (fldOffset=0x8)" P-DEP
; V105 tmp60 [V105 ] ( 2, 1 ) long -> [rbp-0x170] do-not-enreg[X] addr-exposed "field V25._lo (fldOffset=0x10)" P-DEP
; V106 tmp61 [V106 ] ( 2, 1 ) int -> [rbp-0x228] do-not-enreg[X] addr-exposed "field V35._sign (fldOffset=0x0)" P-DEP
; V107 tmp62 [V107 ] ( 2, 1 ) int -> [rbp-0x224] do-not-enreg[X] addr-exposed "field V35._exponent (fldOffset=0x4)" P-DEP
; V108 tmp63 [V108 ] ( 2, 1 ) long -> [rbp-0x220] do-not-enreg[X] addr-exposed "field V35._hi (fldOffset=0x8)" P-DEP
; V109 tmp64 [V109 ] ( 2, 1 ) long -> [rbp-0x218] do-not-enreg[X] addr-exposed "field V35._lo (fldOffset=0x10)" P-DEP
;* V110 tmp65 [V110,T43] ( 0, 0 ) byref -> zero-ref single-def "field V49._reference (fldOffset=0x0)" P-INDEP
;* V111 tmp66 [V111 ] ( 0, 0 ) int -> zero-ref "field V49._length (fldOffset=0x8)" P-INDEP
;* V112 tmp67 [V112 ] ( 0, 0 ) int -> zero-ref "field V50._sign (fldOffset=0x0)" P-INDEP
; V113 tmp68 [V113,T26] ( 2, 2 ) int -> rcx "field V50._exponent (fldOffset=0x4)" P-INDEP
;* V114 tmp69 [V114 ] ( 0, 0 ) long -> zero-ref "field V50._hi (fldOffset=0x8)" P-INDEP
;* V115 tmp70 [V115 ] ( 0, 0 ) long -> zero-ref "field V50._lo (fldOffset=0x10)" P-INDEP
;* V116 tmp71 [V116,T46] ( 0, 0 ) byref -> zero-ref single-def "field V52._reference (fldOffset=0x0)" P-INDEP
;* V117 tmp72 [V117 ] ( 0, 0 ) int -> zero-ref "field V52._length (fldOffset=0x8)" P-INDEP
;* V118 tmp73 [V118 ] ( 0, 0 ) int -> zero-ref "field V56._sign (fldOffset=0x0)" P-INDEP
; V119 tmp74 [V119,T40] ( 2, 1 ) int -> rdi "field V56._exponent (fldOffset=0x4)" P-INDEP
;* V120 tmp75 [V120 ] ( 0, 0 ) long -> zero-ref "field V56._hi (fldOffset=0x8)" P-INDEP
;* V121 tmp76 [V121 ] ( 0, 0 ) long -> zero-ref "field V56._lo (fldOffset=0x10)" P-INDEP
;* V122 tmp77 [V122,T47] ( 0, 0 ) byref -> zero-ref single-def "field V58._reference (fldOffset=0x0)" P-INDEP
;* V123 tmp78 [V123 ] ( 0, 0 ) int -> zero-ref "field V58._length (fldOffset=0x8)" P-INDEP
;* V124 tmp79 [V124,T48] ( 0, 0 ) byref -> zero-ref single-def "field V60._reference (fldOffset=0x0)" P-INDEP
;* V125 tmp80 [V125 ] ( 0, 0 ) int -> zero-ref "field V60._length (fldOffset=0x8)" P-INDEP
;* V126 tmp81 [V126 ] ( 0, 0 ) int -> zero-ref "field V63._sign (fldOffset=0x0)" P-INDEP
;* V127 tmp82 [V127 ] ( 0, 0 ) int -> zero-ref "field V63._exponent (fldOffset=0x4)" P-INDEP
;* V128 tmp83 [V128 ] ( 0, 0 ) long -> zero-ref "field V63._hi (fldOffset=0x8)" P-INDEP
;* V129 tmp84 [V129 ] ( 0, 0 ) long -> zero-ref "field V63._lo (fldOffset=0x10)" P-INDEP
;* V130 tmp85 [V130,T49] ( 0, 0 ) byref -> zero-ref single-def "field V67._reference (fldOffset=0x0)" P-INDEP
;* V131 tmp86 [V131 ] ( 0, 0 ) int -> zero-ref "field V67._length (fldOffset=0x8)" P-INDEP
;* V132 tmp87 [V132,T50] ( 0, 0 ) byref -> zero-ref single-def "field V70._reference (fldOffset=0x0)" P-INDEP
;* V133 tmp88 [V133 ] ( 0, 0 ) int -> zero-ref "field V70._length (fldOffset=0x8)" P-INDEP
;* V134 tmp89 [V134,T51] ( 0, 0 ) byref -> zero-ref single-def "field V73._reference (fldOffset=0x0)" P-INDEP
;* V135 tmp90 [V135 ] ( 0, 0 ) int -> zero-ref "field V73._length (fldOffset=0x8)" P-INDEP
;* V136 tmp91 [V136,T44] ( 0, 0 ) byref -> zero-ref single-def "field V76._reference (fldOffset=0x0)" P-INDEP
;* V137 tmp92 [V137 ] ( 0, 0 ) int -> zero-ref "field V76._length (fldOffset=0x8)" P-INDEP
;* V138 tmp93 [V138,T45] ( 0, 0 ) byref -> zero-ref single-def "field V77._reference (fldOffset=0x0)" P-INDEP
;* V139 tmp94 [V139 ] ( 0, 0 ) int -> zero-ref "field V77._length (fldOffset=0x8)" P-INDEP
;* V140 tmp95 [V140 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V79.Item1 (fldOffset=0x0)" P-DEP
;* V141 tmp96 [V141 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V79.Item2 (fldOffset=0x8)" P-DEP
-; V142 tmp97 [V142,T41] ( 2, 1 ) long -> rax "field V80.Item1 (fldOffset=0x0)" P-INDEP
-; V143 tmp98 [V143,T42] ( 2, 1 ) long -> rdx "field V80.Item2 (fldOffset=0x8)" P-INDEP
+; V142 tmp97 [V142,T41] ( 2, 1 ) long -> rcx "field V80.Item1 (fldOffset=0x0)" P-INDEP
+; V143 tmp98 [V143,T42] ( 2, 1 ) long -> rsi "field V80.Item2 (fldOffset=0x8)" P-INDEP
;* V144 tmp99 [V144 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V87.Item1 (fldOffset=0x0)" P-DEP
;* V145 tmp100 [V145 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V87.Item2 (fldOffset=0x8)" P-DEP
-; V146 tmp101 [V146,T52] ( 1, 0.50) long -> rax "field V88.Item1 (fldOffset=0x0)" P-INDEP
-; V147 tmp102 [V147,T30] ( 3, 1.50) long -> rdx "field V88.Item2 (fldOffset=0x8)" P-INDEP
+; V146 tmp101 [V146,T52] ( 1, 0.50) long -> rcx "field V88.Item1 (fldOffset=0x0)" P-INDEP
+; V147 tmp102 [V147,T30] ( 3, 1.50) long -> r8 "field V88.Item2 (fldOffset=0x8)" P-INDEP
; V148 tmp103 [V148,T09] ( 5, 3 ) int -> r14 "V02.[000..004)"
; V149 cse0 [V149,T31] ( 3, 1.50) int -> rsi "CSE #03: conservative"
; V150 cse1 [V150,T32] ( 3, 1.50) int -> rdi "CSE #04: conservative"
; V151 cse2 [V151,T02] ( 8, 5.50) byref -> r13 "CSE #02: moderate"
; V152 cse3 [V152,T10] ( 3, 3 ) int -> rdi "CSE #01: moderate"
;
; Lcl frame size = 616
G_M44020_IG01:
push rbp
push r15
push r14
push r13
push r12
push rbx
sub rsp, 616
lea rbp, [rsp+0x290]
mov rbx, rdi
;; size=28 bbWeight=1 PerfScore 7.00
G_M44020_IG02:
vxorps ymm0, ymm0, ymm0
vmovdqu32 zmmword ptr [rbp-0x1C8], zmm0
vmovdqu32 xmmword ptr [rbp-0x190], xmm0
vxorps xmm0, xmm0, xmm0
vmovdqu xmmword ptr [rbp-0x40], xmm0
vmovdqu xmmword ptr [rbp-0x38], xmm0
vxorps ymm0, ymm0, ymm0
vmovdqu ymmword ptr [rbp-0x1F8], ymm0
vmovdqu xmmword ptr [rbp-0x1D8], xmm0
mov edi, dword ptr [rbp+0x14]
movsxd r15, edi
mov r14d, dword ptr [rbp+0x28]
mov rax, 0xD1FFAB1E
lea rcx, [r15-0x01]
cmp qword ptr [rbp+0x18], rax
cmovbe r15, rcx
sub edi, r15d
mov dword ptr [rbp+0x14], edi
lea rdi, [rbp-0x58]
mov rax, 0xD1FFAB1E ; code for System.Number:get_DiyFp128One():System.Number+DiyFp128
call [rax]System.Number:get_DiyFp128One():System.Number+DiyFp128
lea rcx, bword ptr [rbp-0x1F8]
mov r8d, 2
lea rsi, [rbp-0x58]
lea rdi, [rbp+0x10]
mov edx, 2
mov rax, 0xD1FFAB1E ; code for System.Number:DiyFp128AddSub(byref,byref,int,System.Span`1[System.Number+DiyFp128])
call [rax]System.Number:DiyFp128AddSub(byref,byref,int,System.Span`1[System.Number+DiyFp128])
vmovdqu xmm0, xmmword ptr [rbp-0x1F8]
vmovdqu xmmword ptr [rbp-0x1C8], xmm0
mov rdi, qword ptr [rbp-0x1E8]
mov qword ptr [rbp-0x1B8], rdi
lea r13, bword ptr [rbp-0x1B0]
vmovdqu32 xmm0, xmmword ptr [rbp-0x1E0]
vmovdqu xmmword ptr [r13], xmm0
mov rdi, qword ptr [rbp-0x1D0]
mov qword ptr [r13+0x10], rdi
lea rdi, [rbp-0x210]
mov rax, 0xD1FFAB1E ; code for System.Number:get_PowTwoOverLn2():System.Number+DiyFp128
call [rax]System.Number:get_PowTwoOverLn2():System.Number+DiyFp128
lea rdi, [rbp-0x210]
lea rcx, [rbp-0x70]
lea rsi, bword ptr [rbp-0x1C8]
mov edx, 2
mov rax, 0xD1FFAB1E ; code for System.Number:DiyFp128Divide(byref,byref,int,byref)
call [rax]System.Number:DiyFp128Divide(byref,byref,int,byref)
mov rsi, r13
lea rdi, [rbp-0x70]
lea rdx, [rbp-0x88]
mov rax, 0xD1FFAB1E ; code for System.Number:DiyFp128Multiply(byref,byref,byref)
call [rax]System.Number:DiyFp128Multiply(byref,byref,byref)
mov r12, qword ptr [rbp-0x80]
;; size=292 bbWeight=1 PerfScore 44.50
G_M44020_IG03:
test r15, r15
je G_M44020_IG06
;; size=9 bbWeight=1 PerfScore 1.25
G_M44020_IG04:
lea rax, bword ptr [rbp-0x198]
mov bword ptr [rbp-0x290], rax
lea rdi, [rbp-0x288]
mov rsi, r15
mov rcx, 0xD1FFAB1E ; code for System.Number:DiyFp128FromWord(long):System.Number+DiyFp128
call [rcx]System.Number:DiyFp128FromWord(long):System.Number+DiyFp128
mov r15, bword ptr [rbp-0x290]
vmovdqu xmm0, xmmword ptr [rbp-0x288]
vmovdqu xmmword ptr [r15], xmm0
mov rdx, qword ptr [rbp-0x278]
mov qword ptr [r15+0x10], rdx
movsxd r15, dword ptr [rbp-0x194]
movsxd rdx, dword ptr [rbp-0x84]
mov rsi, r15
sub rsi, rdx
mov rdx, qword ptr [rbp-0x190]
mov edi, dword ptr [rbp-0x198]
mov eax, edi
cmp rsi, 64
jge SHORT G_M44020_IG05
and esi, 63
shrx rcx, r12, rsi
shlx r12, rcx, rsi
mov rsi, rcx
neg rsi
cmp dword ptr [rbp-0x88], edi
cmove rsi, rcx
add rdx, rsi
mov dword ptr [rbp-0x94], eax
mov qword ptr [rbp-0x90], rdx
jmp SHORT G_M44020_IG07
;; size=155 bbWeight=0.50 PerfScore 12.00
G_M44020_IG05:
xor r12d, r12d
mov dword ptr [rbp-0x94], eax
mov qword ptr [rbp-0x90], rdx
jmp SHORT G_M44020_IG07
;; size=18 bbWeight=0.50 PerfScore 2.12
G_M44020_IG06:
mov qword ptr [rbp-0x90], r12
movsxd r15, dword ptr [rbp-0x84]
mov eax, dword ptr [rbp-0x88]
mov dword ptr [rbp-0x94], eax
;; size=26 bbWeight=0.50 PerfScore 2.00
G_M44020_IG07:
vmovdqu xmm0, xmmword ptr [rbp-0x88]
vmovdqu32 xmmword ptr [rbp-0xB0], xmm0
mov rsi, qword ptr [rbp-0x78]
mov qword ptr [rbp-0xA0], rsi
lea rdx, bword ptr [rbp-0x198]
lea rsi, [rbp-0xB0]
lea rdi, [rbp-0xB0]
mov rcx, 0xD1FFAB1E ; code for System.Number:DiyFp128Multiply(byref,byref,byref)
call [rcx]System.Number:DiyFp128Multiply(byref,byref,byref)
lea rdi, bword ptr [rbp-0x198]
lea rsi, [rbp-0xC8]
mov rax, 0xD1FFAB1E ; code for System.Number:DiyFp128EvaluatePowLog2Polynomial(byref,byref)
call [rax]System.Number:DiyFp128EvaluatePowLog2Polynomial(byref,byref)
vmovdqu xmm0, xmmword ptr [rbp-0x88]
vmovdqu32 xmmword ptr [rbp-0xE0], xmm0
mov rdi, qword ptr [rbp-0x78]
mov qword ptr [rbp-0xD0], rdi
lea rdi, [rbp-0xE0]
lea rsi, [rbp-0xC8]
lea rdx, [rbp-0xC8]
mov rax, 0xD1FFAB1E ; code for System.Number:DiyFp128Multiply(byref,byref,byref)
call [rax]System.Number:DiyFp128Multiply(byref,byref,byref)
test r12, r12
je G_M44020_IG10
;; size=153 bbWeight=1 PerfScore 23.00
G_M44020_IG08:
- xor eax, eax
- mov qword ptr [rbp-0x78], rax
+ xor edx, edx
+ mov qword ptr [rbp-0x78], rdx
mov qword ptr [rbp-0x80], r12
- mov rax, 0xD1FFAB1E
- mul rdx:rax, r12
- mov ecx, dword ptr [rbp-0x88]
- mov esi, dword ptr [rbp-0x84]
- dec esi
- mov dword ptr [rbp-0x228], ecx
- mov dword ptr [rbp-0x224], esi
- mov qword ptr [rbp-0x220], rdx
- mov qword ptr [rbp-0x218], rax
+ mov rcx, 0xD1FFAB1E
+ mov rdx, rcx
+ mulx rsi, rcx, r12
+ mov edx, dword ptr [rbp-0x88]
+ mov edi, dword ptr [rbp-0x84]
+ dec edi
+ mov dword ptr [rbp-0x228], edx
+ mov dword ptr [rbp-0x224], edi
+ mov qword ptr [rbp-0x220], rsi
+ mov qword ptr [rbp-0x218], rcx
lea rcx, [rbp-0x258]
lea rsi, [rbp-0x228]
lea rdx, [rbp-0x240]
lea rdi, bword ptr [rbp-0x1C8]
mov rax, 0xD1FFAB1E ; code for System.Number:DiyFp128ExtendedMultiply(byref,byref,byref,byref)
call [rax]System.Number:DiyFp128ExtendedMultiply(byref,byref,byref,byref)
vmovdqu32 xmm0, xmmword ptr [rbp-0x240]
vmovdqu xmmword ptr [rbp-0x1C8], xmm0
mov rcx, qword ptr [rbp-0x230]
mov qword ptr [rbp-0x1B8], rcx
vmovdqu xmm0, xmmword ptr [rbp-0x258]
vmovdqu xmmword ptr [rbp-0x198], xmm0
mov rcx, qword ptr [rbp-0x248]
mov qword ptr [rbp-0x188], rcx
mov rdi, r13
lea rcx, bword ptr [rbp-0x40]
mov r8d, 1
lea rsi, bword ptr [rbp-0x1C8]
mov edx, 1
mov rax, 0xD1FFAB1E ; code for System.Number:DiyFp128AddSub(byref,byref,int,System.Span`1[System.Number+DiyFp128])
call [rax]System.Number:DiyFp128AddSub(byref,byref,int,System.Span`1[System.Number+DiyFp128])
vmovdqu xmm0, xmmword ptr [rbp-0x40]
vmovdqu xmmword ptr [rbp-0x1C8], xmm0
mov rcx, qword ptr [rbp-0x30]
mov qword ptr [rbp-0x1B8], rcx
lea rsi, bword ptr [rbp-0x198]
lea rcx, bword ptr [rbp-0x40]
mov r8d, 1
lea rdi, bword ptr [rbp-0x1C8]
mov edx, 1
mov rax, 0xD1FFAB1E ; code for System.Number:DiyFp128AddSub(byref,byref,int,System.Span`1[System.Number+DiyFp128])
call [rax]System.Number:DiyFp128AddSub(byref,byref,int,System.Span`1[System.Number+DiyFp128])
vmovdqu xmm0, xmmword ptr [rbp-0x40]
vmovdqu xmmword ptr [rbp-0x1C8], xmm0
mov rsi, qword ptr [rbp-0x30]
mov qword ptr [rbp-0x1B8], rsi
lea rsi, [rbp-0x70]
lea rdi, bword ptr [rbp-0x1C8]
lea rdx, bword ptr [rbp-0x1C8]
mov rax, 0xD1FFAB1E ; code for System.Number:DiyFp128Multiply(byref,byref,byref)
- ;; size=316 bbWeight=0.50 PerfScore 22.50
+ ;; size=321 bbWeight=0.50 PerfScore 22.62
G_M44020_IG09:
call [rax]System.Number:DiyFp128Multiply(byref,byref,byref)
lea rdi, [rbp-0x270]
mov rax, 0xD1FFAB1E ; code for System.Number:get_PowLn2LoOverLn2():System.Number+DiyFp128
call [rax]System.Number:get_PowLn2LoOverLn2():System.Number+DiyFp128
mov rdx, r13
lea rsi, [rbp-0x270]
lea rdi, [rbp-0x88]
mov rax, 0xD1FFAB1E ; code for System.Number:DiyFp128Multiply(byref,byref,byref)
call [rax]System.Number:DiyFp128Multiply(byref,byref,byref)
mov rsi, r13
lea rcx, bword ptr [rbp-0x40]
mov r8d, 1
lea rdi, bword ptr [rbp-0x1C8]
mov edx, 1
mov rax, 0xD1FFAB1E ; code for System.Number:DiyFp128AddSub(byref,byref,int,System.Span`1[System.Number+DiyFp128])
call [rax]System.Number:DiyFp128AddSub(byref,byref,int,System.Span`1[System.Number+DiyFp128])
vmovdqu xmm0, xmmword ptr [rbp-0x40]
vmovdqu xmmword ptr [rbp-0x88], xmm0
mov rcx, qword ptr [rbp-0x30]
mov qword ptr [rbp-0x78], rcx
;; size=108 bbWeight=0.50 PerfScore 10.12
G_M44020_IG10:
lea rcx, bword ptr [rbp-0x40]
mov r8d, 1
lea rsi, [rbp-0xC8]
lea rdi, [rbp-0x88]
xor edx, edx
mov rax, 0xD1FFAB1E ; code for System.Number:DiyFp128AddSub(byref,byref,int,System.Span`1[System.Number+DiyFp128])
call [rax]System.Number:DiyFp128AddSub(byref,byref,int,System.Span`1[System.Number+DiyFp128])
vmovdqu xmm0, xmmword ptr [rbp-0x40]
vmovdqu xmmword ptr [rbp-0xC8], xmm0
mov rcx, qword ptr [rbp-0x30]
mov qword ptr [rbp-0xB8], rcx
mov rcx, qword ptr [rbp-0xC0]
movsxd rsi, dword ptr [rbp-0xC4]
mov rdx, r15
sub rdx, rsi
cmp rdx, 64
jge SHORT G_M44020_IG15
;; size=88 bbWeight=1 PerfScore 13.00
G_M44020_IG11:
test edx, edx
jg SHORT G_M44020_IG12
xor esi, esi
jmp SHORT G_M44020_IG13
;; size=8 bbWeight=0.50 PerfScore 1.75
G_M44020_IG12:
mov esi, 1
shlx rsi, rsi, rdx
dec rsi
;; size=13 bbWeight=0.50 PerfScore 0.50
G_M44020_IG13:
and rsi, rcx
mov qword ptr [rbp-0xC0], rsi
test edx, edx
jle SHORT G_M44020_IG14
shrx rcx, rcx, rdx
;; size=19 bbWeight=0.50 PerfScore 1.50
G_M44020_IG14:
mov rsi, rcx
neg rsi
mov r12d, dword ptr [rbp-0x94]
mov edx, r12d
xor edx, dword ptr [rbp-0xC8]
cmove rsi, rcx
mov rax, qword ptr [rbp-0x90]
add rax, rsi
mov dword ptr [rbp-0x94], r12d
mov qword ptr [rbp-0x90], rax
;; size=50 bbWeight=0.50 PerfScore 3.25
G_M44020_IG15:
mov ecx, r15d
mov r12d, dword ptr [rbp-0x94]
mov dword ptr [rbp-0x1C8], r12d
mov dword ptr [rbp-0x1C4], ecx
mov rax, qword ptr [rbp-0x90]
mov qword ptr [rbp-0x1C0], rax
xor ecx, ecx
mov qword ptr [rbp-0x1B8], rcx
movsxd rcx, dword ptr [rbp+0x2C]
add r15, rcx
cmp r15, 17
jg G_M44020_IG22
;; size=63 bbWeight=1 PerfScore 9.00
G_M44020_IG16:
xor r8d, r8d
mov qword ptr [rbp-0xE8], r8
xor r9d, r9d
mov dword ptr [rbp-0xEC], r9d
xor r12d, r14d
vmovdqu xmm0, xmmword ptr [rbp+0x28]
vmovdqu xmmword ptr [rbp-0x108], xmm0
mov rcx, qword ptr [rbp+0x38]
mov qword ptr [rbp-0xF8], rcx
mov dword ptr [rbp-0x108], r14d
lea rcx, [rbp-0x138]
lea rsi, [rbp-0x108]
lea rdx, [rbp-0x120]
lea rdi, bword ptr [rbp-0x1C8]
mov r10, 0xD1FFAB1E ; code for System.Number:DiyFp128ExtendedMultiply(byref,byref,byref,byref)
call [r10]System.Number:DiyFp128ExtendedMultiply(byref,byref,byref,byref)
vmovdqu32 xmm0, xmmword ptr [rbp-0x120]
vmovdqu32 xmmword ptr [rbp-0x150], xmm0
- mov rax, qword ptr [rbp-0x110]
- mov qword ptr [rbp-0x140], rax
+ mov rdx, qword ptr [rbp-0x110]
+ mov qword ptr [rbp-0x140], rdx
vmovdqu xmm0, xmmword ptr [rbp-0x138]
vmovdqu xmmword ptr [rbp-0x1C8], xmm0
- mov rax, qword ptr [rbp-0x128]
- mov qword ptr [rbp-0x1B8], rax
+ mov rdx, qword ptr [rbp-0x128]
+ mov qword ptr [rbp-0x1B8], rdx
test r15, r15
jl G_M44020_IG19
- mov rax, qword ptr [rbp-0x90]
- mul rdx:rax, qword ptr [rbp+0x30]
+ mov rdx, qword ptr [rbp-0x90]
+ mulx r8, rcx, qword ptr [rbp+0x30]
mov r9d, r15d
neg r9d
add r9d, 64
mov ecx, r9d
- lea r8d, [rcx-0x01]
- mov edi, 1
- shlx r8, rdi, r8
- lea rdi, [rdx+r8]
- add r8, r8
- cmp rdi, rdx
+ lea edi, [rcx-0x01]
+ mov esi, 1
+ shlx rdi, rsi, rdi
+ lea rsi, [r8+rdi]
+ add rdi, rdi
+ cmp rsi, r8
jae SHORT G_M44020_IG17
dec ecx
mov dword ptr [rbp-0xEC], ecx
mov r8, 0xD1FFAB1E
mov rax, r8
inc r15
jmp SHORT G_M44020_IG18
- ;; size=238 bbWeight=0.50 PerfScore 18.25
+ ;; size=239 bbWeight=0.50 PerfScore 18.25
G_M44020_IG17:
- mov rax, r8
+ mov rax, rdi
neg rax
- and rax, rdi
+ and rax, rsi
mov dword ptr [rbp-0xEC], ecx
;; size=15 bbWeight=0.50 PerfScore 0.88
G_M44020_IG18:
mov r8, r13
mov edi, r15d
mov dword ptr [r8], r12d
mov dword ptr [r8+0x04], edi
mov qword ptr [rbp-0xE8], rax
mov qword ptr [r8+0x08], rax
xor edi, edi
mov qword ptr [r8+0x10], rdi
mov rsi, r13
lea rcx, bword ptr [rbp-0x40]
mov r8d, 1
lea rdi, [rbp-0x150]
mov edx, 1
mov r9, 0xD1FFAB1E ; code for System.Number:DiyFp128AddSub(byref,byref,int,System.Span`1[System.Number+DiyFp128])
call [r9]System.Number:DiyFp128AddSub(byref,byref,int,System.Span`1[System.Number+DiyFp128])
vmovdqu xmm0, xmmword ptr [rbp-0x40]
vmovdqu32 xmmword ptr [rbp-0x150], xmm0
mov rcx, qword ptr [rbp-0x30]
mov qword ptr [rbp-0x140], rcx
lea rcx, bword ptr [rbp-0x40]
mov r8d, 1
lea rdi, [rbp-0x150]
lea rsi, bword ptr [rbp-0x1C8]
xor edx, edx
mov rax, 0xD1FFAB1E ; code for System.Number:DiyFp128AddSub(byref,byref,int,System.Span`1[System.Number+DiyFp128])
call [rax]System.Number:DiyFp128AddSub(byref,byref,int,System.Span`1[System.Number+DiyFp128])
vmovdqu xmm0, xmmword ptr [rbp-0x40]
vmovdqu32 xmmword ptr [rbp-0x150], xmm0
mov rdi, qword ptr [rbp-0x30]
mov qword ptr [rbp-0x140], rdi
;; size=152 bbWeight=0.50 PerfScore 12.00
G_M44020_IG19:
vmovdqu xmm0, xmmword ptr [rbp+0x28]
vmovdqu xmmword ptr [rbp-0x168], xmm0
mov rdi, qword ptr [rbp+0x38]
mov qword ptr [rbp-0x158], rdi
mov dword ptr [rbp-0x168], r14d
lea rdi, [rbp-0x168]
lea rsi, [rbp-0xC8]
lea rdx, bword ptr [rbp-0x1C8]
mov rax, 0xD1FFAB1E ; code for System.Number:DiyFp128Multiply(byref,byref,byref)
call [rax]System.Number:DiyFp128Multiply(byref,byref,byref)
lea rcx, bword ptr [rbp-0x40]
mov r8d, 1
lea rsi, [rbp-0x150]
lea rdi, bword ptr [rbp-0x1C8]
xor edx, edx
mov rax, 0xD1FFAB1E ; code for System.Number:DiyFp128AddSub(byref,byref,int,System.Span`1[System.Number+DiyFp128])
call [rax]System.Number:DiyFp128AddSub(byref,byref,int,System.Span`1[System.Number+DiyFp128])
vmovdqu xmm0, xmmword ptr [rbp-0x40]
vmovdqu32 xmmword ptr [rbp-0x150], xmm0
mov rdi, qword ptr [rbp-0x30]
mov qword ptr [rbp-0x140], rdi
lea rdi, [rbp-0x150]
lea rsi, [rbp-0x180]
mov rax, 0xD1FFAB1E ; code for System.Number:DiyFp128EvaluatePow2Polynomial(byref,byref)
call [rax]System.Number:DiyFp128EvaluatePow2Polynomial(byref,byref)
mov r14d, dword ptr [rbp-0xEC]
cmp r14d, 64
jl SHORT G_M44020_IG20
xor eax, eax
jmp SHORT G_M44020_IG21
;; size=168 bbWeight=0.50 PerfScore 13.88
G_M44020_IG20:
shrx rax, qword ptr [rbp-0xE8], r14
;; size=9 bbWeight=0.50 PerfScore 1.00
G_M44020_IG21:
mov rcx, rax
neg rcx
test r12d, r12d
cmove rcx, rax
add ecx, dword ptr [rbp-0x17C]
mov dword ptr [rbp-0x17C], ecx
vmovdqu32 xmm0, xmmword ptr [rbp-0x180]
vmovdqu xmmword ptr [rbx], xmm0
mov rax, qword ptr [rbp-0x170]
mov qword ptr [rbx+0x10], rax
jmp SHORT G_M44020_IG23
;; size=49 bbWeight=0.50 PerfScore 4.62
G_M44020_IG22:
mov eax, -0x8000
mov ecx, 0x8000
xor r14d, r12d
cmove eax, ecx
xor ecx, ecx
mov dword ptr [rbx], ecx
mov dword ptr [rbx+0x04], eax
vmovsd xmm0, qword ptr [reloc @RWD00]
vmovups xmmword ptr [rbx+0x08], xmm0
;; size=36 bbWeight=0.50 PerfScore 3.25
G_M44020_IG23:
mov rax, rbx
;; size=3 bbWeight=1 PerfScore 0.25
G_M44020_IG24:
add rsp, 616
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
ret
;; size=18 bbWeight=1 PerfScore 4.25
RWD00 dq 8000000000000000h
-; Total bytes of code 2034, prolog size 25, PerfScore 211.88, instruction count 389, allocated bytes for code 2034 (MethodHash=9c76540b) for method System.Number:DiyFp128Pow(System.Number+DiyFp128,System.Number+DiyFp128):System.Number+DiyFp128 (FullOpts)
+; Total bytes of code 2040, prolog size 25, PerfScore 212.00, instruction count 390, allocated bytes for code 2040 (MethodHash=9c76540b) for method System.Number:DiyFp128Pow(System.Number+DiyFp128,System.Number+DiyFp128):System.Number+DiyFp128 (FullOpts)
; ============================================================
```
5 (29.41 % of base) - System.Int128:System.IBinaryIntegerParseAndFormatInfo.MultiplyBy10(System.Int128):System.Int128
```diff
; Assembly listing for method System.Int128:System.IBinaryIntegerParseAndFormatInfo.MultiplyBy10(System.Int128):System.Int128 (FullOpts)
; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
; FullOpts code
; optimized code
; rsp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 11 single block inlinees; 1 inlinees without PGO data
; Final local variable assignments
;
;* V00 arg0 [V00 ] ( 0, 0 ) struct (16) zero-ref multireg-arg single-def
;# V01 OutArgs [V01 ] ( 1, 1 ) struct ( 0) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V02 tmp1 [V02 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V03 tmp2 [V03 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V04 tmp3 [V04 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V05 tmp4 [V05 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V06 tmp5 [V06 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V07 tmp6 [V07 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V08 tmp7 [V08 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V09 tmp8 [V09 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V10 tmp9 [V10 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V11 tmp10 [V11 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V12 tmp11 [V12 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V13 tmp12 [V13 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V14 tmp13 [V14 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V15 tmp14 [V15 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V16 tmp15 [V16 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V17 tmp16 [V17 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V18 tmp17 [V18 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V19 tmp18 [V19 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V20 tmp19 [V20 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V21 tmp20 [V21 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V22 tmp21 [V22 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V23 tmp22 [V23 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
; V24 tmp23 [V24,T00] ( 2, 4 ) long -> rdx "Inlining Arg"
;* V25 tmp24 [V25 ] ( 0, 0 ) struct (16) zero-ref multireg-ret ld-addr-op "NewObj constructor temp"
;* V26 tmp25 [V26 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V27 tmp26 [V27 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
; V28 tmp27 [V28,T01] ( 2, 2 ) long -> rdi single-def "field V00._lower (fldOffset=0x0)" P-INDEP
; V29 tmp28 [V29,T02] ( 2, 2 ) long -> rsi single-def "field V00._upper (fldOffset=0x8)" P-INDEP
;* V30 tmp29 [V30 ] ( 0, 0 ) long -> zero-ref "field V02._lower (fldOffset=0x0)" P-INDEP
;* V31 tmp30 [V31 ] ( 0, 0 ) long -> zero-ref "field V02._upper (fldOffset=0x8)" P-INDEP
;* V32 tmp31 [V32 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V03._lower (fldOffset=0x0)" P-DEP
;* V33 tmp32 [V33 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V03._upper (fldOffset=0x8)" P-DEP
;* V34 tmp33 [V34 ] ( 0, 0 ) long -> zero-ref "field V05._lower (fldOffset=0x0)" P-INDEP
;* V35 tmp34 [V35 ] ( 0, 0 ) long -> zero-ref "field V05._upper (fldOffset=0x8)" P-INDEP
;* V36 tmp35 [V36 ] ( 0, 0 ) long -> zero-ref "field V07._lower (fldOffset=0x0)" P-INDEP
;* V37 tmp36 [V37 ] ( 0, 0 ) long -> zero-ref "field V07._upper (fldOffset=0x8)" P-INDEP
;* V38 tmp37 [V38 ] ( 0, 0 ) long -> zero-ref "field V08._lower (fldOffset=0x0)" P-INDEP
;* V39 tmp38 [V39 ] ( 0, 0 ) long -> zero-ref "field V08._upper (fldOffset=0x8)" P-INDEP
;* V40 tmp39 [V40 ] ( 0, 0 ) long -> zero-ref "field V09._lower (fldOffset=0x0)" P-INDEP
;* V41 tmp40 [V41 ] ( 0, 0 ) long -> zero-ref "field V09._upper (fldOffset=0x8)" P-INDEP
;* V42 tmp41 [V42 ] ( 0, 0 ) long -> zero-ref "field V10._lower (fldOffset=0x0)" P-INDEP
;* V43 tmp42 [V43 ] ( 0, 0 ) long -> zero-ref "field V10._upper (fldOffset=0x8)" P-INDEP
;* V44 tmp43 [V44 ] ( 0, 0 ) long -> zero-ref "field V13._lower (fldOffset=0x0)" P-INDEP
;* V45 tmp44 [V45 ] ( 0, 0 ) long -> zero-ref "field V13._upper (fldOffset=0x8)" P-INDEP
;* V46 tmp45 [V46 ] ( 0, 0 ) long -> zero-ref "field V17._lower (fldOffset=0x0)" P-INDEP
;* V47 tmp46 [V47 ] ( 0, 0 ) long -> zero-ref "field V17._upper (fldOffset=0x8)" P-INDEP
;* V48 tmp47 [V48 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V21.Item1 (fldOffset=0x0)" P-DEP
;* V49 tmp48 [V49 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V21.Item2 (fldOffset=0x8)" P-DEP
; V50 tmp49 [V50,T03] ( 2, 2 ) long -> rax "field V22.Item1 (fldOffset=0x0)" P-INDEP
; V51 tmp50 [V51,T04] ( 2, 2 ) long -> rdx "field V22.Item2 (fldOffset=0x8)" P-INDEP
;* V52 tmp51 [V52 ] ( 0, 0 ) long -> zero-ref "field V25._lower (fldOffset=0x0)" P-INDEP
;* V53 tmp52 [V53 ] ( 0, 0 ) long -> zero-ref "field V25._upper (fldOffset=0x8)" P-INDEP
;
; Lcl frame size = 0
G_M32473_IG01:
;; size=0 bbWeight=1 PerfScore 0.00
G_M32473_IG02:
mov eax, 10
- mul rdx:rax, rdi
+ mov rdx, rax
+ mulx rdx, rax, rdi
lea rcx, [rsi+4*rsi]
lea rdx, [rdx+2*rcx]
- ;; size=16 bbWeight=1 PerfScore 4.25
+ ;; size=21 bbWeight=1 PerfScore 4.50
G_M32473_IG03:
ret
;; size=1 bbWeight=1 PerfScore 1.00
-; Total bytes of code 17, prolog size 0, PerfScore 5.25, instruction count 5, allocated bytes for code 17 (MethodHash=5ba28126) for method System.Int128:System.IBinaryIntegerParseAndFormatInfo.MultiplyBy10(System.Int128):System.Int128 (FullOpts)
+; Total bytes of code 22, prolog size 0, PerfScore 5.50, instruction count 6, allocated bytes for code 22 (MethodHash=5ba28126) for method System.Int128:System.IBinaryIntegerParseAndFormatInfo.MultiplyBy10(System.Int128):System.Int128 (FullOpts)
; ============================================================
```
5 (31.25 % of base) - System.Int128:System.IBinaryIntegerParseAndFormatInfo.MultiplyBy16(System.Int128):System.Int128
```diff
; Assembly listing for method System.Int128:System.IBinaryIntegerParseAndFormatInfo.MultiplyBy16(System.Int128):System.Int128 (FullOpts)
; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
; FullOpts code
; optimized code
; rsp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 11 single block inlinees; 1 inlinees without PGO data
; Final local variable assignments
;
;* V00 arg0 [V00 ] ( 0, 0 ) struct (16) zero-ref multireg-arg single-def
;# V01 OutArgs [V01 ] ( 1, 1 ) struct ( 0) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V02 tmp1 [V02 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V03 tmp2 [V03 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V04 tmp3 [V04 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V05 tmp4 [V05 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V06 tmp5 [V06 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V07 tmp6 [V07 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V08 tmp7 [V08 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V09 tmp8 [V09 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V10 tmp9 [V10 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V11 tmp10 [V11 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V12 tmp11 [V12 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V13 tmp12 [V13 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V14 tmp13 [V14 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V15 tmp14 [V15 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V16 tmp15 [V16 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V17 tmp16 [V17 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V18 tmp17 [V18 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V19 tmp18 [V19 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V20 tmp19 [V20 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V21 tmp20 [V21 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V22 tmp21 [V22 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V23 tmp22 [V23 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
; V24 tmp23 [V24,T00] ( 2, 4 ) long -> rdx "Inlining Arg"
;* V25 tmp24 [V25 ] ( 0, 0 ) struct (16) zero-ref multireg-ret ld-addr-op "NewObj constructor temp"
;* V26 tmp25 [V26 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V27 tmp26 [V27 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
; V28 tmp27 [V28,T01] ( 2, 2 ) long -> rdi single-def "field V00._lower (fldOffset=0x0)" P-INDEP
; V29 tmp28 [V29,T02] ( 2, 2 ) long -> rsi single-def "field V00._upper (fldOffset=0x8)" P-INDEP
;* V30 tmp29 [V30 ] ( 0, 0 ) long -> zero-ref "field V02._lower (fldOffset=0x0)" P-INDEP
;* V31 tmp30 [V31 ] ( 0, 0 ) long -> zero-ref "field V02._upper (fldOffset=0x8)" P-INDEP
;* V32 tmp31 [V32 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V03._lower (fldOffset=0x0)" P-DEP
;* V33 tmp32 [V33 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V03._upper (fldOffset=0x8)" P-DEP
;* V34 tmp33 [V34 ] ( 0, 0 ) long -> zero-ref "field V05._lower (fldOffset=0x0)" P-INDEP
;* V35 tmp34 [V35 ] ( 0, 0 ) long -> zero-ref "field V05._upper (fldOffset=0x8)" P-INDEP
;* V36 tmp35 [V36 ] ( 0, 0 ) long -> zero-ref "field V07._lower (fldOffset=0x0)" P-INDEP
;* V37 tmp36 [V37 ] ( 0, 0 ) long -> zero-ref "field V07._upper (fldOffset=0x8)" P-INDEP
;* V38 tmp37 [V38 ] ( 0, 0 ) long -> zero-ref "field V08._lower (fldOffset=0x0)" P-INDEP
;* V39 tmp38 [V39 ] ( 0, 0 ) long -> zero-ref "field V08._upper (fldOffset=0x8)" P-INDEP
;* V40 tmp39 [V40 ] ( 0, 0 ) long -> zero-ref "field V09._lower (fldOffset=0x0)" P-INDEP
;* V41 tmp40 [V41 ] ( 0, 0 ) long -> zero-ref "field V09._upper (fldOffset=0x8)" P-INDEP
;* V42 tmp41 [V42 ] ( 0, 0 ) long -> zero-ref "field V10._lower (fldOffset=0x0)" P-INDEP
;* V43 tmp42 [V43 ] ( 0, 0 ) long -> zero-ref "field V10._upper (fldOffset=0x8)" P-INDEP
;* V44 tmp43 [V44 ] ( 0, 0 ) long -> zero-ref "field V13._lower (fldOffset=0x0)" P-INDEP
;* V45 tmp44 [V45 ] ( 0, 0 ) long -> zero-ref "field V13._upper (fldOffset=0x8)" P-INDEP
;* V46 tmp45 [V46 ] ( 0, 0 ) long -> zero-ref "field V17._lower (fldOffset=0x0)" P-INDEP
;* V47 tmp46 [V47 ] ( 0, 0 ) long -> zero-ref "field V17._upper (fldOffset=0x8)" P-INDEP
;* V48 tmp47 [V48 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V21.Item1 (fldOffset=0x0)" P-DEP
;* V49 tmp48 [V49 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V21.Item2 (fldOffset=0x8)" P-DEP
; V50 tmp49 [V50,T03] ( 2, 2 ) long -> rax "field V22.Item1 (fldOffset=0x0)" P-INDEP
; V51 tmp50 [V51,T04] ( 2, 2 ) long -> rdx "field V22.Item2 (fldOffset=0x8)" P-INDEP
;* V52 tmp51 [V52 ] ( 0, 0 ) long -> zero-ref "field V25._lower (fldOffset=0x0)" P-INDEP
;* V53 tmp52 [V53 ] ( 0, 0 ) long -> zero-ref "field V25._upper (fldOffset=0x8)" P-INDEP
;
; Lcl frame size = 0
G_M62367_IG01:
;; size=0 bbWeight=1 PerfScore 0.00
G_M62367_IG02:
mov eax, 16
- mul rdx:rax, rdi
+ mov rdx, rax
+ mulx rdx, rax, rdi
shl rsi, 4
add rdx, rsi
- ;; size=15 bbWeight=1 PerfScore 4.00
+ ;; size=20 bbWeight=1 PerfScore 4.25
G_M62367_IG03:
ret
;; size=1 bbWeight=1 PerfScore 1.00
-; Total bytes of code 16, prolog size 0, PerfScore 5.00, instruction count 5, allocated bytes for code 16 (MethodHash=96a30c60) for method System.Int128:System.IBinaryIntegerParseAndFormatInfo.MultiplyBy16(System.Int128):System.Int128 (FullOpts)
+; Total bytes of code 21, prolog size 0, PerfScore 5.25, instruction count 6, allocated bytes for code 21 (MethodHash=96a30c60) for method System.Int128:System.IBinaryIntegerParseAndFormatInfo.MultiplyBy16(System.Int128):System.Int128 (FullOpts)
; ============================================================
```
5 (21.74 % of base) - System.IO.Hashing.XxHashShared:Mix16Bytes(ptr,ulong,ulong,ulong):ulong
```diff
; Assembly listing for method System.IO.Hashing.XxHashShared:Mix16Bytes(ptr,ulong,ulong,ulong):ulong (FullOpts)
; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
; FullOpts code
; optimized code
; rsp based frame
; partially interruptible
; No PGO data
; 0 inlinees with PGO data; 2 single block inlinees; 3 inlinees without PGO data
; Final local variable assignments
;
; V00 arg0 [V00,T00] ( 4, 4 ) long -> rdi single-def
; V01 arg1 [V01,T02] ( 3, 3 ) long -> rsi single-def
; V02 arg2 [V02,T03] ( 3, 3 ) long -> rdx single-def
; V03 arg3 [V03,T01] ( 4, 4 ) long -> rcx single-def
;# V04 OutArgs [V04 ] ( 1, 1 ) struct ( 0) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V05 tmp1 [V05 ] ( 0, 0 ) long -> zero-ref "impAppendStmt"
;* V06 tmp2 [V06 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V07 tmp3 [V07 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V08 tmp4 [V08 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V09 tmp5 [V09 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V10 tmp6 [V10 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V11 tmp7 [V11 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V12 tmp8 [V12 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V13 tmp9 [V13 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V14 tmp10 [V14 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V15 tmp11 [V15 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V13.Item1 (fldOffset=0x0)" P-DEP
;* V16 tmp12 [V16 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V13.Item2 (fldOffset=0x8)" P-DEP
; V17 tmp13 [V17,T04] ( 2, 2 ) long -> rax "field V14.Item1 (fldOffset=0x0)" P-INDEP
-; V18 tmp14 [V18,T05] ( 2, 2 ) long -> rdx "field V14.Item2 (fldOffset=0x8)" P-INDEP
+; V18 tmp14 [V18,T05] ( 2, 2 ) long -> rcx "field V14.Item2 (fldOffset=0x8)" P-INDEP
;
; Lcl frame size = 0
G_M9319_IG01:
;; size=0 bbWeight=1 PerfScore 0.00
G_M9319_IG02:
add rsi, rcx
xor rsi, qword ptr [rdi]
sub rdx, rcx
xor rdx, qword ptr [rdi+0x08]
mov rax, rdx
- mul rdx:rax, rsi
- xor rax, rdx
- ;; size=22 bbWeight=1 PerfScore 8.00
+ mov rdx, rsi
+ mulx rcx, rax, rax
+ xor rax, rcx
+ ;; size=27 bbWeight=1 PerfScore 8.25
G_M9319_IG03:
ret
;; size=1 bbWeight=1 PerfScore 1.00
-; Total bytes of code 23, prolog size 0, PerfScore 9.00, instruction count 8, allocated bytes for code 23 (MethodHash=e8a4db98) for method System.IO.Hashing.XxHashShared:Mix16Bytes(ptr,ulong,ulong,ulong):ulong (FullOpts)
+; Total bytes of code 28, prolog size 0, PerfScore 9.25, instruction count 9, allocated bytes for code 28 (MethodHash=e8a4db98) for method System.IO.Hashing.XxHashShared:Mix16Bytes(ptr,ulong,ulong,ulong):ulong (FullOpts)
; ============================================================
```
5 (0.80 % of base) - System.Numerics.BigIntegerCalculator:TryMultiplyRepeatedLimb(System.ReadOnlySpan`1[nuint],System.ReadOnlySpan`1[nuint],System.Span`1[nuint]):bool
```diff
; Assembly listing for method System.Numerics.BigIntegerCalculator:TryMultiplyRepeatedLimb(System.ReadOnlySpan`1[nuint],System.ReadOnlySpan`1[nuint],System.Span`1[nuint]):bool (FullOpts)
; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
; FullOpts code
; optimized code
; rbp based frame
; fully interruptible
; No PGO data
; 0 inlinees with PGO data; 43 single block inlinees; 12 inlinees without PGO data
; Final local variable assignments
;
;* V00 arg0 [V00 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op single-def
;* V01 arg1 [V01 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op single-def
;* V02 arg2 [V02 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op single-def
; V03 loc0 [V03,T07] ( 8, 10 ) long -> [rbp-0x30]
; V04 loc1 [V04,T11] ( 9, 8.02) int -> rcx
; V05 loc2 [V05,T31] ( 2, 1 ) int -> rsi
;* V06 loc3 [V06 ] ( 0, 0 ) int -> zero-ref
;* V07 loc4 [V07 ] ( 0, 0 ) struct (16) zero-ref
;* V08 loc5 [V08 ] ( 0, 0 ) struct (16) zero-ref
-; V09 loc6 [V09,T00] ( 19, 28.56) int -> r13
+; V09 loc6 [V09,T00] ( 19, 28.56) int -> r10
;* V10 loc7 [V10 ] ( 0, 0 ) struct (16) zero-ref
;* V11 loc8 [V11 ] ( 0, 0 ) long -> zero-ref
;* V12 loc9 [V12 ] ( 0, 0 ) long -> zero-ref
;* V13 loc10 [V13 ] ( 0, 0 ) int -> zero-ref
;* V14 loc11 [V14 ] ( 0, 0 ) long -> zero-ref
;# V15 OutArgs [V15 ] ( 1, 1 ) struct ( 0) [rsp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
;* V16 tmp1 [V16 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V17 tmp2 [V17 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V18 tmp3 [V18 ] ( 0, 0 ) struct (16) zero-ref "impAppendStmt"
;* V19 tmp4 [V19 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V20 tmp5 [V20 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V21 tmp6 [V21 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V22 tmp7 [V22 ] ( 0, 0 ) byref -> zero-ref "impAppendStmt"
;* V23 tmp8 [V23 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V24 tmp9 [V24 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V25 tmp10 [V25 ] ( 0, 0 ) byref -> zero-ref "impAppendStmt"
;* V26 tmp11 [V26 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument"
;* V27 tmp12 [V27 ] ( 0, 0 ) struct (16) zero-ref "Inlining Arg"
;* V28 tmp13 [V28 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
;* V29 tmp14 [V29 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V30 tmp15 [V30 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V31 tmp16 [V31 ] ( 0, 0 ) byref -> zero-ref single-def "Inlining Arg"
;* V32 tmp17 [V32 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V33 tmp18 [V33 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
;* V34 tmp19 [V34 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V35 tmp20 [V35 ] ( 0, 0 ) int -> zero-ref "Inline return value spill temp"
;* V36 tmp21 [V36 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V37 tmp22 [V37 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V38 tmp23 [V38 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V39 tmp24 [V39 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
;* V40 tmp25 [V40 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inlining Arg"
;* V41 tmp26 [V41 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
; V42 tmp27 [V42,T29] ( 2, 2 ) byref -> rdi single-def "Inlining Arg"
; V43 tmp28 [V43,T30] ( 2, 2 ) int -> rax "Inlining Arg"
;* V44 tmp29 [V44 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg"
;* V45 tmp30 [V45 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V46 tmp31 [V46 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V47 tmp32 [V47 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
-; V48 tmp33 [V48,T32] ( 2, 1 ) int -> rax "Inline return value spill temp"
+; V48 tmp33 [V48,T32] ( 2, 1 ) int -> rdx "Inline return value spill temp"
;* V49 tmp34 [V49 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V50 tmp35 [V50 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V51 tmp36 [V51 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V52 tmp37 [V52 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V53 tmp38 [V53 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V54 tmp39 [V54 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V55 tmp40 [V55 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V56 tmp41 [V56 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V57 tmp42 [V57 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V58 tmp43 [V58 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V59 tmp44 [V59 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V60 tmp45 [V60 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V61 tmp46 [V61 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V62 tmp47 [V62 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V63 tmp48 [V63 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
;* V64 tmp49 [V64 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V65 tmp50 [V65 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V66 tmp51 [V66 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V67 tmp52 [V67 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
-; V68 tmp53 [V68,T18] ( 6, 6 ) long -> rax "Inline stloc first use temp"
-; V69 tmp54 [V69,T22] ( 4, 4 ) long -> r8 "Inline stloc first use temp"
+; V68 tmp53 [V68,T18] ( 6, 6 ) long -> r11 "Inline stloc first use temp"
+; V69 tmp54 [V69,T22] ( 4, 4 ) long -> r13 "Inline stloc first use temp"
;* V70 tmp55 [V70 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V71 tmp56 [V71 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V72 tmp57 [V72 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V73 tmp58 [V73 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
-; V74 tmp59 [V74,T19] ( 6, 6 ) long -> rdx "Inline stloc first use temp"
-; V75 tmp60 [V75,T23] ( 4, 4 ) long -> r8 "Inline stloc first use temp"
+; V74 tmp59 [V74,T19] ( 6, 6 ) long -> r13 "Inline stloc first use temp"
+; V75 tmp60 [V75,T23] ( 4, 4 ) long -> rdx "Inline stloc first use temp"
;* V76 tmp61 [V76 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V77 tmp62 [V77 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V78 tmp63 [V78 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V79 tmp64 [V79 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inline ldloca(s) first use temp"
;* V80 tmp65 [V80 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V81 tmp66 [V81 ] ( 0, 0 ) long -> zero-ref "Inline return value spill temp"
;* V82 tmp67 [V82 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V83 tmp68 [V83 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V84 tmp69 [V84 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return"
;* V85 tmp70 [V85 ] ( 0, 0 ) struct (16) zero-ref multireg-ret multireg-dest "Inline stloc first use temp"
;* V86 tmp71 [V86 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
; V87 tmp72 [V87,T02] ( 4, 16 ) long -> registers "Inlining Arg"
-; V88 tmp73 [V88,T05] ( 6, 12 ) long -> r10 "Inline stloc first use temp"
+; V88 tmp73 [V88,T05] ( 6, 12 ) long -> r8 "Inline stloc first use temp"
; V89 tmp74 [V89,T13] ( 4, 8 ) long -> registers "Inline stloc first use temp"
;* V90 tmp75 [V90 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V91 tmp76 [V91 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
;* V92 tmp77 [V92 ] ( 0, 0 ) struct (16) zero-ref "Inline return value spill temp"
;* V93 tmp78 [V93 ] ( 0, 0 ) int -> zero-ref "Inlining Arg"
;* V94 tmp79 [V94 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V95 tmp80 [V95 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V96 tmp81 [V96 ] ( 0, 0 ) long -> zero-ref "Inline stloc first use temp"
;* V97 tmp82 [V97 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp"
;* V98 tmp83 [V98 ] ( 0, 0 ) long -> zero-ref "Inlining Arg"
; V99 tmp84 [V99,T12] ( 7, 6 ) byref -> r14 single-def "field V00._reference (fldOffset=0x0)" P-INDEP
; V100 tmp85 [V100,T03] ( 13, 11.50) int -> rbx single-def "field V00._length (fldOffset=0x8)" P-INDEP
; V101 tmp86 [V101,T28] ( 3, 2 ) byref -> rdx single-def "field V01._reference (fldOffset=0x0)" P-INDEP
; V102 tmp87 [V102,T17] ( 7, 4 ) int -> r13 single-def "field V01._length (fldOffset=0x8)" P-INDEP
; V103 tmp88 [V103,T09] ( 6, 6.50) byref -> r15 single-def "field V02._reference (fldOffset=0x0)" P-INDEP
; V104 tmp89 [V104,T21] ( 7, 3.54) int -> [rbp-0x34] single-def "field V02._length (fldOffset=0x8)" P-INDEP
-; V105 tmp90 [V105,T01] ( 15, 16.50) long -> r8 "field V07._lower (fldOffset=0x0)" P-INDEP
-; V106 tmp91 [V106,T04] ( 11, 12.50) long -> r9 "field V07._upper (fldOffset=0x8)" P-INDEP
-; V107 tmp92 [V107,T08] ( 6, 9 ) long -> r10 "field V08._lower (fldOffset=0x0)" P-INDEP
-; V108 tmp93 [V108,T10] ( 5, 8.50) long -> r11 "field V08._upper (fldOffset=0x8)" P-INDEP
+; V105 tmp90 [V105,T01] ( 15, 16.50) long -> rdx "field V07._lower (fldOffset=0x0)" P-INDEP
+; V106 tmp91 [V106,T04] ( 11, 12.50) long -> rax "field V07._upper (fldOffset=0x8)" P-INDEP
+; V107 tmp92 [V107,T08] ( 6, 9 ) long -> r8 "field V08._lower (fldOffset=0x0)" P-INDEP
+; V108 tmp93 [V108,T10] ( 5, 8.50) long -> r9 "field V08._upper (fldOffset=0x8)" P-INDEP
;* V109 tmp94 [V109 ] ( 0, 0 ) long -> zero-ref "field V10._lower (fldOffset=0x0)" P-INDEP
;* V110 tmp95 [V110 ] ( 0, 0 ) long -> zero-ref "field V10._upper (fldOffset=0x8)" P-INDEP
;* V111 tmp96 [V111 ] ( 0, 0 ) long -> zero-ref "field V16._lower (fldOffset=0x0)" P-INDEP
;* V112 tmp97 [V112 ] ( 0, 0 ) long -> zero-ref "field V16._upper (fldOffset=0x8)" P-INDEP
;* V113 tmp98 [V113 ] ( 0, 0 ) long -> zero-ref "field V17._lower (fldOffset=0x0)" P-INDEP
;* V114 tmp99 [V114 ] ( 0, 0 ) long -> zero-ref "field V17._upper (fldOffset=0x8)" P-INDEP
;* V115 tmp100 [V115 ] ( 0, 0 ) long -> zero-ref "field V18._lower (fldOffset=0x0)" P-INDEP
;* V116 tmp101 [V116 ] ( 0, 0 ) long -> zero-ref "field V18._upper (fldOffset=0x8)" P-INDEP
;* V117 tmp102 [V117 ] ( 0, 0 ) long -> zero-ref "field V19._lower (fldOffset=0x0)" P-INDEP
;* V118 tmp103 [V118 ] ( 0, 0 ) long -> zero-ref "field V19._upper (fldOffset=0x8)" P-INDEP
;* V119 tmp104 [V119 ] ( 0, 0 ) long -> zero-ref "field V20._lower (fldOffset=0x0)" P-INDEP
;* V120 tmp105 [V120 ] ( 0, 0 ) long -> zero-ref "field V20._upper (fldOffset=0x8)" P-INDEP
;* V121 tmp106 [V121 ] ( 0, 0 ) long -> zero-ref "field V21._lower (fldOffset=0x0)" P-INDEP
;* V122 tmp107 [V122 ] ( 0, 0 ) long -> zero-ref "field V21._upper (fldOffset=0x8)" P-INDEP
;* V123 tmp108 [V123 ] ( 0, 0 ) long -> zero-ref "field V23._lower (fldOffset=0x0)" P-INDEP
;* V124 tmp109 [V124 ] ( 0, 0 ) long -> zero-ref "field V23._upper (fldOffset=0x8)" P-INDEP
;* V125 tmp110 [V125 ] ( 0, 0 ) long -> zero-ref "field V24._lower (fldOffset=0x0)" P-INDEP
;* V126 tmp111 [V126 ] ( 0, 0 ) long -> zero-ref "field V24._upper (fldOffset=0x8)" P-INDEP
;* V127 tmp112 [V127 ] ( 0, 0 ) byref -> zero-ref "field V26._reference (fldOffset=0x0)" P-INDEP
;* V128 tmp113 [V128 ] ( 0, 0 ) int -> zero-ref "field V26._length (fldOffset=0x8)" P-INDEP
;* V129 tmp114 [V129 ] ( 0, 0 ) byref -> zero-ref "field V27._reference (fldOffset=0x0)" P-INDEP
;* V130 tmp115 [V130 ] ( 0, 0 ) int -> zero-ref "field V27._length (fldOffset=0x8)" P-INDEP
;* V131 tmp116 [V131 ] ( 0, 0 ) byref -> zero-ref single-def "field V29._reference (fldOffset=0x0)" P-INDEP
;* V132 tmp117 [V132 ] ( 0, 0 ) int -> zero-ref "field V29._length (fldOffset=0x8)" P-INDEP
;* V133 tmp118 [V133 ] ( 0, 0 ) byref -> zero-ref single-def "field V30._reference (fldOffset=0x0)" P-INDEP
;* V134 tmp119 [V134 ] ( 0, 0 ) int -> zero-ref "field V30._length (fldOffset=0x8)" P-INDEP
;* V135 tmp120 [V135 ] ( 0, 0 ) byref -> zero-ref "field V34._reference (fldOffset=0x0)" P-INDEP
;* V136 tmp121 [V136 ] ( 0, 0 ) int -> zero-ref "field V34._length (fldOffset=0x8)" P-INDEP
;* V137 tmp122 [V137 ] ( 0, 0 ) byref -> zero-ref single-def "field V41._reference (fldOffset=0x0)" P-INDEP
;* V138 tmp123 [V138 ] ( 0, 0 ) int -> zero-ref "field V41._length (fldOffset=0x8)" P-INDEP
;* V139 tmp124 [V139 ] ( 0, 0 ) byref -> zero-ref single-def "field V44._reference (fldOffset=0x0)" P-INDEP
;* V140 tmp125 [V140 ] ( 0, 0 ) int -> zero-ref "field V44._length (fldOffset=0x8)" P-INDEP
;* V141 tmp126 [V141 ] ( 0, 0 ) long -> zero-ref "field V50._lower (fldOffset=0x0)" P-INDEP
;* V142 tmp127 [V142 ] ( 0, 0 ) long -> zero-ref "field V50._upper (fldOffset=0x8)" P-INDEP
-; V143 tmp128 [V143,T33] ( 2, 1 ) long -> rax "field V51._lower (fldOffset=0x0)" P-INDEP
+; V143 tmp128 [V143,T33] ( 2, 1 ) long -> rdx "field V51._lower (fldOffset=0x0)" P-INDEP
;* V144 tmp129 [V144 ] ( 0, 0 ) long -> zero-ref "field V51._upper (fldOffset=0x8)" P-INDEP
;* V145 tmp130 [V145 ] ( 0, 0 ) long -> zero-ref "field V54._lower (fldOffset=0x0)" P-INDEP
;* V146 tmp131 [V146 ] ( 0, 0 ) long -> zero-ref "field V54._upper (fldOffset=0x8)" P-INDEP
;* V147 tmp132 [V147 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V58.Item1 (fldOffset=0x0)" P-DEP
;* V148 tmp133 [V148 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V58.Item2 (fldOffset=0x8)" P-DEP
; V149 tmp134 [V149,T35] ( 1, 0.50) long -> rax "field V59.Item1 (fldOffset=0x0)" P-INDEP
; V150 tmp135 [V150,T34] ( 2, 1 ) long -> rdx "field V59.Item2 (fldOffset=0x8)" P-INDEP
;* V151 tmp136 [V151 ] ( 0, 0 ) long -> zero-ref "field V62._lower (fldOffset=0x0)" P-INDEP
;* V152 tmp137 [V152 ] ( 0, 0 ) long -> zero-ref "field V62._upper (fldOffset=0x8)" P-INDEP
;* V153 tmp138 [V153 ] ( 0, 0 ) long -> zero-ref "field V64._lower (fldOffset=0x0)" P-INDEP
;* V154 tmp139 [V154 ] ( 0, 0 ) long -> zero-ref "field V64._upper (fldOffset=0x8)" P-INDEP
;* V155 tmp140 [V155 ] ( 0, 0 ) long -> zero-ref "field V65._lower (fldOffset=0x0)" P-INDEP
;* V156 tmp141 [V156 ] ( 0, 0 ) long -> zero-ref "field V65._upper (fldOffset=0x8)" P-INDEP
-; V157 tmp142 [V157,T24] ( 4, 4 ) long -> rax "field V67._lower (fldOffset=0x0)" P-INDEP
+; V157 tmp142 [V157,T24] ( 4, 4 ) long -> r11 "field V67._lower (fldOffset=0x0)" P-INDEP
;* V158 tmp143 [V158 ] ( 0, 0 ) long -> zero-ref "field V67._upper (fldOffset=0x8)" P-INDEP
;* V159 tmp144 [V159 ] ( 0, 0 ) long -> zero-ref "field V70._lower (fldOffset=0x0)" P-INDEP
-; V160 tmp145 [V160,T25] ( 4, 4 ) long -> r9 "field V70._upper (fldOffset=0x8)" P-INDEP
-; V161 tmp146 [V161,T26] ( 4, 4 ) long -> rax "field V73._lower (fldOffset=0x0)" P-INDEP
+; V160 tmp145 [V160,T25] ( 4, 4 ) long -> rax "field V70._upper (fldOffset=0x8)" P-INDEP
+; V161 tmp146 [V161,T26] ( 4, 4 ) long -> r11 "field V73._lower (fldOffset=0x0)" P-INDEP
;* V162 tmp147 [V162 ] ( 0, 0 ) long -> zero-ref "field V73._upper (fldOffset=0x8)" P-INDEP
;* V163 tmp148 [V163 ] ( 0, 0 ) long -> zero-ref "field V76._lower (fldOffset=0x0)" P-INDEP
-; V164 tmp149 [V164,T27] ( 4, 4 ) long -> r9 "field V76._upper (fldOffset=0x8)" P-INDEP
+; V164 tmp149 [V164,T27] ( 4, 4 ) long -> rax "field V76._upper (fldOffset=0x8)" P-INDEP
;* V165 tmp150 [V165 ] ( 0, 0 ) long -> zero-ref "field V78._lower (fldOffset=0x0)" P-INDEP
;* V166 tmp151 [V166 ] ( 0, 0 ) long -> zero-ref "field V78._upper (fldOffset=0x8)" P-INDEP
;* V167 tmp152 [V167 ] ( 0, 0 ) long -> zero-ref "field V80._lower (fldOffset=0x0)" P-INDEP
;* V168 tmp153 [V168 ] ( 0, 0 ) long -> zero-ref "field V80._upper (fldOffset=0x8)" P-INDEP
;* V169 tmp154 [V169 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V84.Item1 (fldOffset=0x0)" P-DEP
;* V170 tmp155 [V170 ] ( 0, 0 ) long -> zero-ref do-not-enreg[] "field V84.Item2 (fldOffset=0x8)" P-DEP
; V171 tmp156 [V171,T06] ( 6, 12 ) long -> [rbp-0x40] "field V85.Item1 (fldOffset=0x0)" P-INDEP
-; V172 tmp157 [V172,T14] ( 4, 8 ) long -> rdx "field V85.Item2 (fldOffset=0x8)" P-INDEP
+; V172 tmp157 [V172,T14] ( 4, 8 ) long -> r13 "field V85.Item2 (fldOffset=0x8)" P-INDEP
;* V173 tmp158 [V173 ] ( 0, 0 ) long -> zero-ref "field V90._lower (fldOffset=0x0)" P-INDEP
-; V174 tmp159 [V174,T15] ( 4, 8 ) long -> r11 "field V90._upper (fldOffset=0x8)" P-INDEP
+; V174 tmp159 [V174,T15] ( 4, 8 ) long -> r9 "field V90._upper (fldOffset=0x8)" P-INDEP
;* V175 tmp160 [V175 ] ( 0, 0 ) long -> zero-ref "field V92._lower (fldOffset=0x0)" P-INDEP
;* V176 tmp161 [V176 ] ( 0, 0 ) long -> zero-ref "field V92._upper (fldOffset=0x8)" P-INDEP
;* V177 tmp162 [V177 ] ( 0, 0 ) long -> zero-ref "field V95._lower (fldOffset=0x0)" P-INDEP
;* V178 tmp163 [V178 ] ( 0, 0 ) long -> zero-ref "field V95._upper (fldOffset=0x8)" P-INDEP
;* V179 tmp164 [V179 ] ( 0, 0 ) long -> zero-ref "field V97._lower (fldOffset=0x0)" P-INDEP
;* V180 tmp165 [V180 ] ( 0, 0 ) long -> zero-ref "field V97._upper (fldOffset=0x8)" P-INDEP
; V181 cse0 [V181,T16] ( 8, 7 ) int -> rsi "CSE #01: moderate"
-; V182 cse1 [V182,T20] ( 3, 5.94) int -> rax "CSE #02: moderate"
+; V182 cse1 [V182,T20] ( 3, 5.94) int -> r11 "CSE #02: moderate"
;
; Lcl frame size = 24
G_M61321_IG01:
push rbp
push r15
push r14
push r13
push r12
push rbx
sub rsp, 24
lea rbp, [rsp+0x40]
mov r14, rdi
mov ebx, esi
mov r13d, ecx
mov r15, r8
mov r12d, r9d
;; size=33 bbWeight=1 PerfScore 8.00
G_M61321_IG02:
test ebx, ebx
je SHORT G_M61321_IG04
;; size=4 bbWeight=1 PerfScore 1.25
G_M61321_IG03:
cmp r13d, 4
jl SHORT G_M61321_IG04
mov rax, qword ptr [rdx]
mov rdi, rdx
mov qword ptr [rbp-0x30], rax
mov rsi, rax
mov edx, r13d
mov rcx, 0xD1FFAB1E ; code for System.SpanHelpers:NonPackedIndexOfValueType[long,System.SpanHelpers+Negate`1[long]](byref,long,int):int
call [rcx]System.SpanHelpers:NonPackedIndexOfValueType[long,System.SpanHelpers+Negate`1[long]](byref,long,int):int
test eax, eax
jge SHORT G_M61321_IG04
mov ecx, r13d
mov rdi, qword ptr [rbp-0x30]
cmp rdi, -1
je G_M61321_IG21
lea esi, [rbx+rcx]
cmp ebx, ecx
- mov eax, ecx
- cmovle eax, ebx
- mul rdx:rax, rdi
+ mov edx, ecx
+ cmovle edx, ebx
+ mulx rdx, rax, rdi
test rdx, rdx
je SHORT G_M61321_IG06
- ;; size=73 bbWeight=0.50 PerfScore 8.88
+ ;; size=75 bbWeight=0.50 PerfScore 8.88
G_M61321_IG04:
xor eax, eax
;; size=2 bbWeight=0.50 PerfScore 0.12
G_M61321_IG05:
add rsp, 24
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
ret
;; size=15 bbWeight=0.50 PerfScore 2.12
G_M61321_IG06:
+ xor edx, edx
+ xor eax, eax
xor r8d, r8d
xor r9d, r9d
xor r10d, r10d
- xor r11d, r11d
- xor r13d, r13d
dec esi
test esi, esi
jg SHORT G_M61321_IG08
- ;; size=21 bbWeight=0.50 PerfScore 1.38
+ ;; size=19 bbWeight=0.50 PerfScore 1.38
G_M61321_IG07:
mov dword ptr [rbp-0x34], r12d
jmp G_M61321_IG14
align [0 bytes for IG09]
;; size=9 bbWeight=0.25 PerfScore 0.75
G_M61321_IG08:
cmp esi, ebx
jg G_M61321_IG15
mov dword ptr [rbp-0x34], r12d
cmp esi, r12d
jg G_M61321_IG26
;; size=21 bbWeight=0.50 PerfScore 1.75
G_M61321_IG09:
- cmp r13d, ebx
+ cmp r10d, ebx
jge SHORT G_M61321_IG11
;; size=5 bbWeight=3.96 PerfScore 4.95
G_M61321_IG10:
- mov eax, r13d
- mov rax, qword ptr [r14+8*rax]
- add rax, r8
- cmp rax, r8
- setb r8b
- movzx r8, r8b
- add r9, r8
- mov r8, rax
- ;; size=27 bbWeight=1.98 PerfScore 7.92
+ mov r11d, r10d
+ mov r11, qword ptr [r14+8*r11]
+ add r11, rdx
+ cmp r11, rdx
+ setb dl
+ movzx rdx, dl
+ mov r13d, edx
+ add rax, r13
+ mov rdx, r11
+ ;; size=28 bbWeight=1.98 PerfScore 8.42
G_M61321_IG11:
- cmp r13d, ecx
+ cmp r10d, ecx
jl SHORT G_M61321_IG13
;; size=5 bbWeight=3.96 PerfScore 4.95
G_M61321_IG12:
- mov eax, r13d
- sub eax, ecx
- cmp eax, ebx
+ mov r11d, r10d
+ sub r11d, ecx
+ cmp r11d, ebx
jae G_M61321_IG27
- mov rax, qword ptr [r14+8*rax]
- mov rdx, r8
- sub rdx, rax
- cmp rdx, r8
- seta r8b
- movzx r8, r8b
- sub r9, r8
- mov r8, rdx
+ mov r11, qword ptr [r14+8*r11]
+ mov r13, rdx
+ sub r13, r11
+ cmp r13, rdx
+ seta dl
+ movzx rdx, dl
+ sub rax, rdx
+ mov rdx, r13
;; size=40 bbWeight=1.98 PerfScore 11.38
G_M61321_IG13:
- mov rax, rdi
- mul rdx:rax, r8
- mov r12, r9
+ mulx r13, r11, rdi
+ mov r12, rax
imul r12, rdi
- add r12, rdx
- add r10, rax
- cmp r10, rax
- setb al
- movzx rax, al
- add r11, r12
- add r11, rax
- mov eax, r13d
- mov qword ptr [r15+8*rax], r10
- mov r10, r11
- xor r11d, r11d
- inc r13d
- cmp r13d, esi
+ add r12, r13
+ add r8, r11
+ cmp r8, r11
+ setb r11b
+ movzx r11, r11b
+ add r9, r12
+ add r9, r11
+ mov r11d, r10d
+ mov qword ptr [r15+8*r11], r8
+ mov r8, r9
+ xor r9d, r9d
+ inc r10d
+ cmp r10d, esi
jl G_M61321_IG09
- ;; size=59 bbWeight=3.96 PerfScore 42.57
+ ;; size=60 bbWeight=3.96 PerfScore 41.58
G_M61321_IG14:
cmp esi, dword ptr [rbp-0x34]
jae G_M61321_IG27
mov eax, esi
- mov qword ptr [r15+8*rax], r10
+ mov qword ptr [r15+8*rax], r8
jmp G_M61321_IG22
;; size=20 bbWeight=0.50 PerfScore 2.62
G_M61321_IG15:
- cmp r13d, ebx
+ cmp r10d, ebx
jge SHORT G_M61321_IG17
;; size=5 bbWeight=0.04 PerfScore 0.05
G_M61321_IG16:
- mov eax, r13d
- mov rax, qword ptr [r14+8*rax]
- add rax, r8
- cmp rax, r8
- setb r8b
- movzx r8, r8b
- add r9, r8
- mov r8, rax
- ;; size=27 bbWeight=0.02 PerfScore 0.08
+ mov r11d, r10d
+ mov r11, qword ptr [r14+8*r11]
+ add r11, rdx
+ cmp r11, rdx
+ setb dl
+ movzx rdx, dl
+ mov r13d, edx
+ add rax, r13
+ mov rdx, r11
+ ;; size=28 bbWeight=0.02 PerfScore 0.09
G_M61321_IG17:
- cmp r13d, ecx
+ cmp r10d, ecx
jl SHORT G_M61321_IG19
;; size=5 bbWeight=0.04 PerfScore 0.05
G_M61321_IG18:
- mov eax, r13d
- sub eax, ecx
- cmp eax, ebx
+ mov r11d, r10d
+ sub r11d, ecx
+ cmp r11d, ebx
jae G_M61321_IG27
- mov eax, r13d
- sub eax, ecx
- mov rax, qword ptr [r14+8*rax]
- mov rdx, r8
- sub rdx, rax
- cmp rdx, r8
- seta r8b
- movzx r8, r8b
- sub r9, r8
- mov r8, rdx
- ;; size=45 bbWeight=0.02 PerfScore 0.13
-G_M61321_IG19:
- mov rax, rdi
- mul rdx:rax, r8
- mov qword ptr [rbp-0x40], rax
- mov rax, r9
- imul rax, rdi
- add rax, rdx
- mov rdx, qword ptr [rbp-0x40]
- add r10, rdx
- cmp r10, rdx
- setb dl
+ mov r11d, r10d
+ sub r11d, ecx
+ mov r11, qword ptr [r14+8*r11]
+ mov r13, rdx
+ sub r13, r11
+ cmp r13, rdx
+ seta dl
movzx rdx, dl
- add r11, rax
- add r11, rdx
- cmp r13d, r12d
+ sub rax, rdx
+ mov rdx, r13
+ ;; size=46 bbWeight=0.02 PerfScore 0.13
+G_M61321_IG19:
+ mulx r13, r11, rdi
+ mov qword ptr [rbp-0x40], r11
+ mov r11, rax
+ imul r11, rdi
+ add r11, r13
+ mov r13, qword ptr [rbp-0x40]
+ add r8, r13
+ cmp r8, r13
+ setb r13b
+ movzx r13, r13b
+ add r9, r11
+ add r9, r13
+ cmp r10d, r12d
jae G_M61321_IG27
- mov eax, r13d
- mov qword ptr [r15+8*rax], r10
- mov r10, r11
- xor r11d, r11d
- inc r13d
- cmp r13d, esi
+ mov r11d, r10d
+ mov qword ptr [r15+8*r11], r8
+ mov r8, r9
+ xor r9d, r9d
+ inc r10d
+ cmp r10d, esi
jl G_M61321_IG15
- ;; size=76 bbWeight=0.04 PerfScore 0.56
+ ;; size=77 bbWeight=0.04 PerfScore 0.55
G_M61321_IG20:
mov dword ptr [rbp-0x34], r12d
jmp G_M61321_IG14
;; size=9 bbWeight=0.02 PerfScore 0.06
G_M61321_IG21:
cmp r13d, r12d
jg SHORT G_M61321_IG24
mov eax, r13d
lea rdi, bword ptr [r15+8*rax]
mov eax, r12d
sub eax, r13d
cmp ebx, eax
ja SHORT G_M61321_IG25
mov edx, ebx
shl rdx, 3
mov rsi, r14
mov rax, 0xD1FFAB1E ; code for System.SpanHelpers:Memmove(byref,byref,nuint)
call [rax]System.SpanHelpers:Memmove(byref,byref,nuint)
mov rdi, r15
mov esi, r12d
mov rdx, r14
mov ecx, ebx
mov rax, 0xD1FFAB1E ; code for System.Numerics.BigIntegerCalculator:SubtractSelf(System.Span`1[nuint],System.ReadOnlySpan`1[nuint])
call [rax]System.Numerics.BigIntegerCalculator:SubtractSelf(System.Span`1[nuint],System.ReadOnlySpan`1[nuint])
;; size=66 bbWeight=0.50 PerfScore 6.12
G_M61321_IG22:
mov eax, 1
;; size=5 bbWeight=0.50 PerfScore 0.12
G_M61321_IG23:
add rsp, 24
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
ret
;; size=15 bbWeight=0.50 PerfScore 2.12
G_M61321_IG24:
mov rax, 0xD1FFAB1E ; code for System.ThrowHelper:ThrowArgumentOutOfRangeException()
call [rax]System.ThrowHelper:ThrowArgumentOutOfRangeException()
int3
;; size=13 bbWeight=0 PerfScore 0.00
G_M61321_IG25:
mov rax, 0xD1FFAB1E ; code for System.ThrowHelper:ThrowArgumentException_DestinationTooShort()
call [rax]System.ThrowHelper:ThrowArgumentException_DestinationTooShort()
int3
;; size=13 bbWeight=0 PerfScore 0.00
G_M61321_IG26:
mov r12d, dword ptr [rbp-0x34]
jmp G_M61321_IG15
;; size=9 bbWeight=0.00 PerfScore 0.01
G_M61321_IG27:
call CORINFO_HELP_RNGCHKFAIL
int3
;; size=6 bbWeight=0 PerfScore 0.00
-; Total bytes of code 628, prolog size 33, PerfScore 107.96, instruction count 197, allocated bytes for code 628 (MethodHash=7a421076) for method System.Numerics.BigIntegerCalculator:TryMultiplyRepeatedLimb(System.ReadOnlySpan`1[nuint],System.ReadOnlySpan`1[nuint],System.Span`1[nuint]):bool (FullOpts)
+; Total bytes of code 633, prolog size 33, PerfScore 107.46, instruction count 197, allocated bytes for code 633 (MethodHash=7a421076) for method System.Numerics.BigIntegerCalculator:TryMultiplyRepeatedLimb(System.ReadOnlySpan`1[nuint],System.ReadOnlySpan`1[nuint],System.Span`1[nuint]):bool (FullOpts)
; ============================================================
```